This source file includes following definitions.
- scl_cal_scale
- scl_cal_scale2
- scl_get_bili_dn_vskip
- scl_get_scl_mode
- scl_get_vskiplines
- scl_vop_cal_lb_mode
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7 #ifndef _ROCKCHIP_DRM_VOP_H
8 #define _ROCKCHIP_DRM_VOP_H
9
10
11
12
13
14 #define VOP_VERSION(major, minor) ((major) << 8 | (minor))
15 #define VOP_MAJOR(version) ((version) >> 8)
16 #define VOP_MINOR(version) ((version) & 0xff)
17
18 #define NUM_YUV2YUV_COEFFICIENTS 12
19
20 enum vop_data_format {
21 VOP_FMT_ARGB8888 = 0,
22 VOP_FMT_RGB888,
23 VOP_FMT_RGB565,
24 VOP_FMT_YUV420SP = 4,
25 VOP_FMT_YUV422SP,
26 VOP_FMT_YUV444SP,
27 };
28
29 struct vop_reg {
30 uint32_t mask;
31 uint16_t offset;
32 uint8_t shift;
33 bool write_mask;
34 bool relaxed;
35 };
36
37 struct vop_modeset {
38 struct vop_reg htotal_pw;
39 struct vop_reg hact_st_end;
40 struct vop_reg hpost_st_end;
41 struct vop_reg vtotal_pw;
42 struct vop_reg vact_st_end;
43 struct vop_reg vpost_st_end;
44 };
45
46 struct vop_output {
47 struct vop_reg pin_pol;
48 struct vop_reg dp_pin_pol;
49 struct vop_reg edp_pin_pol;
50 struct vop_reg hdmi_pin_pol;
51 struct vop_reg mipi_pin_pol;
52 struct vop_reg rgb_pin_pol;
53 struct vop_reg dp_en;
54 struct vop_reg edp_en;
55 struct vop_reg hdmi_en;
56 struct vop_reg mipi_en;
57 struct vop_reg mipi_dual_channel_en;
58 struct vop_reg rgb_en;
59 };
60
61 struct vop_common {
62 struct vop_reg cfg_done;
63 struct vop_reg dsp_blank;
64 struct vop_reg data_blank;
65 struct vop_reg pre_dither_down;
66 struct vop_reg dither_down_sel;
67 struct vop_reg dither_down_mode;
68 struct vop_reg dither_down_en;
69 struct vop_reg dither_up;
70 struct vop_reg gate_en;
71 struct vop_reg mmu_en;
72 struct vop_reg out_mode;
73 struct vop_reg standby;
74 };
75
76 struct vop_misc {
77 struct vop_reg global_regdone_en;
78 };
79
80 struct vop_intr {
81 const int *intrs;
82 uint32_t nintrs;
83
84 struct vop_reg line_flag_num[2];
85 struct vop_reg enable;
86 struct vop_reg clear;
87 struct vop_reg status;
88 };
89
90 struct vop_scl_extension {
91 struct vop_reg cbcr_vsd_mode;
92 struct vop_reg cbcr_vsu_mode;
93 struct vop_reg cbcr_hsd_mode;
94 struct vop_reg cbcr_ver_scl_mode;
95 struct vop_reg cbcr_hor_scl_mode;
96 struct vop_reg yrgb_vsd_mode;
97 struct vop_reg yrgb_vsu_mode;
98 struct vop_reg yrgb_hsd_mode;
99 struct vop_reg yrgb_ver_scl_mode;
100 struct vop_reg yrgb_hor_scl_mode;
101 struct vop_reg line_load_mode;
102 struct vop_reg cbcr_axi_gather_num;
103 struct vop_reg yrgb_axi_gather_num;
104 struct vop_reg vsd_cbcr_gt2;
105 struct vop_reg vsd_cbcr_gt4;
106 struct vop_reg vsd_yrgb_gt2;
107 struct vop_reg vsd_yrgb_gt4;
108 struct vop_reg bic_coe_sel;
109 struct vop_reg cbcr_axi_gather_en;
110 struct vop_reg yrgb_axi_gather_en;
111 struct vop_reg lb_mode;
112 };
113
114 struct vop_scl_regs {
115 const struct vop_scl_extension *ext;
116
117 struct vop_reg scale_yrgb_x;
118 struct vop_reg scale_yrgb_y;
119 struct vop_reg scale_cbcr_x;
120 struct vop_reg scale_cbcr_y;
121 };
122
123 struct vop_yuv2yuv_phy {
124 struct vop_reg y2r_coefficients[NUM_YUV2YUV_COEFFICIENTS];
125 };
126
127 struct vop_win_phy {
128 const struct vop_scl_regs *scl;
129 const uint32_t *data_formats;
130 uint32_t nformats;
131
132 struct vop_reg enable;
133 struct vop_reg gate;
134 struct vop_reg format;
135 struct vop_reg rb_swap;
136 struct vop_reg act_info;
137 struct vop_reg dsp_info;
138 struct vop_reg dsp_st;
139 struct vop_reg yrgb_mst;
140 struct vop_reg uv_mst;
141 struct vop_reg yrgb_vir;
142 struct vop_reg uv_vir;
143 struct vop_reg y_mir_en;
144 struct vop_reg x_mir_en;
145
146 struct vop_reg dst_alpha_ctl;
147 struct vop_reg src_alpha_ctl;
148 struct vop_reg channel;
149 };
150
151 struct vop_win_yuv2yuv_data {
152 uint32_t base;
153 const struct vop_yuv2yuv_phy *phy;
154 struct vop_reg y2r_en;
155 };
156
157 struct vop_win_data {
158 uint32_t base;
159 const struct vop_win_phy *phy;
160 enum drm_plane_type type;
161 };
162
163 struct vop_data {
164 uint32_t version;
165 const struct vop_intr *intr;
166 const struct vop_common *common;
167 const struct vop_misc *misc;
168 const struct vop_modeset *modeset;
169 const struct vop_output *output;
170 const struct vop_win_yuv2yuv_data *win_yuv2yuv;
171 const struct vop_win_data *win;
172 unsigned int win_size;
173
174 #define VOP_FEATURE_OUTPUT_RGB10 BIT(0)
175 #define VOP_FEATURE_INTERNAL_RGB BIT(1)
176 u64 feature;
177 };
178
179
180 #define DSP_HOLD_VALID_INTR (1 << 0)
181 #define FS_INTR (1 << 1)
182 #define LINE_FLAG_INTR (1 << 2)
183 #define BUS_ERROR_INTR (1 << 3)
184
185 #define INTR_MASK (DSP_HOLD_VALID_INTR | FS_INTR | \
186 LINE_FLAG_INTR | BUS_ERROR_INTR)
187
188 #define DSP_HOLD_VALID_INTR_EN(x) ((x) << 4)
189 #define FS_INTR_EN(x) ((x) << 5)
190 #define LINE_FLAG_INTR_EN(x) ((x) << 6)
191 #define BUS_ERROR_INTR_EN(x) ((x) << 7)
192 #define DSP_HOLD_VALID_INTR_MASK (1 << 4)
193 #define FS_INTR_MASK (1 << 5)
194 #define LINE_FLAG_INTR_MASK (1 << 6)
195 #define BUS_ERROR_INTR_MASK (1 << 7)
196
197 #define INTR_CLR_SHIFT 8
198 #define DSP_HOLD_VALID_INTR_CLR (1 << (INTR_CLR_SHIFT + 0))
199 #define FS_INTR_CLR (1 << (INTR_CLR_SHIFT + 1))
200 #define LINE_FLAG_INTR_CLR (1 << (INTR_CLR_SHIFT + 2))
201 #define BUS_ERROR_INTR_CLR (1 << (INTR_CLR_SHIFT + 3))
202
203 #define DSP_LINE_NUM(x) (((x) & 0x1fff) << 12)
204 #define DSP_LINE_NUM_MASK (0x1fff << 12)
205
206
207 #define SRC_FADING_VALUE(x) (((x) & 0xff) << 24)
208 #define SRC_GLOBAL_ALPHA(x) (((x) & 0xff) << 16)
209 #define SRC_FACTOR_M0(x) (((x) & 0x7) << 6)
210 #define SRC_ALPHA_CAL_M0(x) (((x) & 0x1) << 5)
211 #define SRC_BLEND_M0(x) (((x) & 0x3) << 3)
212 #define SRC_ALPHA_M0(x) (((x) & 0x1) << 2)
213 #define SRC_COLOR_M0(x) (((x) & 0x1) << 1)
214 #define SRC_ALPHA_EN(x) (((x) & 0x1) << 0)
215
216 #define DST_FACTOR_M0(x) (((x) & 0x7) << 6)
217
218
219
220
221 #define ROCKCHIP_OUT_MODE_P888 0
222 #define ROCKCHIP_OUT_MODE_P666 1
223 #define ROCKCHIP_OUT_MODE_P565 2
224
225 #define ROCKCHIP_OUT_MODE_AAAA 15
226
227
228 #define ROCKCHIP_OUTPUT_DSI_DUAL BIT(0)
229
230 enum alpha_mode {
231 ALPHA_STRAIGHT,
232 ALPHA_INVERSE,
233 };
234
235 enum global_blend_mode {
236 ALPHA_GLOBAL,
237 ALPHA_PER_PIX,
238 ALPHA_PER_PIX_GLOBAL,
239 };
240
241 enum alpha_cal_mode {
242 ALPHA_SATURATION,
243 ALPHA_NO_SATURATION,
244 };
245
246 enum color_mode {
247 ALPHA_SRC_PRE_MUL,
248 ALPHA_SRC_NO_PRE_MUL,
249 };
250
251 enum factor_mode {
252 ALPHA_ZERO,
253 ALPHA_ONE,
254 ALPHA_SRC,
255 ALPHA_SRC_INVERSE,
256 ALPHA_SRC_GLOBAL,
257 };
258
259 enum scale_mode {
260 SCALE_NONE = 0x0,
261 SCALE_UP = 0x1,
262 SCALE_DOWN = 0x2
263 };
264
265 enum lb_mode {
266 LB_YUV_3840X5 = 0x0,
267 LB_YUV_2560X8 = 0x1,
268 LB_RGB_3840X2 = 0x2,
269 LB_RGB_2560X4 = 0x3,
270 LB_RGB_1920X5 = 0x4,
271 LB_RGB_1280X8 = 0x5
272 };
273
274 enum sacle_up_mode {
275 SCALE_UP_BIL = 0x0,
276 SCALE_UP_BIC = 0x1
277 };
278
279 enum scale_down_mode {
280 SCALE_DOWN_BIL = 0x0,
281 SCALE_DOWN_AVG = 0x1
282 };
283
284 enum dither_down_mode {
285 RGB888_TO_RGB565 = 0x0,
286 RGB888_TO_RGB666 = 0x1
287 };
288
289 enum dither_down_mode_sel {
290 DITHER_DOWN_ALLEGRO = 0x0,
291 DITHER_DOWN_FRC = 0x1
292 };
293
294 enum vop_pol {
295 HSYNC_POSITIVE = 0,
296 VSYNC_POSITIVE = 1,
297 DEN_NEGATIVE = 2,
298 DCLK_INVERT = 3
299 };
300
301 #define FRAC_16_16(mult, div) (((mult) << 16) / (div))
302 #define SCL_FT_DEFAULT_FIXPOINT_SHIFT 12
303 #define SCL_MAX_VSKIPLINES 4
304 #define MIN_SCL_FT_AFTER_VSKIP 1
305
306 static inline uint16_t scl_cal_scale(int src, int dst, int shift)
307 {
308 return ((src * 2 - 3) << (shift - 1)) / (dst - 1);
309 }
310
311 static inline uint16_t scl_cal_scale2(int src, int dst)
312 {
313 return ((src - 1) << 12) / (dst - 1);
314 }
315
316 #define GET_SCL_FT_BILI_DN(src, dst) scl_cal_scale(src, dst, 12)
317 #define GET_SCL_FT_BILI_UP(src, dst) scl_cal_scale(src, dst, 16)
318 #define GET_SCL_FT_BIC(src, dst) scl_cal_scale(src, dst, 16)
319
320 static inline uint16_t scl_get_bili_dn_vskip(int src_h, int dst_h,
321 int vskiplines)
322 {
323 int act_height;
324
325 act_height = (src_h + vskiplines - 1) / vskiplines;
326
327 if (act_height == dst_h)
328 return GET_SCL_FT_BILI_DN(src_h, dst_h) / vskiplines;
329
330 return GET_SCL_FT_BILI_DN(act_height, dst_h);
331 }
332
333 static inline enum scale_mode scl_get_scl_mode(int src, int dst)
334 {
335 if (src < dst)
336 return SCALE_UP;
337 else if (src > dst)
338 return SCALE_DOWN;
339
340 return SCALE_NONE;
341 }
342
343 static inline int scl_get_vskiplines(uint32_t srch, uint32_t dsth)
344 {
345 uint32_t vskiplines;
346
347 for (vskiplines = SCL_MAX_VSKIPLINES; vskiplines > 1; vskiplines /= 2)
348 if (srch >= vskiplines * dsth * MIN_SCL_FT_AFTER_VSKIP)
349 break;
350
351 return vskiplines;
352 }
353
354 static inline int scl_vop_cal_lb_mode(int width, bool is_yuv)
355 {
356 int lb_mode;
357
358 if (is_yuv) {
359 if (width > 1280)
360 lb_mode = LB_YUV_3840X5;
361 else
362 lb_mode = LB_YUV_2560X8;
363 } else {
364 if (width > 2560)
365 lb_mode = LB_RGB_3840X2;
366 else if (width > 1920)
367 lb_mode = LB_RGB_2560X4;
368 else
369 lb_mode = LB_RGB_1920X5;
370 }
371
372 return lb_mode;
373 }
374
375 extern const struct component_ops vop_component_ops;
376 #endif