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4
5 #ifndef _DPU_HW_INTF_H
6 #define _DPU_HW_INTF_H
7
8 #include "dpu_hw_catalog.h"
9 #include "dpu_hw_mdss.h"
10 #include "dpu_hw_util.h"
11 #include "dpu_hw_blk.h"
12
13 struct dpu_hw_intf;
14
15
16 struct intf_timing_params {
17 u32 width;
18 u32 height;
19 u32 xres;
20 u32 yres;
21
22 u32 h_back_porch;
23 u32 h_front_porch;
24 u32 v_back_porch;
25 u32 v_front_porch;
26 u32 hsync_pulse_width;
27 u32 vsync_pulse_width;
28 u32 hsync_polarity;
29 u32 vsync_polarity;
30 u32 border_clr;
31 u32 underflow_clr;
32 u32 hsync_skew;
33 };
34
35 struct intf_prog_fetch {
36 u8 enable;
37
38 u32 fetch_start;
39 };
40
41 struct intf_status {
42 u8 is_en;
43 u32 frame_count;
44 u32 line_count;
45 };
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54
55
56 struct dpu_hw_intf_ops {
57 void (*setup_timing_gen)(struct dpu_hw_intf *intf,
58 const struct intf_timing_params *p,
59 const struct dpu_format *fmt);
60
61 void (*setup_prg_fetch)(struct dpu_hw_intf *intf,
62 const struct intf_prog_fetch *fetch);
63
64 void (*enable_timing)(struct dpu_hw_intf *intf,
65 u8 enable);
66
67 void (*get_status)(struct dpu_hw_intf *intf,
68 struct intf_status *status);
69
70 u32 (*get_line_count)(struct dpu_hw_intf *intf);
71 };
72
73 struct dpu_hw_intf {
74 struct dpu_hw_blk base;
75 struct dpu_hw_blk_reg_map hw;
76
77
78 enum dpu_intf idx;
79 const struct dpu_intf_cfg *cap;
80 const struct dpu_mdss_cfg *mdss;
81
82
83 struct dpu_hw_intf_ops ops;
84 };
85
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90
91
92
93 struct dpu_hw_intf *dpu_hw_intf_init(enum dpu_intf idx,
94 void __iomem *addr,
95 struct dpu_mdss_cfg *m);
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100
101 void dpu_hw_intf_destroy(struct dpu_hw_intf *intf);
102
103 #endif