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4
5
6 #ifndef __EDP_CONNECTOR_H__
7 #define __EDP_CONNECTOR_H__
8
9 #include <linux/i2c.h>
10 #include <linux/interrupt.h>
11 #include <linux/kernel.h>
12 #include <linux/platform_device.h>
13 #include <drm/drm_crtc.h>
14 #include <drm/drm_dp_helper.h>
15
16 #include "msm_drv.h"
17
18 #define edp_read(offset) msm_readl((offset))
19 #define edp_write(offset, data) msm_writel((data), (offset))
20
21 struct edp_ctrl;
22 struct edp_aux;
23 struct edp_phy;
24
25 struct msm_edp {
26 struct drm_device *dev;
27 struct platform_device *pdev;
28
29 struct drm_connector *connector;
30 struct drm_bridge *bridge;
31
32
33 struct drm_encoder *encoder;
34
35 struct edp_ctrl *ctrl;
36
37 int irq;
38 };
39
40
41 struct drm_bridge *msm_edp_bridge_init(struct msm_edp *edp);
42 void edp_bridge_destroy(struct drm_bridge *bridge);
43
44
45 struct drm_connector *msm_edp_connector_init(struct msm_edp *edp);
46
47
48 void *msm_edp_aux_init(struct device *dev, void __iomem *regbase,
49 struct drm_dp_aux **drm_aux);
50 void msm_edp_aux_destroy(struct device *dev, struct edp_aux *aux);
51 irqreturn_t msm_edp_aux_irq(struct edp_aux *aux, u32 isr);
52 void msm_edp_aux_ctrl(struct edp_aux *aux, int enable);
53
54
55 bool msm_edp_phy_ready(struct edp_phy *phy);
56 void msm_edp_phy_ctrl(struct edp_phy *phy, int enable);
57 void msm_edp_phy_vm_pe_init(struct edp_phy *phy);
58 void msm_edp_phy_vm_pe_cfg(struct edp_phy *phy, u32 v0, u32 v1);
59 void msm_edp_phy_lane_power_ctrl(struct edp_phy *phy, bool up, u32 max_lane);
60 void *msm_edp_phy_init(struct device *dev, void __iomem *regbase);
61
62
63 irqreturn_t msm_edp_ctrl_irq(struct edp_ctrl *ctrl);
64 void msm_edp_ctrl_power(struct edp_ctrl *ctrl, bool on);
65 int msm_edp_ctrl_init(struct msm_edp *edp);
66 void msm_edp_ctrl_destroy(struct edp_ctrl *ctrl);
67 bool msm_edp_ctrl_panel_connected(struct edp_ctrl *ctrl);
68 int msm_edp_ctrl_get_panel_info(struct edp_ctrl *ctrl,
69 struct drm_connector *connector, struct edid **edid);
70 int msm_edp_ctrl_timing_cfg(struct edp_ctrl *ctrl,
71 const struct drm_display_mode *mode,
72 const struct drm_display_info *info);
73
74 bool msm_edp_ctrl_pixel_clock_valid(struct edp_ctrl *ctrl,
75 u32 pixel_rate, u32 *pm, u32 *pn);
76
77 #endif