This source file includes following definitions.
- vmw_sou_destroy
- vmw_sou_crtc_destroy
- vmw_sou_fifo_create
- vmw_sou_fifo_destroy
- vmw_sou_crtc_mode_set_nofb
- vmw_sou_crtc_helper_prepare
- vmw_sou_crtc_atomic_enable
- vmw_sou_crtc_atomic_disable
- vmw_sou_encoder_destroy
- vmw_sou_connector_destroy
- vmw_sou_primary_plane_cleanup_fb
- vmw_sou_primary_plane_prepare_fb
- vmw_sou_bo_fifo_size
- vmw_sou_bo_define_gmrfb
- vmw_sou_bo_populate_clip
- vmw_stud_bo_post_clip
- vmw_sou_plane_update_bo
- vmw_sou_surface_fifo_size
- vmw_sou_surface_post_prepare
- vmw_sou_surface_pre_clip
- vmw_sou_surface_clip_rect
- vmw_sou_surface_post_clip
- vmw_sou_plane_update_surface
- vmw_sou_primary_plane_atomic_update
- vmw_sou_init
- vmw_kms_sou_init_display
- do_bo_define_gmrfb
- vmw_sou_surface_fifo_commit
- vmw_sou_surface_clip
- vmw_kms_sou_do_surface_dirty
- vmw_sou_bo_fifo_commit
- vmw_sou_bo_clip
- vmw_kms_sou_do_bo_dirty
- vmw_sou_readback_fifo_commit
- vmw_sou_readback_clip
- vmw_kms_sou_readback
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28 #include <drm/drm_atomic.h>
29 #include <drm/drm_atomic_helper.h>
30 #include <drm/drm_damage_helper.h>
31 #include <drm/drm_fourcc.h>
32 #include <drm/drm_plane_helper.h>
33 #include <drm/drm_vblank.h>
34
35 #include "vmwgfx_kms.h"
36
37 #define vmw_crtc_to_sou(x) \
38 container_of(x, struct vmw_screen_object_unit, base.crtc)
39 #define vmw_encoder_to_sou(x) \
40 container_of(x, struct vmw_screen_object_unit, base.encoder)
41 #define vmw_connector_to_sou(x) \
42 container_of(x, struct vmw_screen_object_unit, base.connector)
43
44
45
46
47
48
49
50
51
52
53
54
55
56 struct vmw_kms_sou_surface_dirty {
57 struct vmw_kms_dirty base;
58 s32 left, right, top, bottom;
59 s32 dst_x, dst_y;
60 u32 sid;
61 };
62
63
64
65
66
67 struct vmw_kms_sou_readback_blit {
68 uint32 header;
69 SVGAFifoCmdBlitScreenToGMRFB body;
70 };
71
72 struct vmw_kms_sou_bo_blit {
73 uint32 header;
74 SVGAFifoCmdBlitGMRFBToScreen body;
75 };
76
77 struct vmw_kms_sou_dirty_cmd {
78 SVGA3dCmdHeader header;
79 SVGA3dCmdBlitSurfaceToScreen body;
80 };
81
82 struct vmw_kms_sou_define_gmrfb {
83 uint32_t header;
84 SVGAFifoCmdDefineGMRFB body;
85 };
86
87
88
89
90 struct vmw_screen_object_unit {
91 struct vmw_display_unit base;
92
93 unsigned long buffer_size;
94 struct vmw_buffer_object *buffer;
95
96 bool defined;
97 };
98
99 static void vmw_sou_destroy(struct vmw_screen_object_unit *sou)
100 {
101 vmw_du_cleanup(&sou->base);
102 kfree(sou);
103 }
104
105
106
107
108
109
110 static void vmw_sou_crtc_destroy(struct drm_crtc *crtc)
111 {
112 vmw_sou_destroy(vmw_crtc_to_sou(crtc));
113 }
114
115
116
117
118 static int vmw_sou_fifo_create(struct vmw_private *dev_priv,
119 struct vmw_screen_object_unit *sou,
120 int x, int y,
121 struct drm_display_mode *mode)
122 {
123 size_t fifo_size;
124
125 struct {
126 struct {
127 uint32_t cmdType;
128 } header;
129 SVGAScreenObject obj;
130 } *cmd;
131
132 BUG_ON(!sou->buffer);
133
134 fifo_size = sizeof(*cmd);
135 cmd = VMW_FIFO_RESERVE(dev_priv, fifo_size);
136 if (unlikely(cmd == NULL))
137 return -ENOMEM;
138
139 memset(cmd, 0, fifo_size);
140 cmd->header.cmdType = SVGA_CMD_DEFINE_SCREEN;
141 cmd->obj.structSize = sizeof(SVGAScreenObject);
142 cmd->obj.id = sou->base.unit;
143 cmd->obj.flags = SVGA_SCREEN_HAS_ROOT |
144 (sou->base.unit == 0 ? SVGA_SCREEN_IS_PRIMARY : 0);
145 cmd->obj.size.width = mode->hdisplay;
146 cmd->obj.size.height = mode->vdisplay;
147 cmd->obj.root.x = x;
148 cmd->obj.root.y = y;
149 sou->base.set_gui_x = cmd->obj.root.x;
150 sou->base.set_gui_y = cmd->obj.root.y;
151
152
153 vmw_bo_get_guest_ptr(&sou->buffer->base, &cmd->obj.backingStore.ptr);
154 cmd->obj.backingStore.pitch = mode->hdisplay * 4;
155
156 vmw_fifo_commit(dev_priv, fifo_size);
157
158 sou->defined = true;
159
160 return 0;
161 }
162
163
164
165
166 static int vmw_sou_fifo_destroy(struct vmw_private *dev_priv,
167 struct vmw_screen_object_unit *sou)
168 {
169 size_t fifo_size;
170 int ret;
171
172 struct {
173 struct {
174 uint32_t cmdType;
175 } header;
176 SVGAFifoCmdDestroyScreen body;
177 } *cmd;
178
179
180 if (unlikely(!sou->defined))
181 return 0;
182
183 fifo_size = sizeof(*cmd);
184 cmd = VMW_FIFO_RESERVE(dev_priv, fifo_size);
185 if (unlikely(cmd == NULL))
186 return -ENOMEM;
187
188 memset(cmd, 0, fifo_size);
189 cmd->header.cmdType = SVGA_CMD_DESTROY_SCREEN;
190 cmd->body.screenId = sou->base.unit;
191
192 vmw_fifo_commit(dev_priv, fifo_size);
193
194
195 ret = vmw_fallback_wait(dev_priv, false, true, 0, false, 3*HZ);
196 if (unlikely(ret != 0))
197 DRM_ERROR("Failed to sync with HW");
198 else
199 sou->defined = false;
200
201 return ret;
202 }
203
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209
210
211
212 static void vmw_sou_crtc_mode_set_nofb(struct drm_crtc *crtc)
213 {
214 struct vmw_private *dev_priv;
215 struct vmw_screen_object_unit *sou;
216 struct vmw_framebuffer *vfb;
217 struct drm_framebuffer *fb;
218 struct drm_plane_state *ps;
219 struct vmw_plane_state *vps;
220 int ret;
221
222 sou = vmw_crtc_to_sou(crtc);
223 dev_priv = vmw_priv(crtc->dev);
224 ps = crtc->primary->state;
225 fb = ps->fb;
226 vps = vmw_plane_state_to_vps(ps);
227
228 vfb = (fb) ? vmw_framebuffer_to_vfb(fb) : NULL;
229
230 if (sou->defined) {
231 ret = vmw_sou_fifo_destroy(dev_priv, sou);
232 if (ret) {
233 DRM_ERROR("Failed to destroy Screen Object\n");
234 return;
235 }
236 }
237
238 if (vfb) {
239 struct drm_connector_state *conn_state;
240 struct vmw_connector_state *vmw_conn_state;
241 int x, y;
242
243 sou->buffer = vps->bo;
244 sou->buffer_size = vps->bo_size;
245
246 conn_state = sou->base.connector.state;
247 vmw_conn_state = vmw_connector_state_to_vcs(conn_state);
248
249 x = vmw_conn_state->gui_x;
250 y = vmw_conn_state->gui_y;
251
252 ret = vmw_sou_fifo_create(dev_priv, sou, x, y, &crtc->mode);
253 if (ret)
254 DRM_ERROR("Failed to define Screen Object %dx%d\n",
255 crtc->x, crtc->y);
256
257 } else {
258 sou->buffer = NULL;
259 sou->buffer_size = 0;
260 }
261 }
262
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268
269
270 static void vmw_sou_crtc_helper_prepare(struct drm_crtc *crtc)
271 {
272 }
273
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279
280
281 static void vmw_sou_crtc_atomic_enable(struct drm_crtc *crtc,
282 struct drm_crtc_state *old_state)
283 {
284 }
285
286
287
288
289
290
291 static void vmw_sou_crtc_atomic_disable(struct drm_crtc *crtc,
292 struct drm_crtc_state *old_state)
293 {
294 struct vmw_private *dev_priv;
295 struct vmw_screen_object_unit *sou;
296 int ret;
297
298
299 if (!crtc) {
300 DRM_ERROR("CRTC is NULL\n");
301 return;
302 }
303
304 sou = vmw_crtc_to_sou(crtc);
305 dev_priv = vmw_priv(crtc->dev);
306
307 if (sou->defined) {
308 ret = vmw_sou_fifo_destroy(dev_priv, sou);
309 if (ret)
310 DRM_ERROR("Failed to destroy Screen Object\n");
311 }
312 }
313
314 static const struct drm_crtc_funcs vmw_screen_object_crtc_funcs = {
315 .gamma_set = vmw_du_crtc_gamma_set,
316 .destroy = vmw_sou_crtc_destroy,
317 .reset = vmw_du_crtc_reset,
318 .atomic_duplicate_state = vmw_du_crtc_duplicate_state,
319 .atomic_destroy_state = vmw_du_crtc_destroy_state,
320 .set_config = drm_atomic_helper_set_config,
321 .page_flip = drm_atomic_helper_page_flip,
322 };
323
324
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326
327
328 static void vmw_sou_encoder_destroy(struct drm_encoder *encoder)
329 {
330 vmw_sou_destroy(vmw_encoder_to_sou(encoder));
331 }
332
333 static const struct drm_encoder_funcs vmw_screen_object_encoder_funcs = {
334 .destroy = vmw_sou_encoder_destroy,
335 };
336
337
338
339
340
341 static void vmw_sou_connector_destroy(struct drm_connector *connector)
342 {
343 vmw_sou_destroy(vmw_connector_to_sou(connector));
344 }
345
346 static const struct drm_connector_funcs vmw_sou_connector_funcs = {
347 .dpms = vmw_du_connector_dpms,
348 .detect = vmw_du_connector_detect,
349 .fill_modes = vmw_du_connector_fill_modes,
350 .destroy = vmw_sou_connector_destroy,
351 .reset = vmw_du_connector_reset,
352 .atomic_duplicate_state = vmw_du_connector_duplicate_state,
353 .atomic_destroy_state = vmw_du_connector_destroy_state,
354 };
355
356
357 static const struct
358 drm_connector_helper_funcs vmw_sou_connector_helper_funcs = {
359 };
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375
376
377 static void
378 vmw_sou_primary_plane_cleanup_fb(struct drm_plane *plane,
379 struct drm_plane_state *old_state)
380 {
381 struct vmw_plane_state *vps = vmw_plane_state_to_vps(old_state);
382 struct drm_crtc *crtc = plane->state->crtc ?
383 plane->state->crtc : old_state->crtc;
384
385 if (vps->bo)
386 vmw_bo_unpin(vmw_priv(crtc->dev), vps->bo, false);
387 vmw_bo_unreference(&vps->bo);
388 vps->bo_size = 0;
389
390 vmw_du_plane_cleanup_fb(plane, old_state);
391 }
392
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401
402
403
404 static int
405 vmw_sou_primary_plane_prepare_fb(struct drm_plane *plane,
406 struct drm_plane_state *new_state)
407 {
408 struct drm_framebuffer *new_fb = new_state->fb;
409 struct drm_crtc *crtc = plane->state->crtc ?: new_state->crtc;
410 struct vmw_plane_state *vps = vmw_plane_state_to_vps(new_state);
411 struct vmw_private *dev_priv;
412 size_t size;
413 int ret;
414
415
416 if (!new_fb) {
417 vmw_bo_unreference(&vps->bo);
418 vps->bo_size = 0;
419
420 return 0;
421 }
422
423 size = new_state->crtc_w * new_state->crtc_h * 4;
424 dev_priv = vmw_priv(crtc->dev);
425
426 if (vps->bo) {
427 if (vps->bo_size == size) {
428
429
430
431
432 return vmw_bo_pin_in_vram(dev_priv, vps->bo,
433 true);
434 }
435
436 vmw_bo_unreference(&vps->bo);
437 vps->bo_size = 0;
438 }
439
440 vps->bo = kzalloc(sizeof(*vps->bo), GFP_KERNEL);
441 if (!vps->bo)
442 return -ENOMEM;
443
444 vmw_svga_enable(dev_priv);
445
446
447
448
449 vmw_overlay_pause_all(dev_priv);
450 ret = vmw_bo_init(dev_priv, vps->bo, size,
451 &vmw_vram_ne_placement,
452 false, &vmw_bo_bo_free);
453 vmw_overlay_resume_all(dev_priv);
454 if (ret) {
455 vps->bo = NULL;
456 return ret;
457 }
458
459 vps->bo_size = size;
460
461
462
463
464
465 return vmw_bo_pin_in_vram(dev_priv, vps->bo, true);
466 }
467
468 static uint32_t vmw_sou_bo_fifo_size(struct vmw_du_update_plane *update,
469 uint32_t num_hits)
470 {
471 return sizeof(struct vmw_kms_sou_define_gmrfb) +
472 sizeof(struct vmw_kms_sou_bo_blit) * num_hits;
473 }
474
475 static uint32_t vmw_sou_bo_define_gmrfb(struct vmw_du_update_plane *update,
476 void *cmd)
477 {
478 struct vmw_framebuffer_bo *vfbbo =
479 container_of(update->vfb, typeof(*vfbbo), base);
480 struct vmw_kms_sou_define_gmrfb *gmr = cmd;
481 int depth = update->vfb->base.format->depth;
482
483
484
485
486
487 if (depth == 32)
488 depth = 24;
489
490 gmr->header = SVGA_CMD_DEFINE_GMRFB;
491
492 gmr->body.format.bitsPerPixel = update->vfb->base.format->cpp[0] * 8;
493 gmr->body.format.colorDepth = depth;
494 gmr->body.format.reserved = 0;
495 gmr->body.bytesPerLine = update->vfb->base.pitches[0];
496 vmw_bo_get_guest_ptr(&vfbbo->buffer->base, &gmr->body.ptr);
497
498 return sizeof(*gmr);
499 }
500
501 static uint32_t vmw_sou_bo_populate_clip(struct vmw_du_update_plane *update,
502 void *cmd, struct drm_rect *clip,
503 uint32_t fb_x, uint32_t fb_y)
504 {
505 struct vmw_kms_sou_bo_blit *blit = cmd;
506
507 blit->header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
508 blit->body.destScreenId = update->du->unit;
509 blit->body.srcOrigin.x = fb_x;
510 blit->body.srcOrigin.y = fb_y;
511 blit->body.destRect.left = clip->x1;
512 blit->body.destRect.top = clip->y1;
513 blit->body.destRect.right = clip->x2;
514 blit->body.destRect.bottom = clip->y2;
515
516 return sizeof(*blit);
517 }
518
519 static uint32_t vmw_stud_bo_post_clip(struct vmw_du_update_plane *update,
520 void *cmd, struct drm_rect *bb)
521 {
522 return 0;
523 }
524
525
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527
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529
530
531
532
533
534
535
536
537 static int vmw_sou_plane_update_bo(struct vmw_private *dev_priv,
538 struct drm_plane *plane,
539 struct drm_plane_state *old_state,
540 struct vmw_framebuffer *vfb,
541 struct vmw_fence_obj **out_fence)
542 {
543 struct vmw_du_update_plane_buffer bo_update;
544
545 memset(&bo_update, 0, sizeof(struct vmw_du_update_plane_buffer));
546 bo_update.base.plane = plane;
547 bo_update.base.old_state = old_state;
548 bo_update.base.dev_priv = dev_priv;
549 bo_update.base.du = vmw_crtc_to_du(plane->state->crtc);
550 bo_update.base.vfb = vfb;
551 bo_update.base.out_fence = out_fence;
552 bo_update.base.mutex = NULL;
553 bo_update.base.cpu_blit = false;
554 bo_update.base.intr = true;
555
556 bo_update.base.calc_fifo_size = vmw_sou_bo_fifo_size;
557 bo_update.base.post_prepare = vmw_sou_bo_define_gmrfb;
558 bo_update.base.clip = vmw_sou_bo_populate_clip;
559 bo_update.base.post_clip = vmw_stud_bo_post_clip;
560
561 return vmw_du_helper_plane_update(&bo_update.base);
562 }
563
564 static uint32_t vmw_sou_surface_fifo_size(struct vmw_du_update_plane *update,
565 uint32_t num_hits)
566 {
567 return sizeof(struct vmw_kms_sou_dirty_cmd) + sizeof(SVGASignedRect) *
568 num_hits;
569 }
570
571 static uint32_t vmw_sou_surface_post_prepare(struct vmw_du_update_plane *update,
572 void *cmd)
573 {
574 struct vmw_du_update_plane_surface *srf_update;
575
576 srf_update = container_of(update, typeof(*srf_update), base);
577
578
579
580
581
582
583 srf_update->cmd_start = cmd;
584
585 return 0;
586 }
587
588 static uint32_t vmw_sou_surface_pre_clip(struct vmw_du_update_plane *update,
589 void *cmd, uint32_t num_hits)
590 {
591 struct vmw_kms_sou_dirty_cmd *blit = cmd;
592 struct vmw_framebuffer_surface *vfbs;
593
594 vfbs = container_of(update->vfb, typeof(*vfbs), base);
595
596 blit->header.id = SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN;
597 blit->header.size = sizeof(blit->body) + sizeof(SVGASignedRect) *
598 num_hits;
599
600 blit->body.srcImage.sid = vfbs->surface->res.id;
601 blit->body.destScreenId = update->du->unit;
602
603
604 blit->body.srcRect.left = 0;
605 blit->body.srcRect.top = 0;
606 blit->body.srcRect.right = 0;
607 blit->body.srcRect.bottom = 0;
608
609 blit->body.destRect.left = 0;
610 blit->body.destRect.top = 0;
611 blit->body.destRect.right = 0;
612 blit->body.destRect.bottom = 0;
613
614 return sizeof(*blit);
615 }
616
617 static uint32_t vmw_sou_surface_clip_rect(struct vmw_du_update_plane *update,
618 void *cmd, struct drm_rect *clip,
619 uint32_t src_x, uint32_t src_y)
620 {
621 SVGASignedRect *rect = cmd;
622
623
624
625
626
627 rect->left = clip->x1;
628 rect->top = clip->y1;
629 rect->right = clip->x2;
630 rect->bottom = clip->y2;
631
632 return sizeof(*rect);
633 }
634
635 static uint32_t vmw_sou_surface_post_clip(struct vmw_du_update_plane *update,
636 void *cmd, struct drm_rect *bb)
637 {
638 struct vmw_du_update_plane_surface *srf_update;
639 struct drm_plane_state *state = update->plane->state;
640 struct drm_rect src_bb;
641 struct vmw_kms_sou_dirty_cmd *blit;
642 SVGASignedRect *rect;
643 uint32_t num_hits;
644 int translate_src_x;
645 int translate_src_y;
646 int i;
647
648 srf_update = container_of(update, typeof(*srf_update), base);
649
650 blit = srf_update->cmd_start;
651 rect = (SVGASignedRect *)&blit[1];
652
653 num_hits = (blit->header.size - sizeof(blit->body))/
654 sizeof(SVGASignedRect);
655
656 src_bb = *bb;
657
658
659 translate_src_x = (state->src_x >> 16) - state->crtc_x;
660 translate_src_y = (state->src_y >> 16) - state->crtc_y;
661
662 drm_rect_translate(&src_bb, translate_src_x, translate_src_y);
663
664 blit->body.srcRect.left = src_bb.x1;
665 blit->body.srcRect.top = src_bb.y1;
666 blit->body.srcRect.right = src_bb.x2;
667 blit->body.srcRect.bottom = src_bb.y2;
668
669 blit->body.destRect.left = bb->x1;
670 blit->body.destRect.top = bb->y1;
671 blit->body.destRect.right = bb->x2;
672 blit->body.destRect.bottom = bb->y2;
673
674
675 for (i = 0; i < num_hits; i++) {
676 rect->left -= bb->x1;
677 rect->top -= bb->y1;
678 rect->right -= bb->x1;
679 rect->bottom -= bb->y1;
680 rect++;
681 }
682
683 return 0;
684 }
685
686
687
688
689
690
691
692
693
694
695
696
697
698 static int vmw_sou_plane_update_surface(struct vmw_private *dev_priv,
699 struct drm_plane *plane,
700 struct drm_plane_state *old_state,
701 struct vmw_framebuffer *vfb,
702 struct vmw_fence_obj **out_fence)
703 {
704 struct vmw_du_update_plane_surface srf_update;
705
706 memset(&srf_update, 0, sizeof(struct vmw_du_update_plane_surface));
707 srf_update.base.plane = plane;
708 srf_update.base.old_state = old_state;
709 srf_update.base.dev_priv = dev_priv;
710 srf_update.base.du = vmw_crtc_to_du(plane->state->crtc);
711 srf_update.base.vfb = vfb;
712 srf_update.base.out_fence = out_fence;
713 srf_update.base.mutex = &dev_priv->cmdbuf_mutex;
714 srf_update.base.cpu_blit = false;
715 srf_update.base.intr = true;
716
717 srf_update.base.calc_fifo_size = vmw_sou_surface_fifo_size;
718 srf_update.base.post_prepare = vmw_sou_surface_post_prepare;
719 srf_update.base.pre_clip = vmw_sou_surface_pre_clip;
720 srf_update.base.clip = vmw_sou_surface_clip_rect;
721 srf_update.base.post_clip = vmw_sou_surface_post_clip;
722
723 return vmw_du_helper_plane_update(&srf_update.base);
724 }
725
726 static void
727 vmw_sou_primary_plane_atomic_update(struct drm_plane *plane,
728 struct drm_plane_state *old_state)
729 {
730 struct drm_crtc *crtc = plane->state->crtc;
731 struct drm_pending_vblank_event *event = NULL;
732 struct vmw_fence_obj *fence = NULL;
733 int ret;
734
735
736 if (crtc && plane->state->fb) {
737 struct vmw_private *dev_priv = vmw_priv(crtc->dev);
738 struct vmw_framebuffer *vfb =
739 vmw_framebuffer_to_vfb(plane->state->fb);
740
741 if (vfb->bo)
742 ret = vmw_sou_plane_update_bo(dev_priv, plane,
743 old_state, vfb, &fence);
744 else
745 ret = vmw_sou_plane_update_surface(dev_priv, plane,
746 old_state, vfb,
747 &fence);
748 if (ret != 0)
749 DRM_ERROR("Failed to update screen.\n");
750 } else {
751
752 return;
753 }
754
755
756 event = crtc->state->event;
757 if (event && fence) {
758 struct drm_file *file_priv = event->base.file_priv;
759
760 ret = vmw_event_fence_action_queue(file_priv,
761 fence,
762 &event->base,
763 &event->event.vbl.tv_sec,
764 &event->event.vbl.tv_usec,
765 true);
766
767 if (unlikely(ret != 0))
768 DRM_ERROR("Failed to queue event on fence.\n");
769 else
770 crtc->state->event = NULL;
771 }
772
773 if (fence)
774 vmw_fence_obj_unreference(&fence);
775 }
776
777
778 static const struct drm_plane_funcs vmw_sou_plane_funcs = {
779 .update_plane = drm_atomic_helper_update_plane,
780 .disable_plane = drm_atomic_helper_disable_plane,
781 .destroy = vmw_du_primary_plane_destroy,
782 .reset = vmw_du_plane_reset,
783 .atomic_duplicate_state = vmw_du_plane_duplicate_state,
784 .atomic_destroy_state = vmw_du_plane_destroy_state,
785 };
786
787 static const struct drm_plane_funcs vmw_sou_cursor_funcs = {
788 .update_plane = drm_atomic_helper_update_plane,
789 .disable_plane = drm_atomic_helper_disable_plane,
790 .destroy = vmw_du_cursor_plane_destroy,
791 .reset = vmw_du_plane_reset,
792 .atomic_duplicate_state = vmw_du_plane_duplicate_state,
793 .atomic_destroy_state = vmw_du_plane_destroy_state,
794 };
795
796
797
798
799 static const struct
800 drm_plane_helper_funcs vmw_sou_cursor_plane_helper_funcs = {
801 .atomic_check = vmw_du_cursor_plane_atomic_check,
802 .atomic_update = vmw_du_cursor_plane_atomic_update,
803 .prepare_fb = vmw_du_cursor_plane_prepare_fb,
804 .cleanup_fb = vmw_du_plane_cleanup_fb,
805 };
806
807 static const struct
808 drm_plane_helper_funcs vmw_sou_primary_plane_helper_funcs = {
809 .atomic_check = vmw_du_primary_plane_atomic_check,
810 .atomic_update = vmw_sou_primary_plane_atomic_update,
811 .prepare_fb = vmw_sou_primary_plane_prepare_fb,
812 .cleanup_fb = vmw_sou_primary_plane_cleanup_fb,
813 };
814
815 static const struct drm_crtc_helper_funcs vmw_sou_crtc_helper_funcs = {
816 .prepare = vmw_sou_crtc_helper_prepare,
817 .mode_set_nofb = vmw_sou_crtc_mode_set_nofb,
818 .atomic_check = vmw_du_crtc_atomic_check,
819 .atomic_begin = vmw_du_crtc_atomic_begin,
820 .atomic_flush = vmw_du_crtc_atomic_flush,
821 .atomic_enable = vmw_sou_crtc_atomic_enable,
822 .atomic_disable = vmw_sou_crtc_atomic_disable,
823 };
824
825
826 static int vmw_sou_init(struct vmw_private *dev_priv, unsigned unit)
827 {
828 struct vmw_screen_object_unit *sou;
829 struct drm_device *dev = dev_priv->dev;
830 struct drm_connector *connector;
831 struct drm_encoder *encoder;
832 struct drm_plane *primary, *cursor;
833 struct drm_crtc *crtc;
834 int ret;
835
836 sou = kzalloc(sizeof(*sou), GFP_KERNEL);
837 if (!sou)
838 return -ENOMEM;
839
840 sou->base.unit = unit;
841 crtc = &sou->base.crtc;
842 encoder = &sou->base.encoder;
843 connector = &sou->base.connector;
844 primary = &sou->base.primary;
845 cursor = &sou->base.cursor;
846
847 sou->base.pref_active = (unit == 0);
848 sou->base.pref_width = dev_priv->initial_width;
849 sou->base.pref_height = dev_priv->initial_height;
850 sou->base.pref_mode = NULL;
851
852
853
854
855
856 sou->base.is_implicit = false;
857
858
859 vmw_du_plane_reset(primary);
860
861 ret = drm_universal_plane_init(dev, &sou->base.primary,
862 0, &vmw_sou_plane_funcs,
863 vmw_primary_plane_formats,
864 ARRAY_SIZE(vmw_primary_plane_formats),
865 NULL, DRM_PLANE_TYPE_PRIMARY, NULL);
866 if (ret) {
867 DRM_ERROR("Failed to initialize primary plane");
868 goto err_free;
869 }
870
871 drm_plane_helper_add(primary, &vmw_sou_primary_plane_helper_funcs);
872 drm_plane_enable_fb_damage_clips(primary);
873
874
875 vmw_du_plane_reset(cursor);
876
877 ret = drm_universal_plane_init(dev, &sou->base.cursor,
878 0, &vmw_sou_cursor_funcs,
879 vmw_cursor_plane_formats,
880 ARRAY_SIZE(vmw_cursor_plane_formats),
881 NULL, DRM_PLANE_TYPE_CURSOR, NULL);
882 if (ret) {
883 DRM_ERROR("Failed to initialize cursor plane");
884 drm_plane_cleanup(&sou->base.primary);
885 goto err_free;
886 }
887
888 drm_plane_helper_add(cursor, &vmw_sou_cursor_plane_helper_funcs);
889
890 vmw_du_connector_reset(connector);
891 ret = drm_connector_init(dev, connector, &vmw_sou_connector_funcs,
892 DRM_MODE_CONNECTOR_VIRTUAL);
893 if (ret) {
894 DRM_ERROR("Failed to initialize connector\n");
895 goto err_free;
896 }
897
898 drm_connector_helper_add(connector, &vmw_sou_connector_helper_funcs);
899 connector->status = vmw_du_connector_detect(connector, true);
900
901 ret = drm_encoder_init(dev, encoder, &vmw_screen_object_encoder_funcs,
902 DRM_MODE_ENCODER_VIRTUAL, NULL);
903 if (ret) {
904 DRM_ERROR("Failed to initialize encoder\n");
905 goto err_free_connector;
906 }
907
908 (void) drm_connector_attach_encoder(connector, encoder);
909 encoder->possible_crtcs = (1 << unit);
910 encoder->possible_clones = 0;
911
912 ret = drm_connector_register(connector);
913 if (ret) {
914 DRM_ERROR("Failed to register connector\n");
915 goto err_free_encoder;
916 }
917
918
919 vmw_du_crtc_reset(crtc);
920 ret = drm_crtc_init_with_planes(dev, crtc, &sou->base.primary,
921 &sou->base.cursor,
922 &vmw_screen_object_crtc_funcs, NULL);
923 if (ret) {
924 DRM_ERROR("Failed to initialize CRTC\n");
925 goto err_free_unregister;
926 }
927
928 drm_crtc_helper_add(crtc, &vmw_sou_crtc_helper_funcs);
929
930 drm_mode_crtc_set_gamma_size(crtc, 256);
931
932 drm_object_attach_property(&connector->base,
933 dev_priv->hotplug_mode_update_property, 1);
934 drm_object_attach_property(&connector->base,
935 dev->mode_config.suggested_x_property, 0);
936 drm_object_attach_property(&connector->base,
937 dev->mode_config.suggested_y_property, 0);
938 return 0;
939
940 err_free_unregister:
941 drm_connector_unregister(connector);
942 err_free_encoder:
943 drm_encoder_cleanup(encoder);
944 err_free_connector:
945 drm_connector_cleanup(connector);
946 err_free:
947 kfree(sou);
948 return ret;
949 }
950
951 int vmw_kms_sou_init_display(struct vmw_private *dev_priv)
952 {
953 struct drm_device *dev = dev_priv->dev;
954 int i, ret;
955
956 if (!(dev_priv->capabilities & SVGA_CAP_SCREEN_OBJECT_2)) {
957 DRM_INFO("Not using screen objects,"
958 " missing cap SCREEN_OBJECT_2\n");
959 return -ENOSYS;
960 }
961
962 ret = -ENOMEM;
963
964 ret = drm_vblank_init(dev, VMWGFX_NUM_DISPLAY_UNITS);
965 if (unlikely(ret != 0))
966 return ret;
967
968 for (i = 0; i < VMWGFX_NUM_DISPLAY_UNITS; ++i)
969 vmw_sou_init(dev_priv, i);
970
971 dev_priv->active_display_unit = vmw_du_screen_object;
972
973 DRM_INFO("Screen Objects Display Unit initialized\n");
974
975 return 0;
976 }
977
978 static int do_bo_define_gmrfb(struct vmw_private *dev_priv,
979 struct vmw_framebuffer *framebuffer)
980 {
981 struct vmw_buffer_object *buf =
982 container_of(framebuffer, struct vmw_framebuffer_bo,
983 base)->buffer;
984 int depth = framebuffer->base.format->depth;
985 struct {
986 uint32_t header;
987 SVGAFifoCmdDefineGMRFB body;
988 } *cmd;
989
990
991
992
993
994 if (depth == 32)
995 depth = 24;
996
997 cmd = VMW_FIFO_RESERVE(dev_priv, sizeof(*cmd));
998 if (!cmd)
999 return -ENOMEM;
1000
1001 cmd->header = SVGA_CMD_DEFINE_GMRFB;
1002 cmd->body.format.bitsPerPixel = framebuffer->base.format->cpp[0] * 8;
1003 cmd->body.format.colorDepth = depth;
1004 cmd->body.format.reserved = 0;
1005 cmd->body.bytesPerLine = framebuffer->base.pitches[0];
1006
1007 vmw_bo_get_guest_ptr(&buf->base, &cmd->body.ptr);
1008 vmw_fifo_commit(dev_priv, sizeof(*cmd));
1009
1010 return 0;
1011 }
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022 static void vmw_sou_surface_fifo_commit(struct vmw_kms_dirty *dirty)
1023 {
1024 struct vmw_kms_sou_surface_dirty *sdirty =
1025 container_of(dirty, typeof(*sdirty), base);
1026 struct vmw_kms_sou_dirty_cmd *cmd = dirty->cmd;
1027 s32 trans_x = dirty->unit->crtc.x - sdirty->dst_x;
1028 s32 trans_y = dirty->unit->crtc.y - sdirty->dst_y;
1029 size_t region_size = dirty->num_hits * sizeof(SVGASignedRect);
1030 SVGASignedRect *blit = (SVGASignedRect *) &cmd[1];
1031 int i;
1032
1033 if (!dirty->num_hits) {
1034 vmw_fifo_commit(dirty->dev_priv, 0);
1035 return;
1036 }
1037
1038 cmd->header.id = SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN;
1039 cmd->header.size = sizeof(cmd->body) + region_size;
1040
1041
1042
1043
1044
1045 cmd->body.destRect.left = sdirty->left;
1046 cmd->body.destRect.right = sdirty->right;
1047 cmd->body.destRect.top = sdirty->top;
1048 cmd->body.destRect.bottom = sdirty->bottom;
1049
1050 cmd->body.srcRect.left = sdirty->left + trans_x;
1051 cmd->body.srcRect.right = sdirty->right + trans_x;
1052 cmd->body.srcRect.top = sdirty->top + trans_y;
1053 cmd->body.srcRect.bottom = sdirty->bottom + trans_y;
1054
1055 cmd->body.srcImage.sid = sdirty->sid;
1056 cmd->body.destScreenId = dirty->unit->unit;
1057
1058
1059 for (i = 0; i < dirty->num_hits; ++i, ++blit) {
1060 blit->left -= sdirty->left;
1061 blit->right -= sdirty->left;
1062 blit->top -= sdirty->top;
1063 blit->bottom -= sdirty->top;
1064 }
1065
1066 vmw_fifo_commit(dirty->dev_priv, region_size + sizeof(*cmd));
1067
1068 sdirty->left = sdirty->top = S32_MAX;
1069 sdirty->right = sdirty->bottom = S32_MIN;
1070 }
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080 static void vmw_sou_surface_clip(struct vmw_kms_dirty *dirty)
1081 {
1082 struct vmw_kms_sou_surface_dirty *sdirty =
1083 container_of(dirty, typeof(*sdirty), base);
1084 struct vmw_kms_sou_dirty_cmd *cmd = dirty->cmd;
1085 SVGASignedRect *blit = (SVGASignedRect *) &cmd[1];
1086
1087
1088 blit += dirty->num_hits;
1089 blit->left = dirty->unit_x1;
1090 blit->top = dirty->unit_y1;
1091 blit->right = dirty->unit_x2;
1092 blit->bottom = dirty->unit_y2;
1093
1094
1095 sdirty->left = min_t(s32, sdirty->left, dirty->unit_x1);
1096 sdirty->top = min_t(s32, sdirty->top, dirty->unit_y1);
1097 sdirty->right = max_t(s32, sdirty->right, dirty->unit_x2);
1098 sdirty->bottom = max_t(s32, sdirty->bottom, dirty->unit_y2);
1099
1100 dirty->num_hits++;
1101 }
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125 int vmw_kms_sou_do_surface_dirty(struct vmw_private *dev_priv,
1126 struct vmw_framebuffer *framebuffer,
1127 struct drm_clip_rect *clips,
1128 struct drm_vmw_rect *vclips,
1129 struct vmw_resource *srf,
1130 s32 dest_x,
1131 s32 dest_y,
1132 unsigned num_clips, int inc,
1133 struct vmw_fence_obj **out_fence,
1134 struct drm_crtc *crtc)
1135 {
1136 struct vmw_framebuffer_surface *vfbs =
1137 container_of(framebuffer, typeof(*vfbs), base);
1138 struct vmw_kms_sou_surface_dirty sdirty;
1139 DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
1140 int ret;
1141
1142 if (!srf)
1143 srf = &vfbs->surface->res;
1144
1145 ret = vmw_validation_add_resource(&val_ctx, srf, 0, VMW_RES_DIRTY_NONE,
1146 NULL, NULL);
1147 if (ret)
1148 return ret;
1149
1150 ret = vmw_validation_prepare(&val_ctx, &dev_priv->cmdbuf_mutex, true);
1151 if (ret)
1152 goto out_unref;
1153
1154 sdirty.base.fifo_commit = vmw_sou_surface_fifo_commit;
1155 sdirty.base.clip = vmw_sou_surface_clip;
1156 sdirty.base.dev_priv = dev_priv;
1157 sdirty.base.fifo_reserve_size = sizeof(struct vmw_kms_sou_dirty_cmd) +
1158 sizeof(SVGASignedRect) * num_clips;
1159 sdirty.base.crtc = crtc;
1160
1161 sdirty.sid = srf->id;
1162 sdirty.left = sdirty.top = S32_MAX;
1163 sdirty.right = sdirty.bottom = S32_MIN;
1164 sdirty.dst_x = dest_x;
1165 sdirty.dst_y = dest_y;
1166
1167 ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips,
1168 dest_x, dest_y, num_clips, inc,
1169 &sdirty.base);
1170 vmw_kms_helper_validation_finish(dev_priv, NULL, &val_ctx, out_fence,
1171 NULL);
1172
1173 return ret;
1174
1175 out_unref:
1176 vmw_validation_unref_lists(&val_ctx);
1177 return ret;
1178 }
1179
1180
1181
1182
1183
1184
1185
1186
1187 static void vmw_sou_bo_fifo_commit(struct vmw_kms_dirty *dirty)
1188 {
1189 if (!dirty->num_hits) {
1190 vmw_fifo_commit(dirty->dev_priv, 0);
1191 return;
1192 }
1193
1194 vmw_fifo_commit(dirty->dev_priv,
1195 sizeof(struct vmw_kms_sou_bo_blit) *
1196 dirty->num_hits);
1197 }
1198
1199
1200
1201
1202
1203
1204
1205
1206 static void vmw_sou_bo_clip(struct vmw_kms_dirty *dirty)
1207 {
1208 struct vmw_kms_sou_bo_blit *blit = dirty->cmd;
1209
1210 blit += dirty->num_hits;
1211 blit->header = SVGA_CMD_BLIT_GMRFB_TO_SCREEN;
1212 blit->body.destScreenId = dirty->unit->unit;
1213 blit->body.srcOrigin.x = dirty->fb_x;
1214 blit->body.srcOrigin.y = dirty->fb_y;
1215 blit->body.destRect.left = dirty->unit_x1;
1216 blit->body.destRect.top = dirty->unit_y1;
1217 blit->body.destRect.right = dirty->unit_x2;
1218 blit->body.destRect.bottom = dirty->unit_y2;
1219 dirty->num_hits++;
1220 }
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241 int vmw_kms_sou_do_bo_dirty(struct vmw_private *dev_priv,
1242 struct vmw_framebuffer *framebuffer,
1243 struct drm_clip_rect *clips,
1244 struct drm_vmw_rect *vclips,
1245 unsigned num_clips, int increment,
1246 bool interruptible,
1247 struct vmw_fence_obj **out_fence,
1248 struct drm_crtc *crtc)
1249 {
1250 struct vmw_buffer_object *buf =
1251 container_of(framebuffer, struct vmw_framebuffer_bo,
1252 base)->buffer;
1253 struct vmw_kms_dirty dirty;
1254 DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
1255 int ret;
1256
1257 ret = vmw_validation_add_bo(&val_ctx, buf, false, false);
1258 if (ret)
1259 return ret;
1260
1261 ret = vmw_validation_prepare(&val_ctx, NULL, interruptible);
1262 if (ret)
1263 goto out_unref;
1264
1265 ret = do_bo_define_gmrfb(dev_priv, framebuffer);
1266 if (unlikely(ret != 0))
1267 goto out_revert;
1268
1269 dirty.crtc = crtc;
1270 dirty.fifo_commit = vmw_sou_bo_fifo_commit;
1271 dirty.clip = vmw_sou_bo_clip;
1272 dirty.fifo_reserve_size = sizeof(struct vmw_kms_sou_bo_blit) *
1273 num_clips;
1274 ret = vmw_kms_helper_dirty(dev_priv, framebuffer, clips, vclips,
1275 0, 0, num_clips, increment, &dirty);
1276 vmw_kms_helper_validation_finish(dev_priv, NULL, &val_ctx, out_fence,
1277 NULL);
1278
1279 return ret;
1280
1281 out_revert:
1282 vmw_validation_revert(&val_ctx);
1283 out_unref:
1284 vmw_validation_unref_lists(&val_ctx);
1285
1286 return ret;
1287 }
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297 static void vmw_sou_readback_fifo_commit(struct vmw_kms_dirty *dirty)
1298 {
1299 if (!dirty->num_hits) {
1300 vmw_fifo_commit(dirty->dev_priv, 0);
1301 return;
1302 }
1303
1304 vmw_fifo_commit(dirty->dev_priv,
1305 sizeof(struct vmw_kms_sou_readback_blit) *
1306 dirty->num_hits);
1307 }
1308
1309
1310
1311
1312
1313
1314
1315
1316 static void vmw_sou_readback_clip(struct vmw_kms_dirty *dirty)
1317 {
1318 struct vmw_kms_sou_readback_blit *blit = dirty->cmd;
1319
1320 blit += dirty->num_hits;
1321 blit->header = SVGA_CMD_BLIT_SCREEN_TO_GMRFB;
1322 blit->body.srcScreenId = dirty->unit->unit;
1323 blit->body.destOrigin.x = dirty->fb_x;
1324 blit->body.destOrigin.y = dirty->fb_y;
1325 blit->body.srcRect.left = dirty->unit_x1;
1326 blit->body.srcRect.top = dirty->unit_y1;
1327 blit->body.srcRect.right = dirty->unit_x2;
1328 blit->body.srcRect.bottom = dirty->unit_y2;
1329 dirty->num_hits++;
1330 }
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349 int vmw_kms_sou_readback(struct vmw_private *dev_priv,
1350 struct drm_file *file_priv,
1351 struct vmw_framebuffer *vfb,
1352 struct drm_vmw_fence_rep __user *user_fence_rep,
1353 struct drm_vmw_rect *vclips,
1354 uint32_t num_clips,
1355 struct drm_crtc *crtc)
1356 {
1357 struct vmw_buffer_object *buf =
1358 container_of(vfb, struct vmw_framebuffer_bo, base)->buffer;
1359 struct vmw_kms_dirty dirty;
1360 DECLARE_VAL_CONTEXT(val_ctx, NULL, 0);
1361 int ret;
1362
1363 ret = vmw_validation_add_bo(&val_ctx, buf, false, false);
1364 if (ret)
1365 return ret;
1366
1367 ret = vmw_validation_prepare(&val_ctx, NULL, true);
1368 if (ret)
1369 goto out_unref;
1370
1371 ret = do_bo_define_gmrfb(dev_priv, vfb);
1372 if (unlikely(ret != 0))
1373 goto out_revert;
1374
1375 dirty.crtc = crtc;
1376 dirty.fifo_commit = vmw_sou_readback_fifo_commit;
1377 dirty.clip = vmw_sou_readback_clip;
1378 dirty.fifo_reserve_size = sizeof(struct vmw_kms_sou_readback_blit) *
1379 num_clips;
1380 ret = vmw_kms_helper_dirty(dev_priv, vfb, NULL, vclips,
1381 0, 0, num_clips, 1, &dirty);
1382 vmw_kms_helper_validation_finish(dev_priv, file_priv, &val_ctx, NULL,
1383 user_fence_rep);
1384
1385 return ret;
1386
1387 out_revert:
1388 vmw_validation_revert(&val_ctx);
1389 out_unref:
1390 vmw_validation_unref_lists(&val_ctx);
1391
1392 return ret;
1393 }