drivers/gpu/drm/radeon/r300d.h

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   1 /*
   2  * Copyright 2008 Advanced Micro Devices, Inc.
   3  * Copyright 2008 Red Hat Inc.
   4  * Copyright 2009 Jerome Glisse.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included in
  14  * all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22  * OTHER DEALINGS IN THE SOFTWARE.
  23  *
  24  * Authors: Dave Airlie
  25  *          Alex Deucher
  26  *          Jerome Glisse
  27  */
  28 #ifndef __R300D_H__
  29 #define __R300D_H__
  30 
  31 #define CP_PACKET0                      0x00000000
  32 #define         PACKET0_BASE_INDEX_SHIFT        0
  33 #define         PACKET0_BASE_INDEX_MASK         (0x1ffff << 0)
  34 #define         PACKET0_COUNT_SHIFT             16
  35 #define         PACKET0_COUNT_MASK              (0x3fff << 16)
  36 #define CP_PACKET1                      0x40000000
  37 #define CP_PACKET2                      0x80000000
  38 #define         PACKET2_PAD_SHIFT               0
  39 #define         PACKET2_PAD_MASK                (0x3fffffff << 0)
  40 #define CP_PACKET3                      0xC0000000
  41 #define         PACKET3_IT_OPCODE_SHIFT         8
  42 #define         PACKET3_IT_OPCODE_MASK          (0xff << 8)
  43 #define         PACKET3_COUNT_SHIFT             16
  44 #define         PACKET3_COUNT_MASK              (0x3fff << 16)
  45 /* PACKET3 op code */
  46 #define         PACKET3_NOP                     0x10
  47 #define         PACKET3_3D_DRAW_VBUF            0x28
  48 #define         PACKET3_3D_DRAW_IMMD            0x29
  49 #define         PACKET3_3D_DRAW_INDX            0x2A
  50 #define         PACKET3_3D_LOAD_VBPNTR          0x2F
  51 #define         PACKET3_3D_CLEAR_ZMASK          0x32
  52 #define         PACKET3_INDX_BUFFER             0x33
  53 #define         PACKET3_3D_DRAW_VBUF_2          0x34
  54 #define         PACKET3_3D_DRAW_IMMD_2          0x35
  55 #define         PACKET3_3D_DRAW_INDX_2          0x36
  56 #define         PACKET3_3D_CLEAR_HIZ            0x37
  57 #define         PACKET3_3D_CLEAR_CMASK          0x38
  58 #define         PACKET3_BITBLT_MULTI            0x9B
  59 
  60 #define PACKET0(reg, n) (CP_PACKET0 |                                   \
  61                          REG_SET(PACKET0_BASE_INDEX, (reg) >> 2) |      \
  62                          REG_SET(PACKET0_COUNT, (n)))
  63 #define PACKET2(v)      (CP_PACKET2 | REG_SET(PACKET2_PAD, (v)))
  64 #define PACKET3(op, n)  (CP_PACKET3 |                                   \
  65                          REG_SET(PACKET3_IT_OPCODE, (op)) |             \
  66                          REG_SET(PACKET3_COUNT, (n)))
  67 
  68 /* Registers */
  69 #define R_000148_MC_FB_LOCATION                      0x000148
  70 #define   S_000148_MC_FB_START(x)                      (((x) & 0xFFFF) << 0)
  71 #define   G_000148_MC_FB_START(x)                      (((x) >> 0) & 0xFFFF)
  72 #define   C_000148_MC_FB_START                         0xFFFF0000
  73 #define   S_000148_MC_FB_TOP(x)                        (((x) & 0xFFFF) << 16)
  74 #define   G_000148_MC_FB_TOP(x)                        (((x) >> 16) & 0xFFFF)
  75 #define   C_000148_MC_FB_TOP                           0x0000FFFF
  76 #define R_00014C_MC_AGP_LOCATION                     0x00014C
  77 #define   S_00014C_MC_AGP_START(x)                     (((x) & 0xFFFF) << 0)
  78 #define   G_00014C_MC_AGP_START(x)                     (((x) >> 0) & 0xFFFF)
  79 #define   C_00014C_MC_AGP_START                        0xFFFF0000
  80 #define   S_00014C_MC_AGP_TOP(x)                       (((x) & 0xFFFF) << 16)
  81 #define   G_00014C_MC_AGP_TOP(x)                       (((x) >> 16) & 0xFFFF)
  82 #define   C_00014C_MC_AGP_TOP                          0x0000FFFF
  83 #define R_00015C_AGP_BASE_2                          0x00015C
  84 #define   S_00015C_AGP_BASE_ADDR_2(x)                  (((x) & 0xF) << 0)
  85 #define   G_00015C_AGP_BASE_ADDR_2(x)                  (((x) >> 0) & 0xF)
  86 #define   C_00015C_AGP_BASE_ADDR_2                     0xFFFFFFF0
  87 #define R_000170_AGP_BASE                            0x000170
  88 #define   S_000170_AGP_BASE_ADDR(x)                    (((x) & 0xFFFFFFFF) << 0)
  89 #define   G_000170_AGP_BASE_ADDR(x)                    (((x) >> 0) & 0xFFFFFFFF)
  90 #define   C_000170_AGP_BASE_ADDR                       0x00000000
  91 #define R_0007C0_CP_STAT                             0x0007C0
  92 #define   S_0007C0_MRU_BUSY(x)                         (((x) & 0x1) << 0)
  93 #define   G_0007C0_MRU_BUSY(x)                         (((x) >> 0) & 0x1)
  94 #define   C_0007C0_MRU_BUSY                            0xFFFFFFFE
  95 #define   S_0007C0_MWU_BUSY(x)                         (((x) & 0x1) << 1)
  96 #define   G_0007C0_MWU_BUSY(x)                         (((x) >> 1) & 0x1)
  97 #define   C_0007C0_MWU_BUSY                            0xFFFFFFFD
  98 #define   S_0007C0_RSIU_BUSY(x)                        (((x) & 0x1) << 2)
  99 #define   G_0007C0_RSIU_BUSY(x)                        (((x) >> 2) & 0x1)
 100 #define   C_0007C0_RSIU_BUSY                           0xFFFFFFFB
 101 #define   S_0007C0_RCIU_BUSY(x)                        (((x) & 0x1) << 3)
 102 #define   G_0007C0_RCIU_BUSY(x)                        (((x) >> 3) & 0x1)
 103 #define   C_0007C0_RCIU_BUSY                           0xFFFFFFF7
 104 #define   S_0007C0_CSF_PRIMARY_BUSY(x)                 (((x) & 0x1) << 9)
 105 #define   G_0007C0_CSF_PRIMARY_BUSY(x)                 (((x) >> 9) & 0x1)
 106 #define   C_0007C0_CSF_PRIMARY_BUSY                    0xFFFFFDFF
 107 #define   S_0007C0_CSF_INDIRECT_BUSY(x)                (((x) & 0x1) << 10)
 108 #define   G_0007C0_CSF_INDIRECT_BUSY(x)                (((x) >> 10) & 0x1)
 109 #define   C_0007C0_CSF_INDIRECT_BUSY                   0xFFFFFBFF
 110 #define   S_0007C0_CSQ_PRIMARY_BUSY(x)                 (((x) & 0x1) << 11)
 111 #define   G_0007C0_CSQ_PRIMARY_BUSY(x)                 (((x) >> 11) & 0x1)
 112 #define   C_0007C0_CSQ_PRIMARY_BUSY                    0xFFFFF7FF
 113 #define   S_0007C0_CSQ_INDIRECT_BUSY(x)                (((x) & 0x1) << 12)
 114 #define   G_0007C0_CSQ_INDIRECT_BUSY(x)                (((x) >> 12) & 0x1)
 115 #define   C_0007C0_CSQ_INDIRECT_BUSY                   0xFFFFEFFF
 116 #define   S_0007C0_CSI_BUSY(x)                         (((x) & 0x1) << 13)
 117 #define   G_0007C0_CSI_BUSY(x)                         (((x) >> 13) & 0x1)
 118 #define   C_0007C0_CSI_BUSY                            0xFFFFDFFF
 119 #define   S_0007C0_CSF_INDIRECT2_BUSY(x)               (((x) & 0x1) << 14)
 120 #define   G_0007C0_CSF_INDIRECT2_BUSY(x)               (((x) >> 14) & 0x1)
 121 #define   C_0007C0_CSF_INDIRECT2_BUSY                  0xFFFFBFFF
 122 #define   S_0007C0_CSQ_INDIRECT2_BUSY(x)               (((x) & 0x1) << 15)
 123 #define   G_0007C0_CSQ_INDIRECT2_BUSY(x)               (((x) >> 15) & 0x1)
 124 #define   C_0007C0_CSQ_INDIRECT2_BUSY                  0xFFFF7FFF
 125 #define   S_0007C0_GUIDMA_BUSY(x)                      (((x) & 0x1) << 28)
 126 #define   G_0007C0_GUIDMA_BUSY(x)                      (((x) >> 28) & 0x1)
 127 #define   C_0007C0_GUIDMA_BUSY                         0xEFFFFFFF
 128 #define   S_0007C0_VIDDMA_BUSY(x)                      (((x) & 0x1) << 29)
 129 #define   G_0007C0_VIDDMA_BUSY(x)                      (((x) >> 29) & 0x1)
 130 #define   C_0007C0_VIDDMA_BUSY                         0xDFFFFFFF
 131 #define   S_0007C0_CMDSTRM_BUSY(x)                     (((x) & 0x1) << 30)
 132 #define   G_0007C0_CMDSTRM_BUSY(x)                     (((x) >> 30) & 0x1)
 133 #define   C_0007C0_CMDSTRM_BUSY                        0xBFFFFFFF
 134 #define   S_0007C0_CP_BUSY(x)                          (((x) & 0x1) << 31)
 135 #define   G_0007C0_CP_BUSY(x)                          (((x) >> 31) & 0x1)
 136 #define   C_0007C0_CP_BUSY                             0x7FFFFFFF
 137 #define R_000E40_RBBM_STATUS                         0x000E40
 138 #define   S_000E40_CMDFIFO_AVAIL(x)                    (((x) & 0x7F) << 0)
 139 #define   G_000E40_CMDFIFO_AVAIL(x)                    (((x) >> 0) & 0x7F)
 140 #define   C_000E40_CMDFIFO_AVAIL                       0xFFFFFF80
 141 #define   S_000E40_HIRQ_ON_RBB(x)                      (((x) & 0x1) << 8)
 142 #define   G_000E40_HIRQ_ON_RBB(x)                      (((x) >> 8) & 0x1)
 143 #define   C_000E40_HIRQ_ON_RBB                         0xFFFFFEFF
 144 #define   S_000E40_CPRQ_ON_RBB(x)                      (((x) & 0x1) << 9)
 145 #define   G_000E40_CPRQ_ON_RBB(x)                      (((x) >> 9) & 0x1)
 146 #define   C_000E40_CPRQ_ON_RBB                         0xFFFFFDFF
 147 #define   S_000E40_CFRQ_ON_RBB(x)                      (((x) & 0x1) << 10)
 148 #define   G_000E40_CFRQ_ON_RBB(x)                      (((x) >> 10) & 0x1)
 149 #define   C_000E40_CFRQ_ON_RBB                         0xFFFFFBFF
 150 #define   S_000E40_HIRQ_IN_RTBUF(x)                    (((x) & 0x1) << 11)
 151 #define   G_000E40_HIRQ_IN_RTBUF(x)                    (((x) >> 11) & 0x1)
 152 #define   C_000E40_HIRQ_IN_RTBUF                       0xFFFFF7FF
 153 #define   S_000E40_CPRQ_IN_RTBUF(x)                    (((x) & 0x1) << 12)
 154 #define   G_000E40_CPRQ_IN_RTBUF(x)                    (((x) >> 12) & 0x1)
 155 #define   C_000E40_CPRQ_IN_RTBUF                       0xFFFFEFFF
 156 #define   S_000E40_CFRQ_IN_RTBUF(x)                    (((x) & 0x1) << 13)
 157 #define   G_000E40_CFRQ_IN_RTBUF(x)                    (((x) >> 13) & 0x1)
 158 #define   C_000E40_CFRQ_IN_RTBUF                       0xFFFFDFFF
 159 #define   S_000E40_CF_PIPE_BUSY(x)                     (((x) & 0x1) << 14)
 160 #define   G_000E40_CF_PIPE_BUSY(x)                     (((x) >> 14) & 0x1)
 161 #define   C_000E40_CF_PIPE_BUSY                        0xFFFFBFFF
 162 #define   S_000E40_ENG_EV_BUSY(x)                      (((x) & 0x1) << 15)
 163 #define   G_000E40_ENG_EV_BUSY(x)                      (((x) >> 15) & 0x1)
 164 #define   C_000E40_ENG_EV_BUSY                         0xFFFF7FFF
 165 #define   S_000E40_CP_CMDSTRM_BUSY(x)                  (((x) & 0x1) << 16)
 166 #define   G_000E40_CP_CMDSTRM_BUSY(x)                  (((x) >> 16) & 0x1)
 167 #define   C_000E40_CP_CMDSTRM_BUSY                     0xFFFEFFFF
 168 #define   S_000E40_E2_BUSY(x)                          (((x) & 0x1) << 17)
 169 #define   G_000E40_E2_BUSY(x)                          (((x) >> 17) & 0x1)
 170 #define   C_000E40_E2_BUSY                             0xFFFDFFFF
 171 #define   S_000E40_RB2D_BUSY(x)                        (((x) & 0x1) << 18)
 172 #define   G_000E40_RB2D_BUSY(x)                        (((x) >> 18) & 0x1)
 173 #define   C_000E40_RB2D_BUSY                           0xFFFBFFFF
 174 #define   S_000E40_RB3D_BUSY(x)                        (((x) & 0x1) << 19)
 175 #define   G_000E40_RB3D_BUSY(x)                        (((x) >> 19) & 0x1)
 176 #define   C_000E40_RB3D_BUSY                           0xFFF7FFFF
 177 #define   S_000E40_VAP_BUSY(x)                         (((x) & 0x1) << 20)
 178 #define   G_000E40_VAP_BUSY(x)                         (((x) >> 20) & 0x1)
 179 #define   C_000E40_VAP_BUSY                            0xFFEFFFFF
 180 #define   S_000E40_RE_BUSY(x)                          (((x) & 0x1) << 21)
 181 #define   G_000E40_RE_BUSY(x)                          (((x) >> 21) & 0x1)
 182 #define   C_000E40_RE_BUSY                             0xFFDFFFFF
 183 #define   S_000E40_TAM_BUSY(x)                         (((x) & 0x1) << 22)
 184 #define   G_000E40_TAM_BUSY(x)                         (((x) >> 22) & 0x1)
 185 #define   C_000E40_TAM_BUSY                            0xFFBFFFFF
 186 #define   S_000E40_TDM_BUSY(x)                         (((x) & 0x1) << 23)
 187 #define   G_000E40_TDM_BUSY(x)                         (((x) >> 23) & 0x1)
 188 #define   C_000E40_TDM_BUSY                            0xFF7FFFFF
 189 #define   S_000E40_PB_BUSY(x)                          (((x) & 0x1) << 24)
 190 #define   G_000E40_PB_BUSY(x)                          (((x) >> 24) & 0x1)
 191 #define   C_000E40_PB_BUSY                             0xFEFFFFFF
 192 #define   S_000E40_TIM_BUSY(x)                         (((x) & 0x1) << 25)
 193 #define   G_000E40_TIM_BUSY(x)                         (((x) >> 25) & 0x1)
 194 #define   C_000E40_TIM_BUSY                            0xFDFFFFFF
 195 #define   S_000E40_GA_BUSY(x)                          (((x) & 0x1) << 26)
 196 #define   G_000E40_GA_BUSY(x)                          (((x) >> 26) & 0x1)
 197 #define   C_000E40_GA_BUSY                             0xFBFFFFFF
 198 #define   S_000E40_CBA2D_BUSY(x)                       (((x) & 0x1) << 27)
 199 #define   G_000E40_CBA2D_BUSY(x)                       (((x) >> 27) & 0x1)
 200 #define   C_000E40_CBA2D_BUSY                          0xF7FFFFFF
 201 #define   S_000E40_GUI_ACTIVE(x)                       (((x) & 0x1) << 31)
 202 #define   G_000E40_GUI_ACTIVE(x)                       (((x) >> 31) & 0x1)
 203 #define   C_000E40_GUI_ACTIVE                          0x7FFFFFFF
 204 #define R_0000F0_RBBM_SOFT_RESET                     0x0000F0
 205 #define   S_0000F0_SOFT_RESET_CP(x)                    (((x) & 0x1) << 0)
 206 #define   G_0000F0_SOFT_RESET_CP(x)                    (((x) >> 0) & 0x1)
 207 #define   C_0000F0_SOFT_RESET_CP                       0xFFFFFFFE
 208 #define   S_0000F0_SOFT_RESET_HI(x)                    (((x) & 0x1) << 1)
 209 #define   G_0000F0_SOFT_RESET_HI(x)                    (((x) >> 1) & 0x1)
 210 #define   C_0000F0_SOFT_RESET_HI                       0xFFFFFFFD
 211 #define   S_0000F0_SOFT_RESET_VAP(x)                   (((x) & 0x1) << 2)
 212 #define   G_0000F0_SOFT_RESET_VAP(x)                   (((x) >> 2) & 0x1)
 213 #define   C_0000F0_SOFT_RESET_VAP                      0xFFFFFFFB
 214 #define   S_0000F0_SOFT_RESET_RE(x)                    (((x) & 0x1) << 3)
 215 #define   G_0000F0_SOFT_RESET_RE(x)                    (((x) >> 3) & 0x1)
 216 #define   C_0000F0_SOFT_RESET_RE                       0xFFFFFFF7
 217 #define   S_0000F0_SOFT_RESET_PP(x)                    (((x) & 0x1) << 4)
 218 #define   G_0000F0_SOFT_RESET_PP(x)                    (((x) >> 4) & 0x1)
 219 #define   C_0000F0_SOFT_RESET_PP                       0xFFFFFFEF
 220 #define   S_0000F0_SOFT_RESET_E2(x)                    (((x) & 0x1) << 5)
 221 #define   G_0000F0_SOFT_RESET_E2(x)                    (((x) >> 5) & 0x1)
 222 #define   C_0000F0_SOFT_RESET_E2                       0xFFFFFFDF
 223 #define   S_0000F0_SOFT_RESET_RB(x)                    (((x) & 0x1) << 6)
 224 #define   G_0000F0_SOFT_RESET_RB(x)                    (((x) >> 6) & 0x1)
 225 #define   C_0000F0_SOFT_RESET_RB                       0xFFFFFFBF
 226 #define   S_0000F0_SOFT_RESET_HDP(x)                   (((x) & 0x1) << 7)
 227 #define   G_0000F0_SOFT_RESET_HDP(x)                   (((x) >> 7) & 0x1)
 228 #define   C_0000F0_SOFT_RESET_HDP                      0xFFFFFF7F
 229 #define   S_0000F0_SOFT_RESET_MC(x)                    (((x) & 0x1) << 8)
 230 #define   G_0000F0_SOFT_RESET_MC(x)                    (((x) >> 8) & 0x1)
 231 #define   C_0000F0_SOFT_RESET_MC                       0xFFFFFEFF
 232 #define   S_0000F0_SOFT_RESET_AIC(x)                   (((x) & 0x1) << 9)
 233 #define   G_0000F0_SOFT_RESET_AIC(x)                   (((x) >> 9) & 0x1)
 234 #define   C_0000F0_SOFT_RESET_AIC                      0xFFFFFDFF
 235 #define   S_0000F0_SOFT_RESET_VIP(x)                   (((x) & 0x1) << 10)
 236 #define   G_0000F0_SOFT_RESET_VIP(x)                   (((x) >> 10) & 0x1)
 237 #define   C_0000F0_SOFT_RESET_VIP                      0xFFFFFBFF
 238 #define   S_0000F0_SOFT_RESET_DISP(x)                  (((x) & 0x1) << 11)
 239 #define   G_0000F0_SOFT_RESET_DISP(x)                  (((x) >> 11) & 0x1)
 240 #define   C_0000F0_SOFT_RESET_DISP                     0xFFFFF7FF
 241 #define   S_0000F0_SOFT_RESET_CG(x)                    (((x) & 0x1) << 12)
 242 #define   G_0000F0_SOFT_RESET_CG(x)                    (((x) >> 12) & 0x1)
 243 #define   C_0000F0_SOFT_RESET_CG                       0xFFFFEFFF
 244 #define   S_0000F0_SOFT_RESET_GA(x)                    (((x) & 0x1) << 13)
 245 #define   G_0000F0_SOFT_RESET_GA(x)                    (((x) >> 13) & 0x1)
 246 #define   C_0000F0_SOFT_RESET_GA                       0xFFFFDFFF
 247 #define   S_0000F0_SOFT_RESET_IDCT(x)                  (((x) & 0x1) << 14)
 248 #define   G_0000F0_SOFT_RESET_IDCT(x)                  (((x) >> 14) & 0x1)
 249 #define   C_0000F0_SOFT_RESET_IDCT                     0xFFFFBFFF
 250 
 251 #define R_00000D_SCLK_CNTL                           0x00000D
 252 #define   S_00000D_SCLK_SRC_SEL(x)                     (((x) & 0x7) << 0)
 253 #define   G_00000D_SCLK_SRC_SEL(x)                     (((x) >> 0) & 0x7)
 254 #define   C_00000D_SCLK_SRC_SEL                        0xFFFFFFF8
 255 #define   S_00000D_CP_MAX_DYN_STOP_LAT(x)              (((x) & 0x1) << 3)
 256 #define   G_00000D_CP_MAX_DYN_STOP_LAT(x)              (((x) >> 3) & 0x1)
 257 #define   C_00000D_CP_MAX_DYN_STOP_LAT                 0xFFFFFFF7
 258 #define   S_00000D_HDP_MAX_DYN_STOP_LAT(x)             (((x) & 0x1) << 4)
 259 #define   G_00000D_HDP_MAX_DYN_STOP_LAT(x)             (((x) >> 4) & 0x1)
 260 #define   C_00000D_HDP_MAX_DYN_STOP_LAT                0xFFFFFFEF
 261 #define   S_00000D_TV_MAX_DYN_STOP_LAT(x)              (((x) & 0x1) << 5)
 262 #define   G_00000D_TV_MAX_DYN_STOP_LAT(x)              (((x) >> 5) & 0x1)
 263 #define   C_00000D_TV_MAX_DYN_STOP_LAT                 0xFFFFFFDF
 264 #define   S_00000D_E2_MAX_DYN_STOP_LAT(x)              (((x) & 0x1) << 6)
 265 #define   G_00000D_E2_MAX_DYN_STOP_LAT(x)              (((x) >> 6) & 0x1)
 266 #define   C_00000D_E2_MAX_DYN_STOP_LAT                 0xFFFFFFBF
 267 #define   S_00000D_SE_MAX_DYN_STOP_LAT(x)              (((x) & 0x1) << 7)
 268 #define   G_00000D_SE_MAX_DYN_STOP_LAT(x)              (((x) >> 7) & 0x1)
 269 #define   C_00000D_SE_MAX_DYN_STOP_LAT                 0xFFFFFF7F
 270 #define   S_00000D_IDCT_MAX_DYN_STOP_LAT(x)            (((x) & 0x1) << 8)
 271 #define   G_00000D_IDCT_MAX_DYN_STOP_LAT(x)            (((x) >> 8) & 0x1)
 272 #define   C_00000D_IDCT_MAX_DYN_STOP_LAT               0xFFFFFEFF
 273 #define   S_00000D_VIP_MAX_DYN_STOP_LAT(x)             (((x) & 0x1) << 9)
 274 #define   G_00000D_VIP_MAX_DYN_STOP_LAT(x)             (((x) >> 9) & 0x1)
 275 #define   C_00000D_VIP_MAX_DYN_STOP_LAT                0xFFFFFDFF
 276 #define   S_00000D_RE_MAX_DYN_STOP_LAT(x)              (((x) & 0x1) << 10)
 277 #define   G_00000D_RE_MAX_DYN_STOP_LAT(x)              (((x) >> 10) & 0x1)
 278 #define   C_00000D_RE_MAX_DYN_STOP_LAT                 0xFFFFFBFF
 279 #define   S_00000D_PB_MAX_DYN_STOP_LAT(x)              (((x) & 0x1) << 11)
 280 #define   G_00000D_PB_MAX_DYN_STOP_LAT(x)              (((x) >> 11) & 0x1)
 281 #define   C_00000D_PB_MAX_DYN_STOP_LAT                 0xFFFFF7FF
 282 #define   S_00000D_TAM_MAX_DYN_STOP_LAT(x)             (((x) & 0x1) << 12)
 283 #define   G_00000D_TAM_MAX_DYN_STOP_LAT(x)             (((x) >> 12) & 0x1)
 284 #define   C_00000D_TAM_MAX_DYN_STOP_LAT                0xFFFFEFFF
 285 #define   S_00000D_TDM_MAX_DYN_STOP_LAT(x)             (((x) & 0x1) << 13)
 286 #define   G_00000D_TDM_MAX_DYN_STOP_LAT(x)             (((x) >> 13) & 0x1)
 287 #define   C_00000D_TDM_MAX_DYN_STOP_LAT                0xFFFFDFFF
 288 #define   S_00000D_RB_MAX_DYN_STOP_LAT(x)              (((x) & 0x1) << 14)
 289 #define   G_00000D_RB_MAX_DYN_STOP_LAT(x)              (((x) >> 14) & 0x1)
 290 #define   C_00000D_RB_MAX_DYN_STOP_LAT                 0xFFFFBFFF
 291 #define   S_00000D_FORCE_DISP2(x)                      (((x) & 0x1) << 15)
 292 #define   G_00000D_FORCE_DISP2(x)                      (((x) >> 15) & 0x1)
 293 #define   C_00000D_FORCE_DISP2                         0xFFFF7FFF
 294 #define   S_00000D_FORCE_CP(x)                         (((x) & 0x1) << 16)
 295 #define   G_00000D_FORCE_CP(x)                         (((x) >> 16) & 0x1)
 296 #define   C_00000D_FORCE_CP                            0xFFFEFFFF
 297 #define   S_00000D_FORCE_HDP(x)                        (((x) & 0x1) << 17)
 298 #define   G_00000D_FORCE_HDP(x)                        (((x) >> 17) & 0x1)
 299 #define   C_00000D_FORCE_HDP                           0xFFFDFFFF
 300 #define   S_00000D_FORCE_DISP1(x)                      (((x) & 0x1) << 18)
 301 #define   G_00000D_FORCE_DISP1(x)                      (((x) >> 18) & 0x1)
 302 #define   C_00000D_FORCE_DISP1                         0xFFFBFFFF
 303 #define   S_00000D_FORCE_TOP(x)                        (((x) & 0x1) << 19)
 304 #define   G_00000D_FORCE_TOP(x)                        (((x) >> 19) & 0x1)
 305 #define   C_00000D_FORCE_TOP                           0xFFF7FFFF
 306 #define   S_00000D_FORCE_E2(x)                         (((x) & 0x1) << 20)
 307 #define   G_00000D_FORCE_E2(x)                         (((x) >> 20) & 0x1)
 308 #define   C_00000D_FORCE_E2                            0xFFEFFFFF
 309 #define   S_00000D_FORCE_SE(x)                         (((x) & 0x1) << 21)
 310 #define   G_00000D_FORCE_SE(x)                         (((x) >> 21) & 0x1)
 311 #define   C_00000D_FORCE_SE                            0xFFDFFFFF
 312 #define   S_00000D_FORCE_IDCT(x)                       (((x) & 0x1) << 22)
 313 #define   G_00000D_FORCE_IDCT(x)                       (((x) >> 22) & 0x1)
 314 #define   C_00000D_FORCE_IDCT                          0xFFBFFFFF
 315 #define   S_00000D_FORCE_VIP(x)                        (((x) & 0x1) << 23)
 316 #define   G_00000D_FORCE_VIP(x)                        (((x) >> 23) & 0x1)
 317 #define   C_00000D_FORCE_VIP                           0xFF7FFFFF
 318 #define   S_00000D_FORCE_RE(x)                         (((x) & 0x1) << 24)
 319 #define   G_00000D_FORCE_RE(x)                         (((x) >> 24) & 0x1)
 320 #define   C_00000D_FORCE_RE                            0xFEFFFFFF
 321 #define   S_00000D_FORCE_PB(x)                         (((x) & 0x1) << 25)
 322 #define   G_00000D_FORCE_PB(x)                         (((x) >> 25) & 0x1)
 323 #define   C_00000D_FORCE_PB                            0xFDFFFFFF
 324 #define   S_00000D_FORCE_TAM(x)                        (((x) & 0x1) << 26)
 325 #define   G_00000D_FORCE_TAM(x)                        (((x) >> 26) & 0x1)
 326 #define   C_00000D_FORCE_TAM                           0xFBFFFFFF
 327 #define   S_00000D_FORCE_TDM(x)                        (((x) & 0x1) << 27)
 328 #define   G_00000D_FORCE_TDM(x)                        (((x) >> 27) & 0x1)
 329 #define   C_00000D_FORCE_TDM                           0xF7FFFFFF
 330 #define   S_00000D_FORCE_RB(x)                         (((x) & 0x1) << 28)
 331 #define   G_00000D_FORCE_RB(x)                         (((x) >> 28) & 0x1)
 332 #define   C_00000D_FORCE_RB                            0xEFFFFFFF
 333 #define   S_00000D_FORCE_TV_SCLK(x)                    (((x) & 0x1) << 29)
 334 #define   G_00000D_FORCE_TV_SCLK(x)                    (((x) >> 29) & 0x1)
 335 #define   C_00000D_FORCE_TV_SCLK                       0xDFFFFFFF
 336 #define   S_00000D_FORCE_SUBPIC(x)                     (((x) & 0x1) << 30)
 337 #define   G_00000D_FORCE_SUBPIC(x)                     (((x) >> 30) & 0x1)
 338 #define   C_00000D_FORCE_SUBPIC                        0xBFFFFFFF
 339 #define   S_00000D_FORCE_OV0(x)                        (((x) & 0x1) << 31)
 340 #define   G_00000D_FORCE_OV0(x)                        (((x) >> 31) & 0x1)
 341 #define   C_00000D_FORCE_OV0                           0x7FFFFFFF
 342 
 343 #endif
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root/drivers/gpu/drm/radeon/r300d.h

INCLUDED FROM
