This source file includes following definitions.
- radeon_mem_type_to_domain
- radeon_bo_reserve
- radeon_bo_unreserve
- radeon_bo_gpu_offset
- radeon_bo_size
- radeon_bo_ngpu_pages
- radeon_bo_gpu_page_alignment
- radeon_bo_mmap_offset
- radeon_sa_bo_gpu_addr
- radeon_sa_bo_cpu_addr
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28 #ifndef __RADEON_OBJECT_H__
29 #define __RADEON_OBJECT_H__
30
31 #include <drm/radeon_drm.h>
32 #include "radeon.h"
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39
40 static inline unsigned radeon_mem_type_to_domain(u32 mem_type)
41 {
42 switch (mem_type) {
43 case TTM_PL_VRAM:
44 return RADEON_GEM_DOMAIN_VRAM;
45 case TTM_PL_TT:
46 return RADEON_GEM_DOMAIN_GTT;
47 case TTM_PL_SYSTEM:
48 return RADEON_GEM_DOMAIN_CPU;
49 default:
50 break;
51 }
52 return 0;
53 }
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64 static inline int radeon_bo_reserve(struct radeon_bo *bo, bool no_intr)
65 {
66 int r;
67
68 r = ttm_bo_reserve(&bo->tbo, !no_intr, false, NULL);
69 if (unlikely(r != 0)) {
70 if (r != -ERESTARTSYS)
71 dev_err(bo->rdev->dev, "%p reserve failed\n", bo);
72 return r;
73 }
74 return 0;
75 }
76
77 static inline void radeon_bo_unreserve(struct radeon_bo *bo)
78 {
79 ttm_bo_unreserve(&bo->tbo);
80 }
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91 static inline u64 radeon_bo_gpu_offset(struct radeon_bo *bo)
92 {
93 return bo->tbo.offset;
94 }
95
96 static inline unsigned long radeon_bo_size(struct radeon_bo *bo)
97 {
98 return bo->tbo.num_pages << PAGE_SHIFT;
99 }
100
101 static inline unsigned radeon_bo_ngpu_pages(struct radeon_bo *bo)
102 {
103 return (bo->tbo.num_pages << PAGE_SHIFT) / RADEON_GPU_PAGE_SIZE;
104 }
105
106 static inline unsigned radeon_bo_gpu_page_alignment(struct radeon_bo *bo)
107 {
108 return (bo->tbo.mem.page_alignment << PAGE_SHIFT) / RADEON_GPU_PAGE_SIZE;
109 }
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117 static inline u64 radeon_bo_mmap_offset(struct radeon_bo *bo)
118 {
119 return drm_vma_node_offset_addr(&bo->tbo.base.vma_node);
120 }
121
122 extern int radeon_bo_wait(struct radeon_bo *bo, u32 *mem_type,
123 bool no_wait);
124
125 extern int radeon_bo_create(struct radeon_device *rdev,
126 unsigned long size, int byte_align,
127 bool kernel, u32 domain, u32 flags,
128 struct sg_table *sg,
129 struct dma_resv *resv,
130 struct radeon_bo **bo_ptr);
131 extern int radeon_bo_kmap(struct radeon_bo *bo, void **ptr);
132 extern void radeon_bo_kunmap(struct radeon_bo *bo);
133 extern struct radeon_bo *radeon_bo_ref(struct radeon_bo *bo);
134 extern void radeon_bo_unref(struct radeon_bo **bo);
135 extern int radeon_bo_pin(struct radeon_bo *bo, u32 domain, u64 *gpu_addr);
136 extern int radeon_bo_pin_restricted(struct radeon_bo *bo, u32 domain,
137 u64 max_offset, u64 *gpu_addr);
138 extern int radeon_bo_unpin(struct radeon_bo *bo);
139 extern int radeon_bo_evict_vram(struct radeon_device *rdev);
140 extern void radeon_bo_force_delete(struct radeon_device *rdev);
141 extern int radeon_bo_init(struct radeon_device *rdev);
142 extern void radeon_bo_fini(struct radeon_device *rdev);
143 extern int radeon_bo_list_validate(struct radeon_device *rdev,
144 struct ww_acquire_ctx *ticket,
145 struct list_head *head, int ring);
146 extern int radeon_bo_set_tiling_flags(struct radeon_bo *bo,
147 u32 tiling_flags, u32 pitch);
148 extern void radeon_bo_get_tiling_flags(struct radeon_bo *bo,
149 u32 *tiling_flags, u32 *pitch);
150 extern int radeon_bo_check_tiling(struct radeon_bo *bo, bool has_moved,
151 bool force_drop);
152 extern void radeon_bo_move_notify(struct ttm_buffer_object *bo,
153 bool evict,
154 struct ttm_mem_reg *new_mem);
155 extern int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo);
156 extern int radeon_bo_get_surface_reg(struct radeon_bo *bo);
157 extern void radeon_bo_fence(struct radeon_bo *bo, struct radeon_fence *fence,
158 bool shared);
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164 static inline uint64_t radeon_sa_bo_gpu_addr(struct radeon_sa_bo *sa_bo)
165 {
166 return sa_bo->manager->gpu_addr + sa_bo->soffset;
167 }
168
169 static inline void * radeon_sa_bo_cpu_addr(struct radeon_sa_bo *sa_bo)
170 {
171 return sa_bo->manager->cpu_ptr + sa_bo->soffset;
172 }
173
174 extern int radeon_sa_bo_manager_init(struct radeon_device *rdev,
175 struct radeon_sa_manager *sa_manager,
176 unsigned size, u32 align, u32 domain,
177 u32 flags);
178 extern void radeon_sa_bo_manager_fini(struct radeon_device *rdev,
179 struct radeon_sa_manager *sa_manager);
180 extern int radeon_sa_bo_manager_start(struct radeon_device *rdev,
181 struct radeon_sa_manager *sa_manager);
182 extern int radeon_sa_bo_manager_suspend(struct radeon_device *rdev,
183 struct radeon_sa_manager *sa_manager);
184 extern int radeon_sa_bo_new(struct radeon_device *rdev,
185 struct radeon_sa_manager *sa_manager,
186 struct radeon_sa_bo **sa_bo,
187 unsigned size, unsigned align);
188 extern void radeon_sa_bo_free(struct radeon_device *rdev,
189 struct radeon_sa_bo **sa_bo,
190 struct radeon_fence *fence);
191 #if defined(CONFIG_DEBUG_FS)
192 extern void radeon_sa_bo_dump_debug_info(struct radeon_sa_manager *sa_manager,
193 struct seq_file *m);
194 #endif
195
196
197 #endif