This source file includes following definitions.
- radeon_ucode_print_common_hdr
- radeon_ucode_print_mc_hdr
- radeon_ucode_print_smc_hdr
- radeon_ucode_print_gfx_hdr
- radeon_ucode_print_rlc_hdr
- radeon_ucode_print_sdma_hdr
- radeon_ucode_validate
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24 #include <linux/firmware.h>
25 #include <linux/slab.h>
26 #include <linux/module.h>
27
28 #include "radeon.h"
29 #include "radeon_ucode.h"
30
31 static void radeon_ucode_print_common_hdr(const struct common_firmware_header *hdr)
32 {
33 DRM_DEBUG("size_bytes: %u\n", le32_to_cpu(hdr->size_bytes));
34 DRM_DEBUG("header_size_bytes: %u\n", le32_to_cpu(hdr->header_size_bytes));
35 DRM_DEBUG("header_version_major: %u\n", le16_to_cpu(hdr->header_version_major));
36 DRM_DEBUG("header_version_minor: %u\n", le16_to_cpu(hdr->header_version_minor));
37 DRM_DEBUG("ip_version_major: %u\n", le16_to_cpu(hdr->ip_version_major));
38 DRM_DEBUG("ip_version_minor: %u\n", le16_to_cpu(hdr->ip_version_minor));
39 DRM_DEBUG("ucode_version: 0x%08x\n", le32_to_cpu(hdr->ucode_version));
40 DRM_DEBUG("ucode_size_bytes: %u\n", le32_to_cpu(hdr->ucode_size_bytes));
41 DRM_DEBUG("ucode_array_offset_bytes: %u\n",
42 le32_to_cpu(hdr->ucode_array_offset_bytes));
43 DRM_DEBUG("crc32: 0x%08x\n", le32_to_cpu(hdr->crc32));
44 }
45
46 void radeon_ucode_print_mc_hdr(const struct common_firmware_header *hdr)
47 {
48 uint16_t version_major = le16_to_cpu(hdr->header_version_major);
49 uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
50
51 DRM_DEBUG("MC\n");
52 radeon_ucode_print_common_hdr(hdr);
53
54 if (version_major == 1) {
55 const struct mc_firmware_header_v1_0 *mc_hdr =
56 container_of(hdr, struct mc_firmware_header_v1_0, header);
57
58 DRM_DEBUG("io_debug_size_bytes: %u\n",
59 le32_to_cpu(mc_hdr->io_debug_size_bytes));
60 DRM_DEBUG("io_debug_array_offset_bytes: %u\n",
61 le32_to_cpu(mc_hdr->io_debug_array_offset_bytes));
62 } else {
63 DRM_ERROR("Unknown MC ucode version: %u.%u\n", version_major, version_minor);
64 }
65 }
66
67 void radeon_ucode_print_smc_hdr(const struct common_firmware_header *hdr)
68 {
69 uint16_t version_major = le16_to_cpu(hdr->header_version_major);
70 uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
71
72 DRM_DEBUG("SMC\n");
73 radeon_ucode_print_common_hdr(hdr);
74
75 if (version_major == 1) {
76 const struct smc_firmware_header_v1_0 *smc_hdr =
77 container_of(hdr, struct smc_firmware_header_v1_0, header);
78
79 DRM_DEBUG("ucode_start_addr: %u\n", le32_to_cpu(smc_hdr->ucode_start_addr));
80 } else {
81 DRM_ERROR("Unknown SMC ucode version: %u.%u\n", version_major, version_minor);
82 }
83 }
84
85 void radeon_ucode_print_gfx_hdr(const struct common_firmware_header *hdr)
86 {
87 uint16_t version_major = le16_to_cpu(hdr->header_version_major);
88 uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
89
90 DRM_DEBUG("GFX\n");
91 radeon_ucode_print_common_hdr(hdr);
92
93 if (version_major == 1) {
94 const struct gfx_firmware_header_v1_0 *gfx_hdr =
95 container_of(hdr, struct gfx_firmware_header_v1_0, header);
96
97 DRM_DEBUG("ucode_feature_version: %u\n",
98 le32_to_cpu(gfx_hdr->ucode_feature_version));
99 DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(gfx_hdr->jt_offset));
100 DRM_DEBUG("jt_size: %u\n", le32_to_cpu(gfx_hdr->jt_size));
101 } else {
102 DRM_ERROR("Unknown GFX ucode version: %u.%u\n", version_major, version_minor);
103 }
104 }
105
106 void radeon_ucode_print_rlc_hdr(const struct common_firmware_header *hdr)
107 {
108 uint16_t version_major = le16_to_cpu(hdr->header_version_major);
109 uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
110
111 DRM_DEBUG("RLC\n");
112 radeon_ucode_print_common_hdr(hdr);
113
114 if (version_major == 1) {
115 const struct rlc_firmware_header_v1_0 *rlc_hdr =
116 container_of(hdr, struct rlc_firmware_header_v1_0, header);
117
118 DRM_DEBUG("ucode_feature_version: %u\n",
119 le32_to_cpu(rlc_hdr->ucode_feature_version));
120 DRM_DEBUG("save_and_restore_offset: %u\n",
121 le32_to_cpu(rlc_hdr->save_and_restore_offset));
122 DRM_DEBUG("clear_state_descriptor_offset: %u\n",
123 le32_to_cpu(rlc_hdr->clear_state_descriptor_offset));
124 DRM_DEBUG("avail_scratch_ram_locations: %u\n",
125 le32_to_cpu(rlc_hdr->avail_scratch_ram_locations));
126 DRM_DEBUG("master_pkt_description_offset: %u\n",
127 le32_to_cpu(rlc_hdr->master_pkt_description_offset));
128 } else {
129 DRM_ERROR("Unknown RLC ucode version: %u.%u\n", version_major, version_minor);
130 }
131 }
132
133 void radeon_ucode_print_sdma_hdr(const struct common_firmware_header *hdr)
134 {
135 uint16_t version_major = le16_to_cpu(hdr->header_version_major);
136 uint16_t version_minor = le16_to_cpu(hdr->header_version_minor);
137
138 DRM_DEBUG("SDMA\n");
139 radeon_ucode_print_common_hdr(hdr);
140
141 if (version_major == 1) {
142 const struct sdma_firmware_header_v1_0 *sdma_hdr =
143 container_of(hdr, struct sdma_firmware_header_v1_0, header);
144
145 DRM_DEBUG("ucode_feature_version: %u\n",
146 le32_to_cpu(sdma_hdr->ucode_feature_version));
147 DRM_DEBUG("ucode_change_version: %u\n",
148 le32_to_cpu(sdma_hdr->ucode_change_version));
149 DRM_DEBUG("jt_offset: %u\n", le32_to_cpu(sdma_hdr->jt_offset));
150 DRM_DEBUG("jt_size: %u\n", le32_to_cpu(sdma_hdr->jt_size));
151 } else {
152 DRM_ERROR("Unknown SDMA ucode version: %u.%u\n",
153 version_major, version_minor);
154 }
155 }
156
157 int radeon_ucode_validate(const struct firmware *fw)
158 {
159 const struct common_firmware_header *hdr =
160 (const struct common_firmware_header *)fw->data;
161
162 if (fw->size == le32_to_cpu(hdr->size_bytes))
163 return 0;
164
165 return -EINVAL;
166 }
167