This source file includes following definitions.
- radeon_dp_handle_hpd
- radeon_connector_hotplug
- radeon_property_change_mode
- radeon_get_monitor_bpc
- radeon_connector_update_scratch_regs
- radeon_find_encoder
- radeon_connector_edid
- radeon_connector_get_edid
- radeon_connector_free_edid
- radeon_ddc_get_modes
- radeon_best_single_encoder
- radeon_get_native_mode
- radeon_connector_analog_encoder_conflict_solve
- radeon_fp_native_mode
- radeon_add_common_modes
- radeon_connector_set_property
- radeon_fixup_lvds_native_mode
- radeon_lvds_get_modes
- radeon_lvds_mode_valid
- radeon_lvds_detect
- radeon_connector_unregister
- radeon_connector_destroy
- radeon_lvds_set_property
- radeon_vga_get_modes
- radeon_vga_mode_valid
- radeon_vga_detect
- radeon_tv_get_modes
- radeon_tv_mode_valid
- radeon_tv_detect
- radeon_check_hpd_status_unchanged
- radeon_dvi_detect
- radeon_dvi_encoder
- radeon_dvi_force
- radeon_dvi_mode_valid
- radeon_dp_get_modes
- radeon_connector_encoder_get_dp_bridge_encoder_id
- radeon_connector_encoder_is_hbr2
- radeon_connector_is_dp12_capable
- radeon_dp_detect
- radeon_dp_mode_valid
- radeon_add_atom_connector
- radeon_add_legacy_connector
- radeon_setup_mst_connector
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27 #include <drm/drm_edid.h>
28 #include <drm/drm_crtc_helper.h>
29 #include <drm/drm_fb_helper.h>
30 #include <drm/drm_dp_mst_helper.h>
31 #include <drm/drm_probe_helper.h>
32 #include <drm/radeon_drm.h>
33 #include "radeon.h"
34 #include "radeon_audio.h"
35 #include "atom.h"
36
37 #include <linux/pm_runtime.h>
38 #include <linux/vga_switcheroo.h>
39
40 static int radeon_dp_handle_hpd(struct drm_connector *connector)
41 {
42 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
43 int ret;
44
45 ret = radeon_dp_mst_check_status(radeon_connector);
46 if (ret == -EINVAL)
47 return 1;
48 return 0;
49 }
50 void radeon_connector_hotplug(struct drm_connector *connector)
51 {
52 struct drm_device *dev = connector->dev;
53 struct radeon_device *rdev = dev->dev_private;
54 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
55
56 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
57 struct radeon_connector_atom_dig *dig_connector =
58 radeon_connector->con_priv;
59
60 if (radeon_connector->is_mst_connector)
61 return;
62 if (dig_connector->is_mst) {
63 radeon_dp_handle_hpd(connector);
64 return;
65 }
66 }
67
68
69
70 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE)
71 return;
72
73 radeon_hpd_set_polarity(rdev, radeon_connector->hpd.hpd);
74
75
76
77 if (connector->dpms != DRM_MODE_DPMS_ON)
78 return;
79
80
81 if (connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) {
82 struct radeon_connector_atom_dig *dig_connector =
83 radeon_connector->con_priv;
84
85
86 if (dig_connector->dp_sink_type != CONNECTOR_OBJECT_ID_DISPLAYPORT)
87 return;
88
89
90 dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
91
92
93
94 if (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT &&
95 radeon_hpd_sense(rdev, radeon_connector->hpd.hpd) &&
96 radeon_dp_needs_link_train(radeon_connector)) {
97
98 if (!radeon_dp_getdpcd(radeon_connector))
99 return;
100
101
102
103
104 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_OFF);
105 drm_helper_connector_dpms(connector, DRM_MODE_DPMS_ON);
106 }
107 }
108 }
109
110 static void radeon_property_change_mode(struct drm_encoder *encoder)
111 {
112 struct drm_crtc *crtc = encoder->crtc;
113
114 if (crtc && crtc->enabled) {
115 drm_crtc_helper_set_mode(crtc, &crtc->mode,
116 crtc->x, crtc->y, crtc->primary->fb);
117 }
118 }
119
120 int radeon_get_monitor_bpc(struct drm_connector *connector)
121 {
122 struct drm_device *dev = connector->dev;
123 struct radeon_device *rdev = dev->dev_private;
124 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
125 struct radeon_connector_atom_dig *dig_connector;
126 int bpc = 8;
127 int mode_clock, max_tmds_clock;
128
129 switch (connector->connector_type) {
130 case DRM_MODE_CONNECTOR_DVII:
131 case DRM_MODE_CONNECTOR_HDMIB:
132 if (radeon_connector->use_digital) {
133 if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
134 if (connector->display_info.bpc)
135 bpc = connector->display_info.bpc;
136 }
137 }
138 break;
139 case DRM_MODE_CONNECTOR_DVID:
140 case DRM_MODE_CONNECTOR_HDMIA:
141 if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
142 if (connector->display_info.bpc)
143 bpc = connector->display_info.bpc;
144 }
145 break;
146 case DRM_MODE_CONNECTOR_DisplayPort:
147 dig_connector = radeon_connector->con_priv;
148 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
149 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) ||
150 drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
151 if (connector->display_info.bpc)
152 bpc = connector->display_info.bpc;
153 }
154 break;
155 case DRM_MODE_CONNECTOR_eDP:
156 case DRM_MODE_CONNECTOR_LVDS:
157 if (connector->display_info.bpc)
158 bpc = connector->display_info.bpc;
159 else if (ASIC_IS_DCE41(rdev) || ASIC_IS_DCE5(rdev)) {
160 const struct drm_connector_helper_funcs *connector_funcs =
161 connector->helper_private;
162 struct drm_encoder *encoder = connector_funcs->best_encoder(connector);
163 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
164 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
165
166 if (dig->lcd_misc & ATOM_PANEL_MISC_V13_6BIT_PER_COLOR)
167 bpc = 6;
168 else if (dig->lcd_misc & ATOM_PANEL_MISC_V13_8BIT_PER_COLOR)
169 bpc = 8;
170 }
171 break;
172 }
173
174 if (drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
175
176 if ((bpc > 8) && !ASIC_IS_DCE4(rdev)) {
177 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 8 bpc.\n",
178 connector->name, bpc);
179 bpc = 8;
180 }
181
182
183
184
185
186
187
188 if (bpc > 12) {
189 DRM_DEBUG("%s: HDMI deep color %d bpc unsupported. Using 12 bpc.\n",
190 connector->name, bpc);
191 bpc = 12;
192 }
193
194
195 if (connector->display_info.max_tmds_clock > 0) {
196
197 mode_clock = radeon_connector->pixelclock_for_modeset;
198
199
200 max_tmds_clock = connector->display_info.max_tmds_clock;
201
202 DRM_DEBUG("%s: hdmi mode dotclock %d kHz, max tmds input clock %d kHz.\n",
203 connector->name, mode_clock, max_tmds_clock);
204
205
206 if ((bpc == 12) && (mode_clock * 3/2 > max_tmds_clock)) {
207 if ((connector->display_info.edid_hdmi_dc_modes & DRM_EDID_HDMI_DC_30) &&
208 (mode_clock * 5/4 <= max_tmds_clock))
209 bpc = 10;
210 else
211 bpc = 8;
212
213 DRM_DEBUG("%s: HDMI deep color 12 bpc exceeds max tmds clock. Using %d bpc.\n",
214 connector->name, bpc);
215 }
216
217 if ((bpc == 10) && (mode_clock * 5/4 > max_tmds_clock)) {
218 bpc = 8;
219 DRM_DEBUG("%s: HDMI deep color 10 bpc exceeds max tmds clock. Using %d bpc.\n",
220 connector->name, bpc);
221 }
222 }
223 else if (bpc > 8) {
224
225 DRM_DEBUG("%s: Required max tmds clock for HDMI deep color missing. Using 8 bpc.\n",
226 connector->name);
227 bpc = 8;
228 }
229 }
230
231 if ((radeon_deep_color == 0) && (bpc > 8)) {
232 DRM_DEBUG("%s: Deep color disabled. Set radeon module param deep_color=1 to enable.\n",
233 connector->name);
234 bpc = 8;
235 }
236
237 DRM_DEBUG("%s: Display bpc=%d, returned bpc=%d\n",
238 connector->name, connector->display_info.bpc, bpc);
239
240 return bpc;
241 }
242
243 static void
244 radeon_connector_update_scratch_regs(struct drm_connector *connector, enum drm_connector_status status)
245 {
246 struct drm_device *dev = connector->dev;
247 struct radeon_device *rdev = dev->dev_private;
248 struct drm_encoder *best_encoder;
249 struct drm_encoder *encoder;
250 const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
251 bool connected;
252 int i;
253
254 best_encoder = connector_funcs->best_encoder(connector);
255
256 drm_connector_for_each_possible_encoder(connector, encoder, i) {
257 if ((encoder == best_encoder) && (status == connector_status_connected))
258 connected = true;
259 else
260 connected = false;
261
262 if (rdev->is_atom_bios)
263 radeon_atombios_connected_scratch_regs(connector, encoder, connected);
264 else
265 radeon_combios_connected_scratch_regs(connector, encoder, connected);
266 }
267 }
268
269 static struct drm_encoder *radeon_find_encoder(struct drm_connector *connector, int encoder_type)
270 {
271 struct drm_encoder *encoder;
272 int i;
273
274 drm_connector_for_each_possible_encoder(connector, encoder, i) {
275 if (encoder->encoder_type == encoder_type)
276 return encoder;
277 }
278
279 return NULL;
280 }
281
282 struct edid *radeon_connector_edid(struct drm_connector *connector)
283 {
284 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
285 struct drm_property_blob *edid_blob = connector->edid_blob_ptr;
286
287 if (radeon_connector->edid) {
288 return radeon_connector->edid;
289 } else if (edid_blob) {
290 struct edid *edid = kmemdup(edid_blob->data, edid_blob->length, GFP_KERNEL);
291 if (edid)
292 radeon_connector->edid = edid;
293 }
294 return radeon_connector->edid;
295 }
296
297 static void radeon_connector_get_edid(struct drm_connector *connector)
298 {
299 struct drm_device *dev = connector->dev;
300 struct radeon_device *rdev = dev->dev_private;
301 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
302
303 if (radeon_connector->edid)
304 return;
305
306
307 if (radeon_connector->router.ddc_valid)
308 radeon_router_select_ddc_port(radeon_connector);
309
310 if ((radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
311 ENCODER_OBJECT_ID_NONE) &&
312 radeon_connector->ddc_bus->has_aux) {
313 radeon_connector->edid = drm_get_edid(connector,
314 &radeon_connector->ddc_bus->aux.ddc);
315 } else if ((connector->connector_type == DRM_MODE_CONNECTOR_DisplayPort) ||
316 (connector->connector_type == DRM_MODE_CONNECTOR_eDP)) {
317 struct radeon_connector_atom_dig *dig = radeon_connector->con_priv;
318
319 if ((dig->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT ||
320 dig->dp_sink_type == CONNECTOR_OBJECT_ID_eDP) &&
321 radeon_connector->ddc_bus->has_aux)
322 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
323 &radeon_connector->ddc_bus->aux.ddc);
324 else if (radeon_connector->ddc_bus)
325 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
326 &radeon_connector->ddc_bus->adapter);
327 } else if (vga_switcheroo_handler_flags() & VGA_SWITCHEROO_CAN_SWITCH_DDC &&
328 connector->connector_type == DRM_MODE_CONNECTOR_LVDS &&
329 radeon_connector->ddc_bus) {
330 radeon_connector->edid = drm_get_edid_switcheroo(&radeon_connector->base,
331 &radeon_connector->ddc_bus->adapter);
332 } else if (radeon_connector->ddc_bus) {
333 radeon_connector->edid = drm_get_edid(&radeon_connector->base,
334 &radeon_connector->ddc_bus->adapter);
335 }
336
337 if (!radeon_connector->edid) {
338
339
340
341 if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0))
342 return;
343
344 if (rdev->is_atom_bios) {
345
346 if (((connector->connector_type == DRM_MODE_CONNECTOR_LVDS) ||
347 (connector->connector_type == DRM_MODE_CONNECTOR_eDP)))
348 radeon_connector->edid = radeon_bios_get_hardcoded_edid(rdev);
349 } else {
350
351 radeon_connector->edid = radeon_bios_get_hardcoded_edid(rdev);
352 }
353 }
354 }
355
356 static void radeon_connector_free_edid(struct drm_connector *connector)
357 {
358 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
359
360 if (radeon_connector->edid) {
361 kfree(radeon_connector->edid);
362 radeon_connector->edid = NULL;
363 }
364 }
365
366 static int radeon_ddc_get_modes(struct drm_connector *connector)
367 {
368 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
369 int ret;
370
371 if (radeon_connector->edid) {
372 drm_connector_update_edid_property(connector, radeon_connector->edid);
373 ret = drm_add_edid_modes(connector, radeon_connector->edid);
374 return ret;
375 }
376 drm_connector_update_edid_property(connector, NULL);
377 return 0;
378 }
379
380 static struct drm_encoder *radeon_best_single_encoder(struct drm_connector *connector)
381 {
382 struct drm_encoder *encoder;
383 int i;
384
385
386 drm_connector_for_each_possible_encoder(connector, encoder, i)
387 return encoder;
388
389 return NULL;
390 }
391
392 static void radeon_get_native_mode(struct drm_connector *connector)
393 {
394 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
395 struct radeon_encoder *radeon_encoder;
396
397 if (encoder == NULL)
398 return;
399
400 radeon_encoder = to_radeon_encoder(encoder);
401
402 if (!list_empty(&connector->probed_modes)) {
403 struct drm_display_mode *preferred_mode =
404 list_first_entry(&connector->probed_modes,
405 struct drm_display_mode, head);
406
407 radeon_encoder->native_mode = *preferred_mode;
408 } else {
409 radeon_encoder->native_mode.clock = 0;
410 }
411 }
412
413
414
415
416
417
418
419 static enum drm_connector_status
420 radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector,
421 struct drm_encoder *encoder,
422 enum drm_connector_status current_status,
423 bool priority)
424 {
425 struct drm_device *dev = connector->dev;
426 struct drm_connector *conflict;
427 struct radeon_connector *radeon_conflict;
428
429 list_for_each_entry(conflict, &dev->mode_config.connector_list, head) {
430 struct drm_encoder *enc;
431 int i;
432
433 if (conflict == connector)
434 continue;
435
436 radeon_conflict = to_radeon_connector(conflict);
437
438 drm_connector_for_each_possible_encoder(conflict, enc, i) {
439
440 if (enc == encoder) {
441 if (conflict->status != connector_status_connected)
442 continue;
443
444 if (radeon_conflict->use_digital)
445 continue;
446
447 if (priority == true) {
448 DRM_DEBUG_KMS("1: conflicting encoders switching off %s\n",
449 conflict->name);
450 DRM_DEBUG_KMS("in favor of %s\n",
451 connector->name);
452 conflict->status = connector_status_disconnected;
453 radeon_connector_update_scratch_regs(conflict, connector_status_disconnected);
454 } else {
455 DRM_DEBUG_KMS("2: conflicting encoders switching off %s\n",
456 connector->name);
457 DRM_DEBUG_KMS("in favor of %s\n",
458 conflict->name);
459 current_status = connector_status_disconnected;
460 }
461 break;
462 }
463 }
464 }
465 return current_status;
466
467 }
468
469 static struct drm_display_mode *radeon_fp_native_mode(struct drm_encoder *encoder)
470 {
471 struct drm_device *dev = encoder->dev;
472 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
473 struct drm_display_mode *mode = NULL;
474 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
475
476 if (native_mode->hdisplay != 0 &&
477 native_mode->vdisplay != 0 &&
478 native_mode->clock != 0) {
479 mode = drm_mode_duplicate(dev, native_mode);
480 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
481 drm_mode_set_name(mode);
482
483 DRM_DEBUG_KMS("Adding native panel mode %s\n", mode->name);
484 } else if (native_mode->hdisplay != 0 &&
485 native_mode->vdisplay != 0) {
486
487
488
489
490
491
492
493 mode = drm_cvt_mode(dev, native_mode->hdisplay, native_mode->vdisplay, 60, true, false, false);
494 mode->type = DRM_MODE_TYPE_PREFERRED | DRM_MODE_TYPE_DRIVER;
495 DRM_DEBUG_KMS("Adding cvt approximation of native panel mode %s\n", mode->name);
496 }
497 return mode;
498 }
499
500 static void radeon_add_common_modes(struct drm_encoder *encoder, struct drm_connector *connector)
501 {
502 struct drm_device *dev = encoder->dev;
503 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
504 struct drm_display_mode *mode = NULL;
505 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
506 int i;
507 struct mode_size {
508 int w;
509 int h;
510 } common_modes[17] = {
511 { 640, 480},
512 { 720, 480},
513 { 800, 600},
514 { 848, 480},
515 {1024, 768},
516 {1152, 768},
517 {1280, 720},
518 {1280, 800},
519 {1280, 854},
520 {1280, 960},
521 {1280, 1024},
522 {1440, 900},
523 {1400, 1050},
524 {1680, 1050},
525 {1600, 1200},
526 {1920, 1080},
527 {1920, 1200}
528 };
529
530 for (i = 0; i < 17; i++) {
531 if (radeon_encoder->devices & (ATOM_DEVICE_TV_SUPPORT)) {
532 if (common_modes[i].w > 1024 ||
533 common_modes[i].h > 768)
534 continue;
535 }
536 if (radeon_encoder->devices & (ATOM_DEVICE_LCD_SUPPORT)) {
537 if (common_modes[i].w > native_mode->hdisplay ||
538 common_modes[i].h > native_mode->vdisplay ||
539 (common_modes[i].w == native_mode->hdisplay &&
540 common_modes[i].h == native_mode->vdisplay))
541 continue;
542 }
543 if (common_modes[i].w < 320 || common_modes[i].h < 200)
544 continue;
545
546 mode = drm_cvt_mode(dev, common_modes[i].w, common_modes[i].h, 60, false, false, false);
547 drm_mode_probed_add(connector, mode);
548 }
549 }
550
551 static int radeon_connector_set_property(struct drm_connector *connector, struct drm_property *property,
552 uint64_t val)
553 {
554 struct drm_device *dev = connector->dev;
555 struct radeon_device *rdev = dev->dev_private;
556 struct drm_encoder *encoder;
557 struct radeon_encoder *radeon_encoder;
558
559 if (property == rdev->mode_info.coherent_mode_property) {
560 struct radeon_encoder_atom_dig *dig;
561 bool new_coherent_mode;
562
563
564 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
565 if (!encoder)
566 return 0;
567
568 radeon_encoder = to_radeon_encoder(encoder);
569
570 if (!radeon_encoder->enc_priv)
571 return 0;
572
573 dig = radeon_encoder->enc_priv;
574 new_coherent_mode = val ? true : false;
575 if (dig->coherent_mode != new_coherent_mode) {
576 dig->coherent_mode = new_coherent_mode;
577 radeon_property_change_mode(&radeon_encoder->base);
578 }
579 }
580
581 if (property == rdev->mode_info.audio_property) {
582 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
583
584 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
585 if (!encoder)
586 return 0;
587
588 radeon_encoder = to_radeon_encoder(encoder);
589
590 if (radeon_connector->audio != val) {
591 radeon_connector->audio = val;
592 radeon_property_change_mode(&radeon_encoder->base);
593 }
594 }
595
596 if (property == rdev->mode_info.dither_property) {
597 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
598
599 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
600 if (!encoder)
601 return 0;
602
603 radeon_encoder = to_radeon_encoder(encoder);
604
605 if (radeon_connector->dither != val) {
606 radeon_connector->dither = val;
607 radeon_property_change_mode(&radeon_encoder->base);
608 }
609 }
610
611 if (property == rdev->mode_info.underscan_property) {
612
613 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
614 if (!encoder)
615 return 0;
616
617 radeon_encoder = to_radeon_encoder(encoder);
618
619 if (radeon_encoder->underscan_type != val) {
620 radeon_encoder->underscan_type = val;
621 radeon_property_change_mode(&radeon_encoder->base);
622 }
623 }
624
625 if (property == rdev->mode_info.underscan_hborder_property) {
626
627 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
628 if (!encoder)
629 return 0;
630
631 radeon_encoder = to_radeon_encoder(encoder);
632
633 if (radeon_encoder->underscan_hborder != val) {
634 radeon_encoder->underscan_hborder = val;
635 radeon_property_change_mode(&radeon_encoder->base);
636 }
637 }
638
639 if (property == rdev->mode_info.underscan_vborder_property) {
640
641 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
642 if (!encoder)
643 return 0;
644
645 radeon_encoder = to_radeon_encoder(encoder);
646
647 if (radeon_encoder->underscan_vborder != val) {
648 radeon_encoder->underscan_vborder = val;
649 radeon_property_change_mode(&radeon_encoder->base);
650 }
651 }
652
653 if (property == rdev->mode_info.tv_std_property) {
654 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TVDAC);
655 if (!encoder) {
656 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_DAC);
657 }
658
659 if (!encoder)
660 return 0;
661
662 radeon_encoder = to_radeon_encoder(encoder);
663 if (!radeon_encoder->enc_priv)
664 return 0;
665 if (ASIC_IS_AVIVO(rdev) || radeon_r4xx_atom) {
666 struct radeon_encoder_atom_dac *dac_int;
667 dac_int = radeon_encoder->enc_priv;
668 dac_int->tv_std = val;
669 } else {
670 struct radeon_encoder_tv_dac *dac_int;
671 dac_int = radeon_encoder->enc_priv;
672 dac_int->tv_std = val;
673 }
674 radeon_property_change_mode(&radeon_encoder->base);
675 }
676
677 if (property == rdev->mode_info.load_detect_property) {
678 struct radeon_connector *radeon_connector =
679 to_radeon_connector(connector);
680
681 if (val == 0)
682 radeon_connector->dac_load_detect = false;
683 else
684 radeon_connector->dac_load_detect = true;
685 }
686
687 if (property == rdev->mode_info.tmds_pll_property) {
688 struct radeon_encoder_int_tmds *tmds = NULL;
689 bool ret = false;
690
691 encoder = radeon_find_encoder(connector, DRM_MODE_ENCODER_TMDS);
692 if (!encoder)
693 return 0;
694
695 radeon_encoder = to_radeon_encoder(encoder);
696
697 tmds = radeon_encoder->enc_priv;
698 if (!tmds)
699 return 0;
700
701 if (val == 0) {
702 if (rdev->is_atom_bios)
703 ret = radeon_atombios_get_tmds_info(radeon_encoder, tmds);
704 else
705 ret = radeon_legacy_get_tmds_info_from_combios(radeon_encoder, tmds);
706 }
707 if (val == 1 || ret == false) {
708 radeon_legacy_get_tmds_info_from_table(radeon_encoder, tmds);
709 }
710 radeon_property_change_mode(&radeon_encoder->base);
711 }
712
713 if (property == dev->mode_config.scaling_mode_property) {
714 enum radeon_rmx_type rmx_type;
715
716 if (connector->encoder)
717 radeon_encoder = to_radeon_encoder(connector->encoder);
718 else {
719 const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
720 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
721 }
722
723 switch (val) {
724 default:
725 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
726 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
727 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
728 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
729 }
730 if (radeon_encoder->rmx_type == rmx_type)
731 return 0;
732
733 if ((rmx_type != DRM_MODE_SCALE_NONE) &&
734 (radeon_encoder->native_mode.clock == 0))
735 return 0;
736
737 radeon_encoder->rmx_type = rmx_type;
738
739 radeon_property_change_mode(&radeon_encoder->base);
740 }
741
742 if (property == rdev->mode_info.output_csc_property) {
743 if (connector->encoder)
744 radeon_encoder = to_radeon_encoder(connector->encoder);
745 else {
746 const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
747 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
748 }
749
750 if (radeon_encoder->output_csc == val)
751 return 0;
752
753 radeon_encoder->output_csc = val;
754
755 if (connector->encoder && connector->encoder->crtc) {
756 struct drm_crtc *crtc = connector->encoder->crtc;
757 struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
758
759 radeon_crtc->output_csc = radeon_encoder->output_csc;
760
761
762
763
764
765 crtc->funcs->gamma_set(crtc, NULL, NULL, NULL, 0, NULL);
766 }
767 }
768
769 return 0;
770 }
771
772 static void radeon_fixup_lvds_native_mode(struct drm_encoder *encoder,
773 struct drm_connector *connector)
774 {
775 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
776 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
777 struct drm_display_mode *t, *mode;
778
779
780 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
781 if (mode->type & DRM_MODE_TYPE_PREFERRED) {
782 if (mode->hdisplay != native_mode->hdisplay ||
783 mode->vdisplay != native_mode->vdisplay)
784 memcpy(native_mode, mode, sizeof(*mode));
785 }
786 }
787
788
789 if (!native_mode->clock) {
790 list_for_each_entry_safe(mode, t, &connector->probed_modes, head) {
791 if (mode->hdisplay == native_mode->hdisplay &&
792 mode->vdisplay == native_mode->vdisplay) {
793 *native_mode = *mode;
794 drm_mode_set_crtcinfo(native_mode, CRTC_INTERLACE_HALVE_V);
795 DRM_DEBUG_KMS("Determined LVDS native mode details from EDID\n");
796 break;
797 }
798 }
799 }
800
801 if (!native_mode->clock) {
802 DRM_DEBUG_KMS("No LVDS native mode details, disabling RMX\n");
803 radeon_encoder->rmx_type = RMX_OFF;
804 }
805 }
806
807 static int radeon_lvds_get_modes(struct drm_connector *connector)
808 {
809 struct drm_encoder *encoder;
810 int ret = 0;
811 struct drm_display_mode *mode;
812
813 radeon_connector_get_edid(connector);
814 ret = radeon_ddc_get_modes(connector);
815 if (ret > 0) {
816 encoder = radeon_best_single_encoder(connector);
817 if (encoder) {
818 radeon_fixup_lvds_native_mode(encoder, connector);
819
820 radeon_add_common_modes(encoder, connector);
821 }
822 return ret;
823 }
824
825 encoder = radeon_best_single_encoder(connector);
826 if (!encoder)
827 return 0;
828
829
830 mode = radeon_fp_native_mode(encoder);
831 if (mode) {
832 ret = 1;
833 drm_mode_probed_add(connector, mode);
834
835 connector->display_info.width_mm = mode->width_mm;
836 connector->display_info.height_mm = mode->height_mm;
837
838 radeon_add_common_modes(encoder, connector);
839 }
840
841 return ret;
842 }
843
844 static enum drm_mode_status radeon_lvds_mode_valid(struct drm_connector *connector,
845 struct drm_display_mode *mode)
846 {
847 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
848
849 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
850 return MODE_PANEL;
851
852 if (encoder) {
853 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
854 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
855
856
857
858
859 if ((mode->hdisplay > native_mode->hdisplay) ||
860 (mode->vdisplay > native_mode->vdisplay))
861 return MODE_PANEL;
862
863
864 if (radeon_encoder->rmx_type == RMX_OFF) {
865 if ((mode->hdisplay != native_mode->hdisplay) ||
866 (mode->vdisplay != native_mode->vdisplay))
867 return MODE_PANEL;
868 }
869 }
870
871 return MODE_OK;
872 }
873
874 static enum drm_connector_status
875 radeon_lvds_detect(struct drm_connector *connector, bool force)
876 {
877 struct drm_device *dev = connector->dev;
878 struct radeon_device *rdev = dev->dev_private;
879 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
880 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
881 enum drm_connector_status ret = connector_status_disconnected;
882 int r;
883
884 if (!drm_kms_helper_is_poll_worker()) {
885 r = pm_runtime_get_sync(connector->dev->dev);
886 if (r < 0)
887 return connector_status_disconnected;
888 }
889
890 if (encoder) {
891 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
892 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
893
894
895 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
896 ret = connector_status_connected;
897
898
899
900 if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0))
901 ret = connector_status_disconnected;
902 }
903
904
905 radeon_connector_get_edid(connector);
906 if (radeon_connector->edid)
907 ret = connector_status_connected;
908
909
910 radeon_connector_update_scratch_regs(connector, ret);
911
912 if (!drm_kms_helper_is_poll_worker()) {
913 pm_runtime_mark_last_busy(connector->dev->dev);
914 pm_runtime_put_autosuspend(connector->dev->dev);
915 }
916
917 return ret;
918 }
919
920 static void radeon_connector_unregister(struct drm_connector *connector)
921 {
922 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
923
924 if (radeon_connector->ddc_bus && radeon_connector->ddc_bus->has_aux) {
925 drm_dp_aux_unregister(&radeon_connector->ddc_bus->aux);
926 radeon_connector->ddc_bus->has_aux = false;
927 }
928 }
929
930 static void radeon_connector_destroy(struct drm_connector *connector)
931 {
932 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
933
934 radeon_connector_free_edid(connector);
935 kfree(radeon_connector->con_priv);
936 drm_connector_unregister(connector);
937 drm_connector_cleanup(connector);
938 kfree(connector);
939 }
940
941 static int radeon_lvds_set_property(struct drm_connector *connector,
942 struct drm_property *property,
943 uint64_t value)
944 {
945 struct drm_device *dev = connector->dev;
946 struct radeon_encoder *radeon_encoder;
947 enum radeon_rmx_type rmx_type;
948
949 DRM_DEBUG_KMS("\n");
950 if (property != dev->mode_config.scaling_mode_property)
951 return 0;
952
953 if (connector->encoder)
954 radeon_encoder = to_radeon_encoder(connector->encoder);
955 else {
956 const struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
957 radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
958 }
959
960 switch (value) {
961 case DRM_MODE_SCALE_NONE: rmx_type = RMX_OFF; break;
962 case DRM_MODE_SCALE_CENTER: rmx_type = RMX_CENTER; break;
963 case DRM_MODE_SCALE_ASPECT: rmx_type = RMX_ASPECT; break;
964 default:
965 case DRM_MODE_SCALE_FULLSCREEN: rmx_type = RMX_FULL; break;
966 }
967 if (radeon_encoder->rmx_type == rmx_type)
968 return 0;
969
970 radeon_encoder->rmx_type = rmx_type;
971
972 radeon_property_change_mode(&radeon_encoder->base);
973 return 0;
974 }
975
976
977 static const struct drm_connector_helper_funcs radeon_lvds_connector_helper_funcs = {
978 .get_modes = radeon_lvds_get_modes,
979 .mode_valid = radeon_lvds_mode_valid,
980 .best_encoder = radeon_best_single_encoder,
981 };
982
983 static const struct drm_connector_funcs radeon_lvds_connector_funcs = {
984 .dpms = drm_helper_connector_dpms,
985 .detect = radeon_lvds_detect,
986 .fill_modes = drm_helper_probe_single_connector_modes,
987 .early_unregister = radeon_connector_unregister,
988 .destroy = radeon_connector_destroy,
989 .set_property = radeon_lvds_set_property,
990 };
991
992 static int radeon_vga_get_modes(struct drm_connector *connector)
993 {
994 int ret;
995
996 radeon_connector_get_edid(connector);
997 ret = radeon_ddc_get_modes(connector);
998
999 radeon_get_native_mode(connector);
1000
1001 return ret;
1002 }
1003
1004 static enum drm_mode_status radeon_vga_mode_valid(struct drm_connector *connector,
1005 struct drm_display_mode *mode)
1006 {
1007 struct drm_device *dev = connector->dev;
1008 struct radeon_device *rdev = dev->dev_private;
1009
1010
1011
1012 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
1013 return MODE_CLOCK_HIGH;
1014
1015 return MODE_OK;
1016 }
1017
1018 static enum drm_connector_status
1019 radeon_vga_detect(struct drm_connector *connector, bool force)
1020 {
1021 struct drm_device *dev = connector->dev;
1022 struct radeon_device *rdev = dev->dev_private;
1023 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1024 struct drm_encoder *encoder;
1025 const struct drm_encoder_helper_funcs *encoder_funcs;
1026 bool dret = false;
1027 enum drm_connector_status ret = connector_status_disconnected;
1028 int r;
1029
1030 if (!drm_kms_helper_is_poll_worker()) {
1031 r = pm_runtime_get_sync(connector->dev->dev);
1032 if (r < 0)
1033 return connector_status_disconnected;
1034 }
1035
1036 encoder = radeon_best_single_encoder(connector);
1037 if (!encoder)
1038 ret = connector_status_disconnected;
1039
1040 if (radeon_connector->ddc_bus)
1041 dret = radeon_ddc_probe(radeon_connector, false);
1042 if (dret) {
1043 radeon_connector->detected_by_load = false;
1044 radeon_connector_free_edid(connector);
1045 radeon_connector_get_edid(connector);
1046
1047 if (!radeon_connector->edid) {
1048 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
1049 connector->name);
1050 ret = connector_status_connected;
1051 } else {
1052 radeon_connector->use_digital =
1053 !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
1054
1055
1056
1057
1058 if (radeon_connector->use_digital && radeon_connector->shared_ddc) {
1059 radeon_connector_free_edid(connector);
1060 ret = connector_status_disconnected;
1061 } else {
1062 ret = connector_status_connected;
1063 }
1064 }
1065 } else {
1066
1067
1068 if (!force) {
1069
1070
1071
1072 if (radeon_connector->detected_by_load)
1073 ret = connector->status;
1074 goto out;
1075 }
1076
1077 if (radeon_connector->dac_load_detect && encoder) {
1078 encoder_funcs = encoder->helper_private;
1079 ret = encoder_funcs->detect(encoder, connector);
1080 if (ret != connector_status_disconnected)
1081 radeon_connector->detected_by_load = true;
1082 }
1083 }
1084
1085 if (ret == connector_status_connected)
1086 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
1087
1088
1089
1090
1091
1092 if ((!rdev->is_atom_bios) &&
1093 (ret == connector_status_disconnected) &&
1094 rdev->mode_info.bios_hardcoded_edid_size) {
1095 ret = connector_status_connected;
1096 }
1097
1098 radeon_connector_update_scratch_regs(connector, ret);
1099
1100 out:
1101 if (!drm_kms_helper_is_poll_worker()) {
1102 pm_runtime_mark_last_busy(connector->dev->dev);
1103 pm_runtime_put_autosuspend(connector->dev->dev);
1104 }
1105
1106 return ret;
1107 }
1108
1109 static const struct drm_connector_helper_funcs radeon_vga_connector_helper_funcs = {
1110 .get_modes = radeon_vga_get_modes,
1111 .mode_valid = radeon_vga_mode_valid,
1112 .best_encoder = radeon_best_single_encoder,
1113 };
1114
1115 static const struct drm_connector_funcs radeon_vga_connector_funcs = {
1116 .dpms = drm_helper_connector_dpms,
1117 .detect = radeon_vga_detect,
1118 .fill_modes = drm_helper_probe_single_connector_modes,
1119 .early_unregister = radeon_connector_unregister,
1120 .destroy = radeon_connector_destroy,
1121 .set_property = radeon_connector_set_property,
1122 };
1123
1124 static int radeon_tv_get_modes(struct drm_connector *connector)
1125 {
1126 struct drm_device *dev = connector->dev;
1127 struct radeon_device *rdev = dev->dev_private;
1128 struct drm_display_mode *tv_mode;
1129 struct drm_encoder *encoder;
1130
1131 encoder = radeon_best_single_encoder(connector);
1132 if (!encoder)
1133 return 0;
1134
1135
1136 if (rdev->family >= CHIP_RS600)
1137
1138 radeon_add_common_modes(encoder, connector);
1139 else {
1140
1141 tv_mode = drm_cvt_mode(dev, 800, 600, 60, false, false, false);
1142 tv_mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
1143 drm_mode_probed_add(connector, tv_mode);
1144 }
1145 return 1;
1146 }
1147
1148 static enum drm_mode_status radeon_tv_mode_valid(struct drm_connector *connector,
1149 struct drm_display_mode *mode)
1150 {
1151 if ((mode->hdisplay > 1024) || (mode->vdisplay > 768))
1152 return MODE_CLOCK_RANGE;
1153 return MODE_OK;
1154 }
1155
1156 static enum drm_connector_status
1157 radeon_tv_detect(struct drm_connector *connector, bool force)
1158 {
1159 struct drm_encoder *encoder;
1160 const struct drm_encoder_helper_funcs *encoder_funcs;
1161 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1162 enum drm_connector_status ret = connector_status_disconnected;
1163 int r;
1164
1165 if (!radeon_connector->dac_load_detect)
1166 return ret;
1167
1168 if (!drm_kms_helper_is_poll_worker()) {
1169 r = pm_runtime_get_sync(connector->dev->dev);
1170 if (r < 0)
1171 return connector_status_disconnected;
1172 }
1173
1174 encoder = radeon_best_single_encoder(connector);
1175 if (!encoder)
1176 ret = connector_status_disconnected;
1177 else {
1178 encoder_funcs = encoder->helper_private;
1179 ret = encoder_funcs->detect(encoder, connector);
1180 }
1181 if (ret == connector_status_connected)
1182 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, false);
1183 radeon_connector_update_scratch_regs(connector, ret);
1184
1185 if (!drm_kms_helper_is_poll_worker()) {
1186 pm_runtime_mark_last_busy(connector->dev->dev);
1187 pm_runtime_put_autosuspend(connector->dev->dev);
1188 }
1189
1190 return ret;
1191 }
1192
1193 static const struct drm_connector_helper_funcs radeon_tv_connector_helper_funcs = {
1194 .get_modes = radeon_tv_get_modes,
1195 .mode_valid = radeon_tv_mode_valid,
1196 .best_encoder = radeon_best_single_encoder,
1197 };
1198
1199 static const struct drm_connector_funcs radeon_tv_connector_funcs = {
1200 .dpms = drm_helper_connector_dpms,
1201 .detect = radeon_tv_detect,
1202 .fill_modes = drm_helper_probe_single_connector_modes,
1203 .early_unregister = radeon_connector_unregister,
1204 .destroy = radeon_connector_destroy,
1205 .set_property = radeon_connector_set_property,
1206 };
1207
1208 static bool radeon_check_hpd_status_unchanged(struct drm_connector *connector)
1209 {
1210 struct drm_device *dev = connector->dev;
1211 struct radeon_device *rdev = dev->dev_private;
1212 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1213 enum drm_connector_status status;
1214
1215
1216 if (rdev->family >= CHIP_R600
1217 && radeon_connector->hpd.hpd != RADEON_HPD_NONE) {
1218 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd))
1219 status = connector_status_connected;
1220 else
1221 status = connector_status_disconnected;
1222 if (connector->status == status)
1223 return true;
1224 }
1225
1226 return false;
1227 }
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240 static enum drm_connector_status
1241 radeon_dvi_detect(struct drm_connector *connector, bool force)
1242 {
1243 struct drm_device *dev = connector->dev;
1244 struct radeon_device *rdev = dev->dev_private;
1245 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1246 struct drm_encoder *encoder = NULL;
1247 const struct drm_encoder_helper_funcs *encoder_funcs;
1248 int r;
1249 enum drm_connector_status ret = connector_status_disconnected;
1250 bool dret = false, broken_edid = false;
1251
1252 if (!drm_kms_helper_is_poll_worker()) {
1253 r = pm_runtime_get_sync(connector->dev->dev);
1254 if (r < 0)
1255 return connector_status_disconnected;
1256 }
1257
1258 if (radeon_connector->detected_hpd_without_ddc) {
1259 force = true;
1260 radeon_connector->detected_hpd_without_ddc = false;
1261 }
1262
1263 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1264 ret = connector->status;
1265 goto exit;
1266 }
1267
1268 if (radeon_connector->ddc_bus) {
1269 dret = radeon_ddc_probe(radeon_connector, false);
1270
1271
1272
1273
1274
1275 if (!dret && !force &&
1276 connector->status != connector_status_connected) {
1277 DRM_DEBUG_KMS("hpd detected without ddc, retrying in 1 second\n");
1278 radeon_connector->detected_hpd_without_ddc = true;
1279 schedule_delayed_work(&rdev->hotplug_work,
1280 msecs_to_jiffies(1000));
1281 goto exit;
1282 }
1283 }
1284 if (dret) {
1285 radeon_connector->detected_by_load = false;
1286 radeon_connector_free_edid(connector);
1287 radeon_connector_get_edid(connector);
1288
1289 if (!radeon_connector->edid) {
1290 DRM_ERROR("%s: probed a monitor but no|invalid EDID\n",
1291 connector->name);
1292
1293
1294 if ((rdev->family == CHIP_RS690 || rdev->family == CHIP_RS740) &&
1295 radeon_connector->base.null_edid_counter) {
1296 ret = connector_status_disconnected;
1297 DRM_ERROR("%s: detected RS690 floating bus bug, stopping ddc detect\n",
1298 connector->name);
1299 radeon_connector->ddc_bus = NULL;
1300 } else {
1301 ret = connector_status_connected;
1302 broken_edid = true;
1303 }
1304 } else {
1305 radeon_connector->use_digital =
1306 !!(radeon_connector->edid->input & DRM_EDID_INPUT_DIGITAL);
1307
1308
1309
1310
1311 if ((!radeon_connector->use_digital) && radeon_connector->shared_ddc) {
1312 radeon_connector_free_edid(connector);
1313 ret = connector_status_disconnected;
1314 } else {
1315 ret = connector_status_connected;
1316 }
1317
1318
1319
1320
1321
1322 if (radeon_connector->shared_ddc && (ret == connector_status_connected)) {
1323 struct drm_connector *list_connector;
1324 struct radeon_connector *list_radeon_connector;
1325 list_for_each_entry(list_connector, &dev->mode_config.connector_list, head) {
1326 if (connector == list_connector)
1327 continue;
1328 list_radeon_connector = to_radeon_connector(list_connector);
1329 if (list_radeon_connector->shared_ddc &&
1330 (list_radeon_connector->ddc_bus->rec.i2c_id ==
1331 radeon_connector->ddc_bus->rec.i2c_id)) {
1332
1333 if (list_connector->connector_type != DRM_MODE_CONNECTOR_VGA) {
1334
1335 if (!radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
1336 radeon_connector_free_edid(connector);
1337 ret = connector_status_disconnected;
1338 }
1339 }
1340 }
1341 }
1342 }
1343 }
1344 }
1345
1346 if ((ret == connector_status_connected) && (radeon_connector->use_digital == true))
1347 goto out;
1348
1349
1350 if ((connector->connector_type == DRM_MODE_CONNECTOR_DVID) ||
1351 (connector->connector_type == DRM_MODE_CONNECTOR_HDMIA))
1352 goto out;
1353
1354
1355 if (!force) {
1356
1357
1358
1359 if (radeon_connector->detected_by_load)
1360 ret = connector->status;
1361 goto out;
1362 }
1363
1364
1365 if (radeon_connector->dac_load_detect) {
1366 int i;
1367
1368 drm_connector_for_each_possible_encoder(connector, encoder, i) {
1369 if (encoder->encoder_type != DRM_MODE_ENCODER_DAC &&
1370 encoder->encoder_type != DRM_MODE_ENCODER_TVDAC)
1371 continue;
1372
1373 encoder_funcs = encoder->helper_private;
1374 if (encoder_funcs->detect) {
1375 if (!broken_edid) {
1376 if (ret != connector_status_connected) {
1377
1378 ret = encoder_funcs->detect(encoder, connector);
1379 if (ret == connector_status_connected) {
1380 radeon_connector->use_digital = false;
1381 }
1382 if (ret != connector_status_disconnected)
1383 radeon_connector->detected_by_load = true;
1384 }
1385 } else {
1386 enum drm_connector_status lret;
1387
1388 radeon_connector->use_digital = true;
1389 lret = encoder_funcs->detect(encoder, connector);
1390 DRM_DEBUG_KMS("load_detect %x returned: %x\n",encoder->encoder_type,lret);
1391 if (lret == connector_status_connected)
1392 radeon_connector->use_digital = false;
1393 }
1394 break;
1395 }
1396 }
1397 }
1398
1399 if ((ret == connector_status_connected) && (radeon_connector->use_digital == false) &&
1400 encoder) {
1401 ret = radeon_connector_analog_encoder_conflict_solve(connector, encoder, ret, true);
1402 }
1403
1404
1405
1406
1407
1408
1409
1410 out:
1411 if ((!rdev->is_atom_bios) &&
1412 (ret == connector_status_disconnected) &&
1413 rdev->mode_info.bios_hardcoded_edid_size) {
1414 radeon_connector->use_digital = true;
1415 ret = connector_status_connected;
1416 }
1417
1418
1419 radeon_connector_update_scratch_regs(connector, ret);
1420
1421 if ((radeon_audio != 0) && radeon_connector->use_digital) {
1422 const struct drm_connector_helper_funcs *connector_funcs =
1423 connector->helper_private;
1424
1425 encoder = connector_funcs->best_encoder(connector);
1426 if (encoder && (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)) {
1427 radeon_connector_get_edid(connector);
1428 radeon_audio_detect(connector, encoder, ret);
1429 }
1430 }
1431
1432 exit:
1433 if (!drm_kms_helper_is_poll_worker()) {
1434 pm_runtime_mark_last_busy(connector->dev->dev);
1435 pm_runtime_put_autosuspend(connector->dev->dev);
1436 }
1437
1438 return ret;
1439 }
1440
1441
1442 static struct drm_encoder *radeon_dvi_encoder(struct drm_connector *connector)
1443 {
1444 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1445 struct drm_encoder *encoder;
1446 int i;
1447
1448 drm_connector_for_each_possible_encoder(connector, encoder, i) {
1449 if (radeon_connector->use_digital == true) {
1450 if (encoder->encoder_type == DRM_MODE_ENCODER_TMDS)
1451 return encoder;
1452 } else {
1453 if (encoder->encoder_type == DRM_MODE_ENCODER_DAC ||
1454 encoder->encoder_type == DRM_MODE_ENCODER_TVDAC)
1455 return encoder;
1456 }
1457 }
1458
1459
1460
1461
1462
1463 drm_connector_for_each_possible_encoder(connector, encoder, i)
1464 return encoder;
1465
1466 return NULL;
1467 }
1468
1469 static void radeon_dvi_force(struct drm_connector *connector)
1470 {
1471 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1472 if (connector->force == DRM_FORCE_ON)
1473 radeon_connector->use_digital = false;
1474 if (connector->force == DRM_FORCE_ON_DIGITAL)
1475 radeon_connector->use_digital = true;
1476 }
1477
1478 static enum drm_mode_status radeon_dvi_mode_valid(struct drm_connector *connector,
1479 struct drm_display_mode *mode)
1480 {
1481 struct drm_device *dev = connector->dev;
1482 struct radeon_device *rdev = dev->dev_private;
1483 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1484
1485
1486
1487
1488 if (radeon_connector->use_digital &&
1489 (rdev->family == CHIP_RV100) &&
1490 (mode->clock > 135000))
1491 return MODE_CLOCK_HIGH;
1492
1493 if (radeon_connector->use_digital && (mode->clock > 165000)) {
1494 if ((radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I) ||
1495 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D) ||
1496 (radeon_connector->connector_object_id == CONNECTOR_OBJECT_ID_HDMI_TYPE_B))
1497 return MODE_OK;
1498 else if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
1499
1500 if (mode->clock > 340000)
1501 return MODE_CLOCK_HIGH;
1502 else
1503 return MODE_OK;
1504 } else {
1505 return MODE_CLOCK_HIGH;
1506 }
1507 }
1508
1509
1510 if ((mode->clock / 10) > rdev->clock.max_pixel_clock)
1511 return MODE_CLOCK_HIGH;
1512
1513 return MODE_OK;
1514 }
1515
1516 static const struct drm_connector_helper_funcs radeon_dvi_connector_helper_funcs = {
1517 .get_modes = radeon_vga_get_modes,
1518 .mode_valid = radeon_dvi_mode_valid,
1519 .best_encoder = radeon_dvi_encoder,
1520 };
1521
1522 static const struct drm_connector_funcs radeon_dvi_connector_funcs = {
1523 .dpms = drm_helper_connector_dpms,
1524 .detect = radeon_dvi_detect,
1525 .fill_modes = drm_helper_probe_single_connector_modes,
1526 .set_property = radeon_connector_set_property,
1527 .early_unregister = radeon_connector_unregister,
1528 .destroy = radeon_connector_destroy,
1529 .force = radeon_dvi_force,
1530 };
1531
1532 static int radeon_dp_get_modes(struct drm_connector *connector)
1533 {
1534 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1535 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1536 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1537 int ret;
1538
1539 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1540 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
1541 struct drm_display_mode *mode;
1542
1543 if (connector->connector_type == DRM_MODE_CONNECTOR_eDP) {
1544 if (!radeon_dig_connector->edp_on)
1545 atombios_set_edp_panel_power(connector,
1546 ATOM_TRANSMITTER_ACTION_POWER_ON);
1547 radeon_connector_get_edid(connector);
1548 ret = radeon_ddc_get_modes(connector);
1549 if (!radeon_dig_connector->edp_on)
1550 atombios_set_edp_panel_power(connector,
1551 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1552 } else {
1553
1554 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1555 ENCODER_OBJECT_ID_NONE) {
1556 if (encoder)
1557 radeon_atom_ext_encoder_setup_ddc(encoder);
1558 }
1559 radeon_connector_get_edid(connector);
1560 ret = radeon_ddc_get_modes(connector);
1561 }
1562
1563 if (ret > 0) {
1564 if (encoder) {
1565 radeon_fixup_lvds_native_mode(encoder, connector);
1566
1567 radeon_add_common_modes(encoder, connector);
1568 }
1569 return ret;
1570 }
1571
1572 if (!encoder)
1573 return 0;
1574
1575
1576 mode = radeon_fp_native_mode(encoder);
1577 if (mode) {
1578 ret = 1;
1579 drm_mode_probed_add(connector, mode);
1580
1581 connector->display_info.width_mm = mode->width_mm;
1582 connector->display_info.height_mm = mode->height_mm;
1583
1584 radeon_add_common_modes(encoder, connector);
1585 }
1586 } else {
1587
1588 if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1589 ENCODER_OBJECT_ID_NONE) {
1590 if (encoder)
1591 radeon_atom_ext_encoder_setup_ddc(encoder);
1592 }
1593 radeon_connector_get_edid(connector);
1594 ret = radeon_ddc_get_modes(connector);
1595
1596 radeon_get_native_mode(connector);
1597 }
1598
1599 return ret;
1600 }
1601
1602 u16 radeon_connector_encoder_get_dp_bridge_encoder_id(struct drm_connector *connector)
1603 {
1604 struct drm_encoder *encoder;
1605 struct radeon_encoder *radeon_encoder;
1606 int i;
1607
1608 drm_connector_for_each_possible_encoder(connector, encoder, i) {
1609 radeon_encoder = to_radeon_encoder(encoder);
1610
1611 switch (radeon_encoder->encoder_id) {
1612 case ENCODER_OBJECT_ID_TRAVIS:
1613 case ENCODER_OBJECT_ID_NUTMEG:
1614 return radeon_encoder->encoder_id;
1615 default:
1616 break;
1617 }
1618 }
1619
1620 return ENCODER_OBJECT_ID_NONE;
1621 }
1622
1623 static bool radeon_connector_encoder_is_hbr2(struct drm_connector *connector)
1624 {
1625 struct drm_encoder *encoder;
1626 struct radeon_encoder *radeon_encoder;
1627 int i;
1628 bool found = false;
1629
1630 drm_connector_for_each_possible_encoder(connector, encoder, i) {
1631 radeon_encoder = to_radeon_encoder(encoder);
1632 if (radeon_encoder->caps & ATOM_ENCODER_CAP_RECORD_HBR2)
1633 found = true;
1634 }
1635
1636 return found;
1637 }
1638
1639 bool radeon_connector_is_dp12_capable(struct drm_connector *connector)
1640 {
1641 struct drm_device *dev = connector->dev;
1642 struct radeon_device *rdev = dev->dev_private;
1643
1644 if (ASIC_IS_DCE5(rdev) &&
1645 (rdev->clock.default_dispclk >= 53900) &&
1646 radeon_connector_encoder_is_hbr2(connector)) {
1647 return true;
1648 }
1649
1650 return false;
1651 }
1652
1653 static enum drm_connector_status
1654 radeon_dp_detect(struct drm_connector *connector, bool force)
1655 {
1656 struct drm_device *dev = connector->dev;
1657 struct radeon_device *rdev = dev->dev_private;
1658 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1659 enum drm_connector_status ret = connector_status_disconnected;
1660 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1661 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1662 int r;
1663
1664 if (radeon_dig_connector->is_mst)
1665 return connector_status_disconnected;
1666
1667 if (!drm_kms_helper_is_poll_worker()) {
1668 r = pm_runtime_get_sync(connector->dev->dev);
1669 if (r < 0)
1670 return connector_status_disconnected;
1671 }
1672
1673 if (!force && radeon_check_hpd_status_unchanged(connector)) {
1674 ret = connector->status;
1675 goto out;
1676 }
1677
1678 radeon_connector_free_edid(connector);
1679
1680 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1681 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
1682 if (encoder) {
1683 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1684 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1685
1686
1687 if (native_mode->hdisplay >= 320 && native_mode->vdisplay >= 240)
1688 ret = connector_status_connected;
1689
1690
1691
1692 if ((rdev->flags & RADEON_IS_PX) && (radeon_runtime_pm != 0))
1693 ret = connector_status_disconnected;
1694 }
1695
1696 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
1697 if (!radeon_dig_connector->edp_on)
1698 atombios_set_edp_panel_power(connector,
1699 ATOM_TRANSMITTER_ACTION_POWER_ON);
1700 if (radeon_dp_getdpcd(radeon_connector))
1701 ret = connector_status_connected;
1702 if (!radeon_dig_connector->edp_on)
1703 atombios_set_edp_panel_power(connector,
1704 ATOM_TRANSMITTER_ACTION_POWER_OFF);
1705 } else if (radeon_connector_encoder_get_dp_bridge_encoder_id(connector) !=
1706 ENCODER_OBJECT_ID_NONE) {
1707
1708 radeon_dig_connector->dp_sink_type = CONNECTOR_OBJECT_ID_DISPLAYPORT;
1709
1710 radeon_dp_getdpcd(radeon_connector);
1711
1712 if (encoder) {
1713
1714 radeon_atom_ext_encoder_setup_ddc(encoder);
1715
1716 if (radeon_ddc_probe(radeon_connector, true))
1717 ret = connector_status_connected;
1718 else if (radeon_connector->dac_load_detect) {
1719 const struct drm_encoder_helper_funcs *encoder_funcs = encoder->helper_private;
1720 ret = encoder_funcs->detect(encoder, connector);
1721 }
1722 }
1723 } else {
1724 radeon_dig_connector->dp_sink_type = radeon_dp_getsinktype(radeon_connector);
1725 if (radeon_hpd_sense(rdev, radeon_connector->hpd.hpd)) {
1726 ret = connector_status_connected;
1727 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
1728 radeon_dp_getdpcd(radeon_connector);
1729 r = radeon_dp_mst_probe(radeon_connector);
1730 if (r == 1)
1731 ret = connector_status_disconnected;
1732 }
1733 } else {
1734 if (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) {
1735 if (radeon_dp_getdpcd(radeon_connector)) {
1736 r = radeon_dp_mst_probe(radeon_connector);
1737 if (r == 1)
1738 ret = connector_status_disconnected;
1739 else
1740 ret = connector_status_connected;
1741 }
1742 } else {
1743
1744 if (radeon_ddc_probe(radeon_connector, false))
1745 ret = connector_status_connected;
1746 }
1747 }
1748 }
1749
1750 radeon_connector_update_scratch_regs(connector, ret);
1751
1752 if ((radeon_audio != 0) && encoder) {
1753 radeon_connector_get_edid(connector);
1754 radeon_audio_detect(connector, encoder, ret);
1755 }
1756
1757 out:
1758 if (!drm_kms_helper_is_poll_worker()) {
1759 pm_runtime_mark_last_busy(connector->dev->dev);
1760 pm_runtime_put_autosuspend(connector->dev->dev);
1761 }
1762
1763 return ret;
1764 }
1765
1766 static enum drm_mode_status radeon_dp_mode_valid(struct drm_connector *connector,
1767 struct drm_display_mode *mode)
1768 {
1769 struct drm_device *dev = connector->dev;
1770 struct radeon_device *rdev = dev->dev_private;
1771 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
1772 struct radeon_connector_atom_dig *radeon_dig_connector = radeon_connector->con_priv;
1773
1774
1775
1776 if ((connector->connector_type == DRM_MODE_CONNECTOR_eDP) ||
1777 (connector->connector_type == DRM_MODE_CONNECTOR_LVDS)) {
1778 struct drm_encoder *encoder = radeon_best_single_encoder(connector);
1779
1780 if ((mode->hdisplay < 320) || (mode->vdisplay < 240))
1781 return MODE_PANEL;
1782
1783 if (encoder) {
1784 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1785 struct drm_display_mode *native_mode = &radeon_encoder->native_mode;
1786
1787
1788
1789
1790 if ((mode->hdisplay > native_mode->hdisplay) ||
1791 (mode->vdisplay > native_mode->vdisplay))
1792 return MODE_PANEL;
1793
1794
1795 if (radeon_encoder->rmx_type == RMX_OFF) {
1796 if ((mode->hdisplay != native_mode->hdisplay) ||
1797 (mode->vdisplay != native_mode->vdisplay))
1798 return MODE_PANEL;
1799 }
1800 }
1801 } else {
1802 if ((radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
1803 (radeon_dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) {
1804 return radeon_dp_mode_valid_helper(connector, mode);
1805 } else {
1806 if (ASIC_IS_DCE6(rdev) && drm_detect_hdmi_monitor(radeon_connector_edid(connector))) {
1807
1808 if (mode->clock > 340000)
1809 return MODE_CLOCK_HIGH;
1810 } else {
1811 if (mode->clock > 165000)
1812 return MODE_CLOCK_HIGH;
1813 }
1814 }
1815 }
1816
1817 return MODE_OK;
1818 }
1819
1820 static const struct drm_connector_helper_funcs radeon_dp_connector_helper_funcs = {
1821 .get_modes = radeon_dp_get_modes,
1822 .mode_valid = radeon_dp_mode_valid,
1823 .best_encoder = radeon_dvi_encoder,
1824 };
1825
1826 static const struct drm_connector_funcs radeon_dp_connector_funcs = {
1827 .dpms = drm_helper_connector_dpms,
1828 .detect = radeon_dp_detect,
1829 .fill_modes = drm_helper_probe_single_connector_modes,
1830 .set_property = radeon_connector_set_property,
1831 .early_unregister = radeon_connector_unregister,
1832 .destroy = radeon_connector_destroy,
1833 .force = radeon_dvi_force,
1834 };
1835
1836 static const struct drm_connector_funcs radeon_edp_connector_funcs = {
1837 .dpms = drm_helper_connector_dpms,
1838 .detect = radeon_dp_detect,
1839 .fill_modes = drm_helper_probe_single_connector_modes,
1840 .set_property = radeon_lvds_set_property,
1841 .early_unregister = radeon_connector_unregister,
1842 .destroy = radeon_connector_destroy,
1843 .force = radeon_dvi_force,
1844 };
1845
1846 static const struct drm_connector_funcs radeon_lvds_bridge_connector_funcs = {
1847 .dpms = drm_helper_connector_dpms,
1848 .detect = radeon_dp_detect,
1849 .fill_modes = drm_helper_probe_single_connector_modes,
1850 .set_property = radeon_lvds_set_property,
1851 .early_unregister = radeon_connector_unregister,
1852 .destroy = radeon_connector_destroy,
1853 .force = radeon_dvi_force,
1854 };
1855
1856 void
1857 radeon_add_atom_connector(struct drm_device *dev,
1858 uint32_t connector_id,
1859 uint32_t supported_device,
1860 int connector_type,
1861 struct radeon_i2c_bus_rec *i2c_bus,
1862 uint32_t igp_lane_info,
1863 uint16_t connector_object_id,
1864 struct radeon_hpd *hpd,
1865 struct radeon_router *router)
1866 {
1867 struct radeon_device *rdev = dev->dev_private;
1868 struct drm_connector *connector;
1869 struct radeon_connector *radeon_connector;
1870 struct radeon_connector_atom_dig *radeon_dig_connector;
1871 struct drm_encoder *encoder;
1872 struct radeon_encoder *radeon_encoder;
1873 uint32_t subpixel_order = SubPixelNone;
1874 bool shared_ddc = false;
1875 bool is_dp_bridge = false;
1876 bool has_aux = false;
1877
1878 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
1879 return;
1880
1881
1882 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
1883 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
1884 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
1885 (radeon_tv == 0))
1886 return;
1887
1888
1889 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1890 radeon_connector = to_radeon_connector(connector);
1891 if (radeon_connector->connector_id == connector_id) {
1892 radeon_connector->devices |= supported_device;
1893 return;
1894 }
1895 if (radeon_connector->ddc_bus && i2c_bus->valid) {
1896 if (radeon_connector->ddc_bus->rec.i2c_id == i2c_bus->i2c_id) {
1897 radeon_connector->shared_ddc = true;
1898 shared_ddc = true;
1899 }
1900 if (radeon_connector->router_bus && router->ddc_valid &&
1901 (radeon_connector->router.router_id == router->router_id)) {
1902 radeon_connector->shared_ddc = false;
1903 shared_ddc = false;
1904 }
1905 }
1906 }
1907
1908
1909 list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {
1910 radeon_encoder = to_radeon_encoder(encoder);
1911 if (radeon_encoder->devices & supported_device) {
1912 switch (radeon_encoder->encoder_id) {
1913 case ENCODER_OBJECT_ID_TRAVIS:
1914 case ENCODER_OBJECT_ID_NUTMEG:
1915 is_dp_bridge = true;
1916 break;
1917 default:
1918 break;
1919 }
1920 }
1921 }
1922
1923 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
1924 if (!radeon_connector)
1925 return;
1926
1927 connector = &radeon_connector->base;
1928
1929 radeon_connector->connector_id = connector_id;
1930 radeon_connector->devices = supported_device;
1931 radeon_connector->shared_ddc = shared_ddc;
1932 radeon_connector->connector_object_id = connector_object_id;
1933 radeon_connector->hpd = *hpd;
1934
1935 radeon_connector->router = *router;
1936 if (router->ddc_valid || router->cd_valid) {
1937 radeon_connector->router_bus = radeon_i2c_lookup(rdev, &router->i2c_info);
1938 if (!radeon_connector->router_bus)
1939 DRM_ERROR("Failed to assign router i2c bus! Check dmesg for i2c errors.\n");
1940 }
1941
1942 if (is_dp_bridge) {
1943 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
1944 if (!radeon_dig_connector)
1945 goto failed;
1946 radeon_dig_connector->igp_lane_info = igp_lane_info;
1947 radeon_connector->con_priv = radeon_dig_connector;
1948 if (i2c_bus->valid) {
1949 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
1950 if (radeon_connector->ddc_bus)
1951 has_aux = true;
1952 else
1953 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
1954 }
1955 switch (connector_type) {
1956 case DRM_MODE_CONNECTOR_VGA:
1957 case DRM_MODE_CONNECTOR_DVIA:
1958 default:
1959 drm_connector_init(dev, &radeon_connector->base,
1960 &radeon_dp_connector_funcs, connector_type);
1961 drm_connector_helper_add(&radeon_connector->base,
1962 &radeon_dp_connector_helper_funcs);
1963 connector->interlace_allowed = true;
1964 connector->doublescan_allowed = true;
1965 radeon_connector->dac_load_detect = true;
1966 drm_object_attach_property(&radeon_connector->base.base,
1967 rdev->mode_info.load_detect_property,
1968 1);
1969 drm_object_attach_property(&radeon_connector->base.base,
1970 dev->mode_config.scaling_mode_property,
1971 DRM_MODE_SCALE_NONE);
1972 if (ASIC_IS_DCE5(rdev))
1973 drm_object_attach_property(&radeon_connector->base.base,
1974 rdev->mode_info.output_csc_property,
1975 RADEON_OUTPUT_CSC_BYPASS);
1976 break;
1977 case DRM_MODE_CONNECTOR_DVII:
1978 case DRM_MODE_CONNECTOR_DVID:
1979 case DRM_MODE_CONNECTOR_HDMIA:
1980 case DRM_MODE_CONNECTOR_HDMIB:
1981 case DRM_MODE_CONNECTOR_DisplayPort:
1982 drm_connector_init(dev, &radeon_connector->base,
1983 &radeon_dp_connector_funcs, connector_type);
1984 drm_connector_helper_add(&radeon_connector->base,
1985 &radeon_dp_connector_helper_funcs);
1986 drm_object_attach_property(&radeon_connector->base.base,
1987 rdev->mode_info.underscan_property,
1988 UNDERSCAN_OFF);
1989 drm_object_attach_property(&radeon_connector->base.base,
1990 rdev->mode_info.underscan_hborder_property,
1991 0);
1992 drm_object_attach_property(&radeon_connector->base.base,
1993 rdev->mode_info.underscan_vborder_property,
1994 0);
1995
1996 drm_object_attach_property(&radeon_connector->base.base,
1997 dev->mode_config.scaling_mode_property,
1998 DRM_MODE_SCALE_NONE);
1999
2000 drm_object_attach_property(&radeon_connector->base.base,
2001 rdev->mode_info.dither_property,
2002 RADEON_FMT_DITHER_DISABLE);
2003
2004 if (radeon_audio != 0) {
2005 drm_object_attach_property(&radeon_connector->base.base,
2006 rdev->mode_info.audio_property,
2007 RADEON_AUDIO_AUTO);
2008 radeon_connector->audio = RADEON_AUDIO_AUTO;
2009 }
2010 if (ASIC_IS_DCE5(rdev))
2011 drm_object_attach_property(&radeon_connector->base.base,
2012 rdev->mode_info.output_csc_property,
2013 RADEON_OUTPUT_CSC_BYPASS);
2014
2015 subpixel_order = SubPixelHorizontalRGB;
2016 connector->interlace_allowed = true;
2017 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
2018 connector->doublescan_allowed = true;
2019 else
2020 connector->doublescan_allowed = false;
2021 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
2022 radeon_connector->dac_load_detect = true;
2023 drm_object_attach_property(&radeon_connector->base.base,
2024 rdev->mode_info.load_detect_property,
2025 1);
2026 }
2027 break;
2028 case DRM_MODE_CONNECTOR_LVDS:
2029 case DRM_MODE_CONNECTOR_eDP:
2030 drm_connector_init(dev, &radeon_connector->base,
2031 &radeon_lvds_bridge_connector_funcs, connector_type);
2032 drm_connector_helper_add(&radeon_connector->base,
2033 &radeon_dp_connector_helper_funcs);
2034 drm_object_attach_property(&radeon_connector->base.base,
2035 dev->mode_config.scaling_mode_property,
2036 DRM_MODE_SCALE_FULLSCREEN);
2037 subpixel_order = SubPixelHorizontalRGB;
2038 connector->interlace_allowed = false;
2039 connector->doublescan_allowed = false;
2040 break;
2041 }
2042 } else {
2043 switch (connector_type) {
2044 case DRM_MODE_CONNECTOR_VGA:
2045 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
2046 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
2047 if (i2c_bus->valid) {
2048 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2049 if (!radeon_connector->ddc_bus)
2050 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2051 }
2052 radeon_connector->dac_load_detect = true;
2053 drm_object_attach_property(&radeon_connector->base.base,
2054 rdev->mode_info.load_detect_property,
2055 1);
2056 if (ASIC_IS_AVIVO(rdev))
2057 drm_object_attach_property(&radeon_connector->base.base,
2058 dev->mode_config.scaling_mode_property,
2059 DRM_MODE_SCALE_NONE);
2060 if (ASIC_IS_DCE5(rdev))
2061 drm_object_attach_property(&radeon_connector->base.base,
2062 rdev->mode_info.output_csc_property,
2063 RADEON_OUTPUT_CSC_BYPASS);
2064
2065 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2066 connector->interlace_allowed = true;
2067 connector->doublescan_allowed = true;
2068 break;
2069 case DRM_MODE_CONNECTOR_DVIA:
2070 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
2071 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
2072 if (i2c_bus->valid) {
2073 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2074 if (!radeon_connector->ddc_bus)
2075 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2076 }
2077 radeon_connector->dac_load_detect = true;
2078 drm_object_attach_property(&radeon_connector->base.base,
2079 rdev->mode_info.load_detect_property,
2080 1);
2081 if (ASIC_IS_AVIVO(rdev))
2082 drm_object_attach_property(&radeon_connector->base.base,
2083 dev->mode_config.scaling_mode_property,
2084 DRM_MODE_SCALE_NONE);
2085 if (ASIC_IS_DCE5(rdev))
2086 drm_object_attach_property(&radeon_connector->base.base,
2087 rdev->mode_info.output_csc_property,
2088 RADEON_OUTPUT_CSC_BYPASS);
2089
2090 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2091 connector->interlace_allowed = true;
2092 connector->doublescan_allowed = true;
2093 break;
2094 case DRM_MODE_CONNECTOR_DVII:
2095 case DRM_MODE_CONNECTOR_DVID:
2096 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2097 if (!radeon_dig_connector)
2098 goto failed;
2099 radeon_dig_connector->igp_lane_info = igp_lane_info;
2100 radeon_connector->con_priv = radeon_dig_connector;
2101 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
2102 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
2103 if (i2c_bus->valid) {
2104 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2105 if (!radeon_connector->ddc_bus)
2106 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2107 }
2108 subpixel_order = SubPixelHorizontalRGB;
2109 drm_object_attach_property(&radeon_connector->base.base,
2110 rdev->mode_info.coherent_mode_property,
2111 1);
2112 if (ASIC_IS_AVIVO(rdev)) {
2113 drm_object_attach_property(&radeon_connector->base.base,
2114 rdev->mode_info.underscan_property,
2115 UNDERSCAN_OFF);
2116 drm_object_attach_property(&radeon_connector->base.base,
2117 rdev->mode_info.underscan_hborder_property,
2118 0);
2119 drm_object_attach_property(&radeon_connector->base.base,
2120 rdev->mode_info.underscan_vborder_property,
2121 0);
2122 drm_object_attach_property(&radeon_connector->base.base,
2123 rdev->mode_info.dither_property,
2124 RADEON_FMT_DITHER_DISABLE);
2125 drm_object_attach_property(&radeon_connector->base.base,
2126 dev->mode_config.scaling_mode_property,
2127 DRM_MODE_SCALE_NONE);
2128 }
2129 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
2130 drm_object_attach_property(&radeon_connector->base.base,
2131 rdev->mode_info.audio_property,
2132 RADEON_AUDIO_AUTO);
2133 radeon_connector->audio = RADEON_AUDIO_AUTO;
2134 }
2135 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
2136 radeon_connector->dac_load_detect = true;
2137 drm_object_attach_property(&radeon_connector->base.base,
2138 rdev->mode_info.load_detect_property,
2139 1);
2140 }
2141 if (ASIC_IS_DCE5(rdev))
2142 drm_object_attach_property(&radeon_connector->base.base,
2143 rdev->mode_info.output_csc_property,
2144 RADEON_OUTPUT_CSC_BYPASS);
2145 connector->interlace_allowed = true;
2146 if (connector_type == DRM_MODE_CONNECTOR_DVII)
2147 connector->doublescan_allowed = true;
2148 else
2149 connector->doublescan_allowed = false;
2150 break;
2151 case DRM_MODE_CONNECTOR_HDMIA:
2152 case DRM_MODE_CONNECTOR_HDMIB:
2153 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2154 if (!radeon_dig_connector)
2155 goto failed;
2156 radeon_dig_connector->igp_lane_info = igp_lane_info;
2157 radeon_connector->con_priv = radeon_dig_connector;
2158 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
2159 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
2160 if (i2c_bus->valid) {
2161 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2162 if (!radeon_connector->ddc_bus)
2163 DRM_ERROR("HDMI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2164 }
2165 drm_object_attach_property(&radeon_connector->base.base,
2166 rdev->mode_info.coherent_mode_property,
2167 1);
2168 if (ASIC_IS_AVIVO(rdev)) {
2169 drm_object_attach_property(&radeon_connector->base.base,
2170 rdev->mode_info.underscan_property,
2171 UNDERSCAN_OFF);
2172 drm_object_attach_property(&radeon_connector->base.base,
2173 rdev->mode_info.underscan_hborder_property,
2174 0);
2175 drm_object_attach_property(&radeon_connector->base.base,
2176 rdev->mode_info.underscan_vborder_property,
2177 0);
2178 drm_object_attach_property(&radeon_connector->base.base,
2179 rdev->mode_info.dither_property,
2180 RADEON_FMT_DITHER_DISABLE);
2181 drm_object_attach_property(&radeon_connector->base.base,
2182 dev->mode_config.scaling_mode_property,
2183 DRM_MODE_SCALE_NONE);
2184 }
2185 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
2186 drm_object_attach_property(&radeon_connector->base.base,
2187 rdev->mode_info.audio_property,
2188 RADEON_AUDIO_AUTO);
2189 radeon_connector->audio = RADEON_AUDIO_AUTO;
2190 }
2191 if (ASIC_IS_DCE5(rdev))
2192 drm_object_attach_property(&radeon_connector->base.base,
2193 rdev->mode_info.output_csc_property,
2194 RADEON_OUTPUT_CSC_BYPASS);
2195 subpixel_order = SubPixelHorizontalRGB;
2196 connector->interlace_allowed = true;
2197 if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
2198 connector->doublescan_allowed = true;
2199 else
2200 connector->doublescan_allowed = false;
2201 break;
2202 case DRM_MODE_CONNECTOR_DisplayPort:
2203 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2204 if (!radeon_dig_connector)
2205 goto failed;
2206 radeon_dig_connector->igp_lane_info = igp_lane_info;
2207 radeon_connector->con_priv = radeon_dig_connector;
2208 drm_connector_init(dev, &radeon_connector->base, &radeon_dp_connector_funcs, connector_type);
2209 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
2210 if (i2c_bus->valid) {
2211 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2212 if (radeon_connector->ddc_bus)
2213 has_aux = true;
2214 else
2215 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2216 }
2217 subpixel_order = SubPixelHorizontalRGB;
2218 drm_object_attach_property(&radeon_connector->base.base,
2219 rdev->mode_info.coherent_mode_property,
2220 1);
2221 if (ASIC_IS_AVIVO(rdev)) {
2222 drm_object_attach_property(&radeon_connector->base.base,
2223 rdev->mode_info.underscan_property,
2224 UNDERSCAN_OFF);
2225 drm_object_attach_property(&radeon_connector->base.base,
2226 rdev->mode_info.underscan_hborder_property,
2227 0);
2228 drm_object_attach_property(&radeon_connector->base.base,
2229 rdev->mode_info.underscan_vborder_property,
2230 0);
2231 drm_object_attach_property(&radeon_connector->base.base,
2232 rdev->mode_info.dither_property,
2233 RADEON_FMT_DITHER_DISABLE);
2234 drm_object_attach_property(&radeon_connector->base.base,
2235 dev->mode_config.scaling_mode_property,
2236 DRM_MODE_SCALE_NONE);
2237 }
2238 if (ASIC_IS_DCE2(rdev) && (radeon_audio != 0)) {
2239 drm_object_attach_property(&radeon_connector->base.base,
2240 rdev->mode_info.audio_property,
2241 RADEON_AUDIO_AUTO);
2242 radeon_connector->audio = RADEON_AUDIO_AUTO;
2243 }
2244 if (ASIC_IS_DCE5(rdev))
2245 drm_object_attach_property(&radeon_connector->base.base,
2246 rdev->mode_info.output_csc_property,
2247 RADEON_OUTPUT_CSC_BYPASS);
2248 connector->interlace_allowed = true;
2249
2250 connector->doublescan_allowed = false;
2251 break;
2252 case DRM_MODE_CONNECTOR_eDP:
2253 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2254 if (!radeon_dig_connector)
2255 goto failed;
2256 radeon_dig_connector->igp_lane_info = igp_lane_info;
2257 radeon_connector->con_priv = radeon_dig_connector;
2258 drm_connector_init(dev, &radeon_connector->base, &radeon_edp_connector_funcs, connector_type);
2259 drm_connector_helper_add(&radeon_connector->base, &radeon_dp_connector_helper_funcs);
2260 if (i2c_bus->valid) {
2261 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2262 if (radeon_connector->ddc_bus)
2263 has_aux = true;
2264 else
2265 DRM_ERROR("DP: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2266 }
2267 drm_object_attach_property(&radeon_connector->base.base,
2268 dev->mode_config.scaling_mode_property,
2269 DRM_MODE_SCALE_FULLSCREEN);
2270 subpixel_order = SubPixelHorizontalRGB;
2271 connector->interlace_allowed = false;
2272 connector->doublescan_allowed = false;
2273 break;
2274 case DRM_MODE_CONNECTOR_SVIDEO:
2275 case DRM_MODE_CONNECTOR_Composite:
2276 case DRM_MODE_CONNECTOR_9PinDIN:
2277 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
2278 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
2279 radeon_connector->dac_load_detect = true;
2280 drm_object_attach_property(&radeon_connector->base.base,
2281 rdev->mode_info.load_detect_property,
2282 1);
2283 drm_object_attach_property(&radeon_connector->base.base,
2284 rdev->mode_info.tv_std_property,
2285 radeon_atombios_get_tv_info(rdev));
2286
2287 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2288 connector->interlace_allowed = false;
2289 connector->doublescan_allowed = false;
2290 break;
2291 case DRM_MODE_CONNECTOR_LVDS:
2292 radeon_dig_connector = kzalloc(sizeof(struct radeon_connector_atom_dig), GFP_KERNEL);
2293 if (!radeon_dig_connector)
2294 goto failed;
2295 radeon_dig_connector->igp_lane_info = igp_lane_info;
2296 radeon_connector->con_priv = radeon_dig_connector;
2297 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
2298 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
2299 if (i2c_bus->valid) {
2300 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2301 if (!radeon_connector->ddc_bus)
2302 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2303 }
2304 drm_object_attach_property(&radeon_connector->base.base,
2305 dev->mode_config.scaling_mode_property,
2306 DRM_MODE_SCALE_FULLSCREEN);
2307 subpixel_order = SubPixelHorizontalRGB;
2308 connector->interlace_allowed = false;
2309 connector->doublescan_allowed = false;
2310 break;
2311 }
2312 }
2313
2314 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
2315 if (i2c_bus->valid) {
2316 connector->polled = DRM_CONNECTOR_POLL_CONNECT |
2317 DRM_CONNECTOR_POLL_DISCONNECT;
2318 }
2319 } else
2320 connector->polled = DRM_CONNECTOR_POLL_HPD;
2321
2322 connector->display_info.subpixel_order = subpixel_order;
2323 drm_connector_register(connector);
2324
2325 if (has_aux)
2326 radeon_dp_aux_init(radeon_connector);
2327
2328 return;
2329
2330 failed:
2331 drm_connector_cleanup(connector);
2332 kfree(connector);
2333 }
2334
2335 void
2336 radeon_add_legacy_connector(struct drm_device *dev,
2337 uint32_t connector_id,
2338 uint32_t supported_device,
2339 int connector_type,
2340 struct radeon_i2c_bus_rec *i2c_bus,
2341 uint16_t connector_object_id,
2342 struct radeon_hpd *hpd)
2343 {
2344 struct radeon_device *rdev = dev->dev_private;
2345 struct drm_connector *connector;
2346 struct radeon_connector *radeon_connector;
2347 uint32_t subpixel_order = SubPixelNone;
2348
2349 if (connector_type == DRM_MODE_CONNECTOR_Unknown)
2350 return;
2351
2352
2353 if (((connector_type == DRM_MODE_CONNECTOR_SVIDEO) ||
2354 (connector_type == DRM_MODE_CONNECTOR_Composite) ||
2355 (connector_type == DRM_MODE_CONNECTOR_9PinDIN)) &&
2356 (radeon_tv == 0))
2357 return;
2358
2359
2360 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
2361 radeon_connector = to_radeon_connector(connector);
2362 if (radeon_connector->connector_id == connector_id) {
2363 radeon_connector->devices |= supported_device;
2364 return;
2365 }
2366 }
2367
2368 radeon_connector = kzalloc(sizeof(struct radeon_connector), GFP_KERNEL);
2369 if (!radeon_connector)
2370 return;
2371
2372 connector = &radeon_connector->base;
2373
2374 radeon_connector->connector_id = connector_id;
2375 radeon_connector->devices = supported_device;
2376 radeon_connector->connector_object_id = connector_object_id;
2377 radeon_connector->hpd = *hpd;
2378
2379 switch (connector_type) {
2380 case DRM_MODE_CONNECTOR_VGA:
2381 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
2382 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
2383 if (i2c_bus->valid) {
2384 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2385 if (!radeon_connector->ddc_bus)
2386 DRM_ERROR("VGA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2387 }
2388 radeon_connector->dac_load_detect = true;
2389 drm_object_attach_property(&radeon_connector->base.base,
2390 rdev->mode_info.load_detect_property,
2391 1);
2392
2393 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2394 connector->interlace_allowed = true;
2395 connector->doublescan_allowed = true;
2396 break;
2397 case DRM_MODE_CONNECTOR_DVIA:
2398 drm_connector_init(dev, &radeon_connector->base, &radeon_vga_connector_funcs, connector_type);
2399 drm_connector_helper_add(&radeon_connector->base, &radeon_vga_connector_helper_funcs);
2400 if (i2c_bus->valid) {
2401 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2402 if (!radeon_connector->ddc_bus)
2403 DRM_ERROR("DVIA: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2404 }
2405 radeon_connector->dac_load_detect = true;
2406 drm_object_attach_property(&radeon_connector->base.base,
2407 rdev->mode_info.load_detect_property,
2408 1);
2409
2410 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2411 connector->interlace_allowed = true;
2412 connector->doublescan_allowed = true;
2413 break;
2414 case DRM_MODE_CONNECTOR_DVII:
2415 case DRM_MODE_CONNECTOR_DVID:
2416 drm_connector_init(dev, &radeon_connector->base, &radeon_dvi_connector_funcs, connector_type);
2417 drm_connector_helper_add(&radeon_connector->base, &radeon_dvi_connector_helper_funcs);
2418 if (i2c_bus->valid) {
2419 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2420 if (!radeon_connector->ddc_bus)
2421 DRM_ERROR("DVI: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2422 }
2423 if (connector_type == DRM_MODE_CONNECTOR_DVII) {
2424 radeon_connector->dac_load_detect = true;
2425 drm_object_attach_property(&radeon_connector->base.base,
2426 rdev->mode_info.load_detect_property,
2427 1);
2428 }
2429 subpixel_order = SubPixelHorizontalRGB;
2430 connector->interlace_allowed = true;
2431 if (connector_type == DRM_MODE_CONNECTOR_DVII)
2432 connector->doublescan_allowed = true;
2433 else
2434 connector->doublescan_allowed = false;
2435 break;
2436 case DRM_MODE_CONNECTOR_SVIDEO:
2437 case DRM_MODE_CONNECTOR_Composite:
2438 case DRM_MODE_CONNECTOR_9PinDIN:
2439 drm_connector_init(dev, &radeon_connector->base, &radeon_tv_connector_funcs, connector_type);
2440 drm_connector_helper_add(&radeon_connector->base, &radeon_tv_connector_helper_funcs);
2441 radeon_connector->dac_load_detect = true;
2442
2443
2444
2445
2446
2447 if (rdev->family == CHIP_RS400 || rdev->family == CHIP_RS480)
2448 radeon_connector->dac_load_detect = false;
2449 drm_object_attach_property(&radeon_connector->base.base,
2450 rdev->mode_info.load_detect_property,
2451 radeon_connector->dac_load_detect);
2452 drm_object_attach_property(&radeon_connector->base.base,
2453 rdev->mode_info.tv_std_property,
2454 radeon_combios_get_tv_info(rdev));
2455
2456 radeon_connector->hpd.hpd = RADEON_HPD_NONE;
2457 connector->interlace_allowed = false;
2458 connector->doublescan_allowed = false;
2459 break;
2460 case DRM_MODE_CONNECTOR_LVDS:
2461 drm_connector_init(dev, &radeon_connector->base, &radeon_lvds_connector_funcs, connector_type);
2462 drm_connector_helper_add(&radeon_connector->base, &radeon_lvds_connector_helper_funcs);
2463 if (i2c_bus->valid) {
2464 radeon_connector->ddc_bus = radeon_i2c_lookup(rdev, i2c_bus);
2465 if (!radeon_connector->ddc_bus)
2466 DRM_ERROR("LVDS: Failed to assign ddc bus! Check dmesg for i2c errors.\n");
2467 }
2468 drm_object_attach_property(&radeon_connector->base.base,
2469 dev->mode_config.scaling_mode_property,
2470 DRM_MODE_SCALE_FULLSCREEN);
2471 subpixel_order = SubPixelHorizontalRGB;
2472 connector->interlace_allowed = false;
2473 connector->doublescan_allowed = false;
2474 break;
2475 }
2476
2477 if (radeon_connector->hpd.hpd == RADEON_HPD_NONE) {
2478 if (i2c_bus->valid) {
2479 connector->polled = DRM_CONNECTOR_POLL_CONNECT |
2480 DRM_CONNECTOR_POLL_DISCONNECT;
2481 }
2482 } else
2483 connector->polled = DRM_CONNECTOR_POLL_HPD;
2484
2485 connector->display_info.subpixel_order = subpixel_order;
2486 drm_connector_register(connector);
2487 }
2488
2489 void radeon_setup_mst_connector(struct drm_device *dev)
2490 {
2491 struct radeon_device *rdev = dev->dev_private;
2492 struct drm_connector *connector;
2493 struct radeon_connector *radeon_connector;
2494
2495 if (!ASIC_IS_DCE5(rdev))
2496 return;
2497
2498 if (radeon_mst == 0)
2499 return;
2500
2501 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
2502 int ret;
2503
2504 radeon_connector = to_radeon_connector(connector);
2505
2506 if (connector->connector_type != DRM_MODE_CONNECTOR_DisplayPort)
2507 continue;
2508
2509 ret = radeon_dp_mst_init(radeon_connector);
2510 }
2511 }