root/drivers/gpu/drm/amd/include/asic_reg/gca/gfx_8_0_d.h

INCLUDED FROM

   1 /*
   2  * GFX_8_0 Register documentation
   3  *
   4  * Copyright (C) 2014  Advanced Micro Devices, Inc.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice shall be included
  14  * in all copies or substantial portions of the Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  17  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  19  * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
  20  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  21  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  22  */
  23 
  24 #ifndef GFX_8_0_D_H
  25 #define GFX_8_0_D_H
  26 
  27 #define mmCB_BLEND_RED                                                          0xa105
  28 #define mmCB_BLEND_GREEN                                                        0xa106
  29 #define mmCB_BLEND_BLUE                                                         0xa107
  30 #define mmCB_BLEND_ALPHA                                                        0xa108
  31 #define mmCB_DCC_CONTROL                                                        0xa109
  32 #define mmCB_COLOR_CONTROL                                                      0xa202
  33 #define mmCB_BLEND0_CONTROL                                                     0xa1e0
  34 #define mmCB_BLEND1_CONTROL                                                     0xa1e1
  35 #define mmCB_BLEND2_CONTROL                                                     0xa1e2
  36 #define mmCB_BLEND3_CONTROL                                                     0xa1e3
  37 #define mmCB_BLEND4_CONTROL                                                     0xa1e4
  38 #define mmCB_BLEND5_CONTROL                                                     0xa1e5
  39 #define mmCB_BLEND6_CONTROL                                                     0xa1e6
  40 #define mmCB_BLEND7_CONTROL                                                     0xa1e7
  41 #define mmCB_COLOR0_BASE                                                        0xa318
  42 #define mmCB_COLOR1_BASE                                                        0xa327
  43 #define mmCB_COLOR2_BASE                                                        0xa336
  44 #define mmCB_COLOR3_BASE                                                        0xa345
  45 #define mmCB_COLOR4_BASE                                                        0xa354
  46 #define mmCB_COLOR5_BASE                                                        0xa363
  47 #define mmCB_COLOR6_BASE                                                        0xa372
  48 #define mmCB_COLOR7_BASE                                                        0xa381
  49 #define mmCB_COLOR0_PITCH                                                       0xa319
  50 #define mmCB_COLOR1_PITCH                                                       0xa328
  51 #define mmCB_COLOR2_PITCH                                                       0xa337
  52 #define mmCB_COLOR3_PITCH                                                       0xa346
  53 #define mmCB_COLOR4_PITCH                                                       0xa355
  54 #define mmCB_COLOR5_PITCH                                                       0xa364
  55 #define mmCB_COLOR6_PITCH                                                       0xa373
  56 #define mmCB_COLOR7_PITCH                                                       0xa382
  57 #define mmCB_COLOR0_SLICE                                                       0xa31a
  58 #define mmCB_COLOR1_SLICE                                                       0xa329
  59 #define mmCB_COLOR2_SLICE                                                       0xa338
  60 #define mmCB_COLOR3_SLICE                                                       0xa347
  61 #define mmCB_COLOR4_SLICE                                                       0xa356
  62 #define mmCB_COLOR5_SLICE                                                       0xa365
  63 #define mmCB_COLOR6_SLICE                                                       0xa374
  64 #define mmCB_COLOR7_SLICE                                                       0xa383
  65 #define mmCB_COLOR0_VIEW                                                        0xa31b
  66 #define mmCB_COLOR1_VIEW                                                        0xa32a
  67 #define mmCB_COLOR2_VIEW                                                        0xa339
  68 #define mmCB_COLOR3_VIEW                                                        0xa348
  69 #define mmCB_COLOR4_VIEW                                                        0xa357
  70 #define mmCB_COLOR5_VIEW                                                        0xa366
  71 #define mmCB_COLOR6_VIEW                                                        0xa375
  72 #define mmCB_COLOR7_VIEW                                                        0xa384
  73 #define mmCB_COLOR0_INFO                                                        0xa31c
  74 #define mmCB_COLOR1_INFO                                                        0xa32b
  75 #define mmCB_COLOR2_INFO                                                        0xa33a
  76 #define mmCB_COLOR3_INFO                                                        0xa349
  77 #define mmCB_COLOR4_INFO                                                        0xa358
  78 #define mmCB_COLOR5_INFO                                                        0xa367
  79 #define mmCB_COLOR6_INFO                                                        0xa376
  80 #define mmCB_COLOR7_INFO                                                        0xa385
  81 #define mmCB_COLOR0_ATTRIB                                                      0xa31d
  82 #define mmCB_COLOR1_ATTRIB                                                      0xa32c
  83 #define mmCB_COLOR2_ATTRIB                                                      0xa33b
  84 #define mmCB_COLOR3_ATTRIB                                                      0xa34a
  85 #define mmCB_COLOR4_ATTRIB                                                      0xa359
  86 #define mmCB_COLOR5_ATTRIB                                                      0xa368
  87 #define mmCB_COLOR6_ATTRIB                                                      0xa377
  88 #define mmCB_COLOR7_ATTRIB                                                      0xa386
  89 #define mmCB_COLOR0_DCC_CONTROL                                                 0xa31e
  90 #define mmCB_COLOR1_DCC_CONTROL                                                 0xa32d
  91 #define mmCB_COLOR2_DCC_CONTROL                                                 0xa33c
  92 #define mmCB_COLOR3_DCC_CONTROL                                                 0xa34b
  93 #define mmCB_COLOR4_DCC_CONTROL                                                 0xa35a
  94 #define mmCB_COLOR5_DCC_CONTROL                                                 0xa369
  95 #define mmCB_COLOR6_DCC_CONTROL                                                 0xa378
  96 #define mmCB_COLOR7_DCC_CONTROL                                                 0xa387
  97 #define mmCB_COLOR0_CMASK                                                       0xa31f
  98 #define mmCB_COLOR1_CMASK                                                       0xa32e
  99 #define mmCB_COLOR2_CMASK                                                       0xa33d
 100 #define mmCB_COLOR3_CMASK                                                       0xa34c
 101 #define mmCB_COLOR4_CMASK                                                       0xa35b
 102 #define mmCB_COLOR5_CMASK                                                       0xa36a
 103 #define mmCB_COLOR6_CMASK                                                       0xa379
 104 #define mmCB_COLOR7_CMASK                                                       0xa388
 105 #define mmCB_COLOR0_CMASK_SLICE                                                 0xa320
 106 #define mmCB_COLOR1_CMASK_SLICE                                                 0xa32f
 107 #define mmCB_COLOR2_CMASK_SLICE                                                 0xa33e
 108 #define mmCB_COLOR3_CMASK_SLICE                                                 0xa34d
 109 #define mmCB_COLOR4_CMASK_SLICE                                                 0xa35c
 110 #define mmCB_COLOR5_CMASK_SLICE                                                 0xa36b
 111 #define mmCB_COLOR6_CMASK_SLICE                                                 0xa37a
 112 #define mmCB_COLOR7_CMASK_SLICE                                                 0xa389
 113 #define mmCB_COLOR0_FMASK                                                       0xa321
 114 #define mmCB_COLOR1_FMASK                                                       0xa330
 115 #define mmCB_COLOR2_FMASK                                                       0xa33f
 116 #define mmCB_COLOR3_FMASK                                                       0xa34e
 117 #define mmCB_COLOR4_FMASK                                                       0xa35d
 118 #define mmCB_COLOR5_FMASK                                                       0xa36c
 119 #define mmCB_COLOR6_FMASK                                                       0xa37b
 120 #define mmCB_COLOR7_FMASK                                                       0xa38a
 121 #define mmCB_COLOR0_FMASK_SLICE                                                 0xa322
 122 #define mmCB_COLOR1_FMASK_SLICE                                                 0xa331
 123 #define mmCB_COLOR2_FMASK_SLICE                                                 0xa340
 124 #define mmCB_COLOR3_FMASK_SLICE                                                 0xa34f
 125 #define mmCB_COLOR4_FMASK_SLICE                                                 0xa35e
 126 #define mmCB_COLOR5_FMASK_SLICE                                                 0xa36d
 127 #define mmCB_COLOR6_FMASK_SLICE                                                 0xa37c
 128 #define mmCB_COLOR7_FMASK_SLICE                                                 0xa38b
 129 #define mmCB_COLOR0_CLEAR_WORD0                                                 0xa323
 130 #define mmCB_COLOR1_CLEAR_WORD0                                                 0xa332
 131 #define mmCB_COLOR2_CLEAR_WORD0                                                 0xa341
 132 #define mmCB_COLOR3_CLEAR_WORD0                                                 0xa350
 133 #define mmCB_COLOR4_CLEAR_WORD0                                                 0xa35f
 134 #define mmCB_COLOR5_CLEAR_WORD0                                                 0xa36e
 135 #define mmCB_COLOR6_CLEAR_WORD0                                                 0xa37d
 136 #define mmCB_COLOR7_CLEAR_WORD0                                                 0xa38c
 137 #define mmCB_COLOR0_CLEAR_WORD1                                                 0xa324
 138 #define mmCB_COLOR1_CLEAR_WORD1                                                 0xa333
 139 #define mmCB_COLOR2_CLEAR_WORD1                                                 0xa342
 140 #define mmCB_COLOR3_CLEAR_WORD1                                                 0xa351
 141 #define mmCB_COLOR4_CLEAR_WORD1                                                 0xa360
 142 #define mmCB_COLOR5_CLEAR_WORD1                                                 0xa36f
 143 #define mmCB_COLOR6_CLEAR_WORD1                                                 0xa37e
 144 #define mmCB_COLOR7_CLEAR_WORD1                                                 0xa38d
 145 #define mmCB_COLOR0_DCC_BASE                                                    0xa325
 146 #define mmCB_COLOR1_DCC_BASE                                                    0xa334
 147 #define mmCB_COLOR2_DCC_BASE                                                    0xa343
 148 #define mmCB_COLOR3_DCC_BASE                                                    0xa352
 149 #define mmCB_COLOR4_DCC_BASE                                                    0xa361
 150 #define mmCB_COLOR5_DCC_BASE                                                    0xa370
 151 #define mmCB_COLOR6_DCC_BASE                                                    0xa37f
 152 #define mmCB_COLOR7_DCC_BASE                                                    0xa38e
 153 #define mmCB_TARGET_MASK                                                        0xa08e
 154 #define mmCB_SHADER_MASK                                                        0xa08f
 155 #define mmCB_HW_CONTROL                                                         0x2684
 156 #define mmCB_HW_CONTROL_1                                                       0x2685
 157 #define mmCB_HW_CONTROL_2                                                       0x2686
 158 #define mmCB_HW_CONTROL_3                                                       0x2683
 159 #define mmCB_DCC_CONFIG                                                         0x2687
 160 #define mmCB_PERFCOUNTER_FILTER                                                 0xdc00
 161 #define mmCB_PERFCOUNTER0_SELECT                                                0xdc01
 162 #define mmCB_PERFCOUNTER0_SELECT1                                               0xdc02
 163 #define mmCB_PERFCOUNTER1_SELECT                                                0xdc03
 164 #define mmCB_PERFCOUNTER2_SELECT                                                0xdc04
 165 #define mmCB_PERFCOUNTER3_SELECT                                                0xdc05
 166 #define mmCB_PERFCOUNTER0_LO                                                    0xd406
 167 #define mmCB_PERFCOUNTER1_LO                                                    0xd408
 168 #define mmCB_PERFCOUNTER2_LO                                                    0xd40a
 169 #define mmCB_PERFCOUNTER3_LO                                                    0xd40c
 170 #define mmCB_PERFCOUNTER0_HI                                                    0xd407
 171 #define mmCB_PERFCOUNTER1_HI                                                    0xd409
 172 #define mmCB_PERFCOUNTER2_HI                                                    0xd40b
 173 #define mmCB_PERFCOUNTER3_HI                                                    0xd40d
 174 #define mmCB_CGTT_SCLK_CTRL                                                     0xf0a8
 175 #define mmCB_DEBUG_BUS_1                                                        0x2699
 176 #define mmCB_DEBUG_BUS_2                                                        0x269a
 177 #define mmCB_DEBUG_BUS_3                                                        0x269b
 178 #define mmCB_DEBUG_BUS_4                                                        0x269c
 179 #define mmCB_DEBUG_BUS_5                                                        0x269d
 180 #define mmCB_DEBUG_BUS_6                                                        0x269e
 181 #define mmCB_DEBUG_BUS_7                                                        0x269f
 182 #define mmCB_DEBUG_BUS_8                                                        0x26a0
 183 #define mmCB_DEBUG_BUS_9                                                        0x26a1
 184 #define mmCB_DEBUG_BUS_10                                                       0x26a2
 185 #define mmCB_DEBUG_BUS_11                                                       0x26a3
 186 #define mmCB_DEBUG_BUS_12                                                       0x26a4
 187 #define mmCB_DEBUG_BUS_13                                                       0x26a5
 188 #define mmCB_DEBUG_BUS_14                                                       0x26a6
 189 #define mmCB_DEBUG_BUS_15                                                       0x26a7
 190 #define mmCB_DEBUG_BUS_16                                                       0x26a8
 191 #define mmCB_DEBUG_BUS_17                                                       0x26a9
 192 #define mmCB_DEBUG_BUS_18                                                       0x26aa
 193 #define mmCB_DEBUG_BUS_19                                                       0x26ab
 194 #define mmCB_DEBUG_BUS_20                                                       0x26ac
 195 #define mmCB_DEBUG_BUS_21                                                       0x26ad
 196 #define mmCB_DEBUG_BUS_22                                                       0x26ae
 197 #define mmCP_DFY_CNTL                                                           0x3020
 198 #define mmCP_DFY_STAT                                                           0x3021
 199 #define mmCP_DFY_ADDR_HI                                                        0x3022
 200 #define mmCP_DFY_ADDR_LO                                                        0x3023
 201 #define mmCP_DFY_DATA_0                                                         0x3024
 202 #define mmCP_DFY_DATA_1                                                         0x3025
 203 #define mmCP_DFY_DATA_2                                                         0x3026
 204 #define mmCP_DFY_DATA_3                                                         0x3027
 205 #define mmCP_DFY_DATA_4                                                         0x3028
 206 #define mmCP_DFY_DATA_5                                                         0x3029
 207 #define mmCP_DFY_DATA_6                                                         0x302a
 208 #define mmCP_DFY_DATA_7                                                         0x302b
 209 #define mmCP_DFY_DATA_8                                                         0x302c
 210 #define mmCP_DFY_DATA_9                                                         0x302d
 211 #define mmCP_DFY_DATA_10                                                        0x302e
 212 #define mmCP_DFY_DATA_11                                                        0x302f
 213 #define mmCP_DFY_DATA_12                                                        0x3030
 214 #define mmCP_DFY_DATA_13                                                        0x3031
 215 #define mmCP_DFY_DATA_14                                                        0x3032
 216 #define mmCP_DFY_DATA_15                                                        0x3033
 217 #define mmCP_DFY_CMD                                                            0x3034
 218 #define mmCP_CPC_MGCG_SYNC_CNTL                                                 0x3036
 219 #define mmCP_RB0_BASE                                                           0x3040
 220 #define mmCP_RB0_BASE_HI                                                        0x30b1
 221 #define mmCP_RB_BASE                                                            0x3040
 222 #define mmCP_RB1_BASE                                                           0x3060
 223 #define mmCP_RB1_BASE_HI                                                        0x30b2
 224 #define mmCP_RB2_BASE                                                           0x3065
 225 #define mmCP_RB0_CNTL                                                           0x3041
 226 #define mmCP_RB_CNTL                                                            0x3041
 227 #define mmCP_RB1_CNTL                                                           0x3061
 228 #define mmCP_RB2_CNTL                                                           0x3066
 229 #define mmCP_RB_RPTR_WR                                                         0x3042
 230 #define mmCP_RB0_RPTR_ADDR                                                      0x3043
 231 #define mmCP_RB_RPTR_ADDR                                                       0x3043
 232 #define mmCP_RB1_RPTR_ADDR                                                      0x3062
 233 #define mmCP_RB2_RPTR_ADDR                                                      0x3067
 234 #define mmCP_RB0_RPTR_ADDR_HI                                                   0x3044
 235 #define mmCP_RB_RPTR_ADDR_HI                                                    0x3044
 236 #define mmCP_RB1_RPTR_ADDR_HI                                                   0x3063
 237 #define mmCP_RB2_RPTR_ADDR_HI                                                   0x3068
 238 #define mmCP_RB0_WPTR                                                           0x3045
 239 #define mmCP_RB_WPTR                                                            0x3045
 240 #define mmCP_RB1_WPTR                                                           0x3064
 241 #define mmCP_RB2_WPTR                                                           0x3069
 242 #define mmCP_RB_WPTR_POLL_ADDR_LO                                               0x3046
 243 #define mmCP_RB_WPTR_POLL_ADDR_HI                                               0x3047
 244 #define mmGC_PRIV_MODE                                                          0x3048
 245 #define mmCP_INT_CNTL                                                           0x3049
 246 #define mmCP_INT_CNTL_RING0                                                     0x306a
 247 #define mmCP_INT_CNTL_RING1                                                     0x306b
 248 #define mmCP_INT_CNTL_RING2                                                     0x306c
 249 #define mmCP_INT_STATUS                                                         0x304a
 250 #define mmCP_INT_STATUS_RING0                                                   0x306d
 251 #define mmCP_INT_STATUS_RING1                                                   0x306e
 252 #define mmCP_INT_STATUS_RING2                                                   0x306f
 253 #define mmCP_DEVICE_ID                                                          0x304b
 254 #define mmCP_RING_PRIORITY_CNTS                                                 0x304c
 255 #define mmCP_ME0_PIPE_PRIORITY_CNTS                                             0x304c
 256 #define mmCP_RING0_PRIORITY                                                     0x304d
 257 #define mmCP_ME0_PIPE0_PRIORITY                                                 0x304d
 258 #define mmCP_RING1_PRIORITY                                                     0x304e
 259 #define mmCP_ME0_PIPE1_PRIORITY                                                 0x304e
 260 #define mmCP_RING2_PRIORITY                                                     0x304f
 261 #define mmCP_ME0_PIPE2_PRIORITY                                                 0x304f
 262 #define mmCP_ENDIAN_SWAP                                                        0x3050
 263 #define mmCP_RB_VMID                                                            0x3051
 264 #define mmCP_ME0_PIPE0_VMID                                                     0x3052
 265 #define mmCP_ME0_PIPE1_VMID                                                     0x3053
 266 #define mmCP_RB_DOORBELL_CONTROL                                                0x3059
 267 #define mmCP_RB_DOORBELL_RANGE_LOWER                                            0x305a
 268 #define mmCP_RB_DOORBELL_RANGE_UPPER                                            0x305b
 269 #define mmCP_MEC_DOORBELL_RANGE_LOWER                                           0x305c
 270 #define mmCP_MEC_DOORBELL_RANGE_UPPER                                           0x305d
 271 #define mmCP_PFP_UCODE_ADDR                                                     0xf814
 272 #define mmCP_PFP_UCODE_DATA                                                     0xf815
 273 #define mmCP_ME_RAM_RADDR                                                       0xf816
 274 #define mmCP_ME_RAM_WADDR                                                       0xf816
 275 #define mmCP_ME_RAM_DATA                                                        0xf817
 276 #define mmCGTT_CPC_CLK_CTRL                                                     0xf0b2
 277 #define mmCGTT_CPF_CLK_CTRL                                                     0xf0b1
 278 #define mmCGTT_CP_CLK_CTRL                                                      0xf0b0
 279 #define mmCP_CE_UCODE_ADDR                                                      0xf818
 280 #define mmCP_CE_UCODE_DATA                                                      0xf819
 281 #define mmCP_MEC_ME1_UCODE_ADDR                                                 0xf81a
 282 #define mmCP_MEC_ME1_UCODE_DATA                                                 0xf81b
 283 #define mmCP_MEC_ME2_UCODE_ADDR                                                 0xf81c
 284 #define mmCP_MEC_ME2_UCODE_DATA                                                 0xf81d
 285 #define mmCP_MEC1_F32_INT_DIS                                                   0x30bd
 286 #define mmCP_MEC2_F32_INT_DIS                                                   0x30be
 287 #define mmCP_VIRT_STATUS                                                        0x3038
 288 #define mmCP_PWR_CNTL                                                           0x3078
 289 #define mmCP_MEM_SLP_CNTL                                                       0x3079
 290 #define mmCP_ECC_FIRSTOCCURRENCE                                                0x307a
 291 #define mmCP_ECC_FIRSTOCCURRENCE_RING0                                          0x307b
 292 #define mmCP_ECC_FIRSTOCCURRENCE_RING1                                          0x307c
 293 #define mmCP_ECC_FIRSTOCCURRENCE_RING2                                          0x307d
 294 #define mmCP_CPF_DEBUG                                                          0x3080
 295 #define mmCP_PQ_WPTR_POLL_CNTL                                                  0x3083
 296 #define mmCP_PQ_WPTR_POLL_CNTL1                                                 0x3084
 297 #define mmCPC_INT_CNTL                                                          0x30b4
 298 #define mmCP_ME1_PIPE0_INT_CNTL                                                 0x3085
 299 #define mmCP_ME1_PIPE1_INT_CNTL                                                 0x3086
 300 #define mmCP_ME1_PIPE2_INT_CNTL                                                 0x3087
 301 #define mmCP_ME1_PIPE3_INT_CNTL                                                 0x3088
 302 #define mmCP_ME2_PIPE0_INT_CNTL                                                 0x3089
 303 #define mmCP_ME2_PIPE1_INT_CNTL                                                 0x308a
 304 #define mmCP_ME2_PIPE2_INT_CNTL                                                 0x308b
 305 #define mmCP_ME2_PIPE3_INT_CNTL                                                 0x308c
 306 #define mmCPC_INT_STATUS                                                        0x30b5
 307 #define mmCP_ME1_PIPE0_INT_STATUS                                               0x308d
 308 #define mmCP_ME1_PIPE1_INT_STATUS                                               0x308e
 309 #define mmCP_ME1_PIPE2_INT_STATUS                                               0x308f
 310 #define mmCP_ME1_PIPE3_INT_STATUS                                               0x3090
 311 #define mmCP_ME2_PIPE0_INT_STATUS                                               0x3091
 312 #define mmCP_ME2_PIPE1_INT_STATUS                                               0x3092
 313 #define mmCP_ME2_PIPE2_INT_STATUS                                               0x3093
 314 #define mmCP_ME2_PIPE3_INT_STATUS                                               0x3094
 315 #define mmCP_ME1_INT_STAT_DEBUG                                                 0x3095
 316 #define mmCP_ME2_INT_STAT_DEBUG                                                 0x3096
 317 #define mmCP_ME1_PIPE_PRIORITY_CNTS                                             0x3099
 318 #define mmCP_ME1_PIPE0_PRIORITY                                                 0x309a
 319 #define mmCP_ME1_PIPE1_PRIORITY                                                 0x309b
 320 #define mmCP_ME1_PIPE2_PRIORITY                                                 0x309c
 321 #define mmCP_ME1_PIPE3_PRIORITY                                                 0x309d
 322 #define mmCP_ME2_PIPE_PRIORITY_CNTS                                             0x309e
 323 #define mmCP_ME2_PIPE0_PRIORITY                                                 0x309f
 324 #define mmCP_ME2_PIPE1_PRIORITY                                                 0x30a0
 325 #define mmCP_ME2_PIPE2_PRIORITY                                                 0x30a1
 326 #define mmCP_ME2_PIPE3_PRIORITY                                                 0x30a2
 327 #define mmCP_CE_PRGRM_CNTR_START                                                0x30a3
 328 #define mmCP_PFP_PRGRM_CNTR_START                                               0x30a4
 329 #define mmCP_ME_PRGRM_CNTR_START                                                0x30a5
 330 #define mmCP_MEC1_PRGRM_CNTR_START                                              0x30a6
 331 #define mmCP_MEC2_PRGRM_CNTR_START                                              0x30a7
 332 #define mmCP_CE_INTR_ROUTINE_START                                              0x30a8
 333 #define mmCP_PFP_INTR_ROUTINE_START                                             0x30a9
 334 #define mmCP_ME_INTR_ROUTINE_START                                              0x30aa
 335 #define mmCP_MEC1_INTR_ROUTINE_START                                            0x30ab
 336 #define mmCP_MEC2_INTR_ROUTINE_START                                            0x30ac
 337 #define mmCP_CONTEXT_CNTL                                                       0x30ad
 338 #define mmCP_MAX_CONTEXT                                                        0x30ae
 339 #define mmCP_IQ_WAIT_TIME1                                                      0x30af
 340 #define mmCP_IQ_WAIT_TIME2                                                      0x30b0
 341 #define mmCP_VMID_RESET                                                         0x30b3
 342 #define mmCP_VMID_PREEMPT                                                       0x30b6
 343 #define mmCP_VMID_STATUS                                                        0x30bf
 344 #define mmCPC_INT_CNTX_ID                                                       0x30b7
 345 #define mmCP_PQ_STATUS                                                          0x30b8
 346 #define mmCP_CPC_IC_BASE_LO                                                     0x30b9
 347 #define mmCP_CPC_IC_BASE_HI                                                     0x30ba
 348 #define mmCP_CPC_IC_BASE_CNTL                                                   0x30bb
 349 #define mmCP_CPC_IC_OP_CNTL                                                     0x30bc
 350 #define mmCP_CPC_STATUS                                                         0x2084
 351 #define mmCP_CPC_BUSY_STAT                                                      0x2085
 352 #define mmCP_CPC_STALLED_STAT1                                                  0x2086
 353 #define mmCP_CPF_STATUS                                                         0x2087
 354 #define mmCP_CPF_BUSY_STAT                                                      0x2088
 355 #define mmCP_CPF_STALLED_STAT1                                                  0x2089
 356 #define mmCP_CPC_GRBM_FREE_COUNT                                                0x208b
 357 #define mmCP_MEC_CNTL                                                           0x208d
 358 #define mmCP_MEC_ME1_HEADER_DUMP                                                0x208e
 359 #define mmCP_MEC_ME2_HEADER_DUMP                                                0x208f
 360 #define mmCP_CPC_SCRATCH_INDEX                                                  0x2090
 361 #define mmCP_CPC_SCRATCH_DATA                                                   0x2091
 362 #define mmCPG_PERFCOUNTER1_SELECT                                               0xd800
 363 #define mmCPG_PERFCOUNTER1_LO                                                   0xd000
 364 #define mmCPG_PERFCOUNTER1_HI                                                   0xd001
 365 #define mmCPG_PERFCOUNTER0_SELECT1                                              0xd801
 366 #define mmCPG_PERFCOUNTER0_SELECT                                               0xd802
 367 #define mmCPG_PERFCOUNTER0_LO                                                   0xd002
 368 #define mmCPG_PERFCOUNTER0_HI                                                   0xd003
 369 #define mmCPC_PERFCOUNTER1_SELECT                                               0xd803
 370 #define mmCPC_PERFCOUNTER1_LO                                                   0xd004
 371 #define mmCPC_PERFCOUNTER1_HI                                                   0xd005
 372 #define mmCPC_PERFCOUNTER0_SELECT1                                              0xd804
 373 #define mmCPC_PERFCOUNTER0_SELECT                                               0xd809
 374 #define mmCPC_PERFCOUNTER0_LO                                                   0xd006
 375 #define mmCPC_PERFCOUNTER0_HI                                                   0xd007
 376 #define mmCPF_PERFCOUNTER1_SELECT                                               0xd805
 377 #define mmCPF_PERFCOUNTER1_LO                                                   0xd008
 378 #define mmCPF_PERFCOUNTER1_HI                                                   0xd009
 379 #define mmCPF_PERFCOUNTER0_SELECT1                                              0xd806
 380 #define mmCPF_PERFCOUNTER0_SELECT                                               0xd807
 381 #define mmCPF_PERFCOUNTER0_LO                                                   0xd00a
 382 #define mmCPF_PERFCOUNTER0_HI                                                   0xd00b
 383 #define mmCP_CPC_HALT_HYST_COUNT                                                0x20a7
 384 #define mmCP_DRAW_OBJECT                                                        0xd810
 385 #define mmCP_DRAW_OBJECT_COUNTER                                                0xd811
 386 #define mmCP_DRAW_WINDOW_MASK_HI                                                0xd812
 387 #define mmCP_DRAW_WINDOW_HI                                                     0xd813
 388 #define mmCP_DRAW_WINDOW_LO                                                     0xd814
 389 #define mmCP_DRAW_WINDOW_CNTL                                                   0xd815
 390 #define mmCP_PRT_LOD_STATS_CNTL0                                                0x20ad
 391 #define mmCP_PRT_LOD_STATS_CNTL1                                                0x20ae
 392 #define mmCP_PRT_LOD_STATS_CNTL2                                                0x20af
 393 #define mmCP_CE_COMPARE_COUNT                                                   0x20c0
 394 #define mmCP_CE_DE_COUNT                                                        0x20c1
 395 #define mmCP_DE_CE_COUNT                                                        0x20c2
 396 #define mmCP_DE_LAST_INVAL_COUNT                                                0x20c3
 397 #define mmCP_DE_DE_COUNT                                                        0x20c4
 398 #define mmCP_EOP_DONE_EVENT_CNTL                                                0xc0d5
 399 #define mmCP_EOP_DONE_DATA_CNTL                                                 0xc0d6
 400 #define mmCP_EOP_DONE_CNTX_ID                                                   0xc0d7
 401 #define mmCP_EOP_DONE_ADDR_LO                                                   0xc000
 402 #define mmCP_EOP_DONE_ADDR_HI                                                   0xc001
 403 #define mmCP_EOP_DONE_DATA_LO                                                   0xc002
 404 #define mmCP_EOP_DONE_DATA_HI                                                   0xc003
 405 #define mmCP_EOP_LAST_FENCE_LO                                                  0xc004
 406 #define mmCP_EOP_LAST_FENCE_HI                                                  0xc005
 407 #define mmCP_STREAM_OUT_ADDR_LO                                                 0xc006
 408 #define mmCP_STREAM_OUT_ADDR_HI                                                 0xc007
 409 #define mmCP_NUM_PRIM_WRITTEN_COUNT0_LO                                         0xc008
 410 #define mmCP_NUM_PRIM_WRITTEN_COUNT0_HI                                         0xc009
 411 #define mmCP_NUM_PRIM_NEEDED_COUNT0_LO                                          0xc00a
 412 #define mmCP_NUM_PRIM_NEEDED_COUNT0_HI                                          0xc00b
 413 #define mmCP_NUM_PRIM_WRITTEN_COUNT1_LO                                         0xc00c
 414 #define mmCP_NUM_PRIM_WRITTEN_COUNT1_HI                                         0xc00d
 415 #define mmCP_NUM_PRIM_NEEDED_COUNT1_LO                                          0xc00e
 416 #define mmCP_NUM_PRIM_NEEDED_COUNT1_HI                                          0xc00f
 417 #define mmCP_NUM_PRIM_WRITTEN_COUNT2_LO                                         0xc010
 418 #define mmCP_NUM_PRIM_WRITTEN_COUNT2_HI                                         0xc011
 419 #define mmCP_NUM_PRIM_NEEDED_COUNT2_LO                                          0xc012
 420 #define mmCP_NUM_PRIM_NEEDED_COUNT2_HI                                          0xc013
 421 #define mmCP_NUM_PRIM_WRITTEN_COUNT3_LO                                         0xc014
 422 #define mmCP_NUM_PRIM_WRITTEN_COUNT3_HI                                         0xc015
 423 #define mmCP_NUM_PRIM_NEEDED_COUNT3_LO                                          0xc016
 424 #define mmCP_NUM_PRIM_NEEDED_COUNT3_HI                                          0xc017
 425 #define mmCP_PIPE_STATS_ADDR_LO                                                 0xc018
 426 #define mmCP_PIPE_STATS_ADDR_HI                                                 0xc019
 427 #define mmCP_VGT_IAVERT_COUNT_LO                                                0xc01a
 428 #define mmCP_VGT_IAVERT_COUNT_HI                                                0xc01b
 429 #define mmCP_VGT_IAPRIM_COUNT_LO                                                0xc01c
 430 #define mmCP_VGT_IAPRIM_COUNT_HI                                                0xc01d
 431 #define mmCP_VGT_GSPRIM_COUNT_LO                                                0xc01e
 432 #define mmCP_VGT_GSPRIM_COUNT_HI                                                0xc01f
 433 #define mmCP_VGT_VSINVOC_COUNT_LO                                               0xc020
 434 #define mmCP_VGT_VSINVOC_COUNT_HI                                               0xc021
 435 #define mmCP_VGT_GSINVOC_COUNT_LO                                               0xc022
 436 #define mmCP_VGT_GSINVOC_COUNT_HI                                               0xc023
 437 #define mmCP_VGT_HSINVOC_COUNT_LO                                               0xc024
 438 #define mmCP_VGT_HSINVOC_COUNT_HI                                               0xc025
 439 #define mmCP_VGT_DSINVOC_COUNT_LO                                               0xc026
 440 #define mmCP_VGT_DSINVOC_COUNT_HI                                               0xc027
 441 #define mmCP_PA_CINVOC_COUNT_LO                                                 0xc028
 442 #define mmCP_PA_CINVOC_COUNT_HI                                                 0xc029
 443 #define mmCP_PA_CPRIM_COUNT_LO                                                  0xc02a
 444 #define mmCP_PA_CPRIM_COUNT_HI                                                  0xc02b
 445 #define mmCP_SC_PSINVOC_COUNT0_LO                                               0xc02c
 446 #define mmCP_SC_PSINVOC_COUNT0_HI                                               0xc02d
 447 #define mmCP_SC_PSINVOC_COUNT1_LO                                               0xc02e
 448 #define mmCP_SC_PSINVOC_COUNT1_HI                                               0xc02f
 449 #define mmCP_VGT_CSINVOC_COUNT_LO                                               0xc030
 450 #define mmCP_VGT_CSINVOC_COUNT_HI                                               0xc031
 451 #define mmCP_PIPE_STATS_CONTROL                                                 0xc03d
 452 #define mmCP_STREAM_OUT_CONTROL                                                 0xc03e
 453 #define mmCP_STRMOUT_CNTL                                                       0xc03f
 454 #define mmSCRATCH_REG0                                                          0xc040
 455 #define mmSCRATCH_REG1                                                          0xc041
 456 #define mmSCRATCH_REG2                                                          0xc042
 457 #define mmSCRATCH_REG3                                                          0xc043
 458 #define mmSCRATCH_REG4                                                          0xc044
 459 #define mmSCRATCH_REG5                                                          0xc045
 460 #define mmSCRATCH_REG6                                                          0xc046
 461 #define mmSCRATCH_REG7                                                          0xc047
 462 #define mmSCRATCH_UMSK                                                          0xc050
 463 #define mmSCRATCH_ADDR                                                          0xc051
 464 #define mmCP_PFP_ATOMIC_PREOP_LO                                                0xc052
 465 #define mmCP_PFP_ATOMIC_PREOP_HI                                                0xc053
 466 #define mmCP_PFP_GDS_ATOMIC0_PREOP_LO                                           0xc054
 467 #define mmCP_PFP_GDS_ATOMIC0_PREOP_HI                                           0xc055
 468 #define mmCP_PFP_GDS_ATOMIC1_PREOP_LO                                           0xc056
 469 #define mmCP_PFP_GDS_ATOMIC1_PREOP_HI                                           0xc057
 470 #define mmCP_APPEND_ADDR_LO                                                     0xc058
 471 #define mmCP_APPEND_ADDR_HI                                                     0xc059
 472 #define mmCP_APPEND_DATA                                                        0xc05a
 473 #define mmCP_APPEND_LAST_CS_FENCE                                               0xc05b
 474 #define mmCP_APPEND_LAST_PS_FENCE                                               0xc05c
 475 #define mmCP_ATOMIC_PREOP_LO                                                    0xc05d
 476 #define mmCP_ME_ATOMIC_PREOP_LO                                                 0xc05d
 477 #define mmCP_ATOMIC_PREOP_HI                                                    0xc05e
 478 #define mmCP_ME_ATOMIC_PREOP_HI                                                 0xc05e
 479 #define mmCP_GDS_ATOMIC0_PREOP_LO                                               0xc05f
 480 #define mmCP_ME_GDS_ATOMIC0_PREOP_LO                                            0xc05f
 481 #define mmCP_GDS_ATOMIC0_PREOP_HI                                               0xc060
 482 #define mmCP_ME_GDS_ATOMIC0_PREOP_HI                                            0xc060
 483 #define mmCP_GDS_ATOMIC1_PREOP_LO                                               0xc061
 484 #define mmCP_ME_GDS_ATOMIC1_PREOP_LO                                            0xc061
 485 #define mmCP_GDS_ATOMIC1_PREOP_HI                                               0xc062
 486 #define mmCP_ME_GDS_ATOMIC1_PREOP_HI                                            0xc062
 487 #define mmCP_ME_MC_WADDR_LO                                                     0xc069
 488 #define mmCP_ME_MC_WADDR_HI                                                     0xc06a
 489 #define mmCP_ME_MC_WDATA_LO                                                     0xc06b
 490 #define mmCP_ME_MC_WDATA_HI                                                     0xc06c
 491 #define mmCP_ME_MC_RADDR_LO                                                     0xc06d
 492 #define mmCP_ME_MC_RADDR_HI                                                     0xc06e
 493 #define mmCP_SEM_WAIT_TIMER                                                     0xc06f
 494 #define mmCP_SIG_SEM_ADDR_LO                                                    0xc070
 495 #define mmCP_SIG_SEM_ADDR_HI                                                    0xc071
 496 #define mmCP_WAIT_SEM_ADDR_LO                                                   0xc075
 497 #define mmCP_WAIT_SEM_ADDR_HI                                                   0xc076
 498 #define mmCP_WAIT_REG_MEM_TIMEOUT                                               0xc074
 499 #define mmCP_COHER_START_DELAY                                                  0xc07b
 500 #define mmCP_COHER_CNTL                                                         0xc07c
 501 #define mmCP_COHER_SIZE                                                         0xc07d
 502 #define mmCP_COHER_SIZE_HI                                                      0xc08c
 503 #define mmCP_COHER_BASE                                                         0xc07e
 504 #define mmCP_COHER_BASE_HI                                                      0xc079
 505 #define mmCP_COHER_STATUS                                                       0xc07f
 506 #define mmCOHER_DEST_BASE_0                                                     0xa092
 507 #define mmCOHER_DEST_BASE_1                                                     0xa093
 508 #define mmCOHER_DEST_BASE_2                                                     0xa07e
 509 #define mmCOHER_DEST_BASE_3                                                     0xa07f
 510 #define mmCOHER_DEST_BASE_HI_0                                                  0xa07a
 511 #define mmCOHER_DEST_BASE_HI_1                                                  0xa07b
 512 #define mmCOHER_DEST_BASE_HI_2                                                  0xa07c
 513 #define mmCOHER_DEST_BASE_HI_3                                                  0xa07d
 514 #define mmCP_DMA_ME_SRC_ADDR                                                    0xc080
 515 #define mmCP_DMA_ME_SRC_ADDR_HI                                                 0xc081
 516 #define mmCP_DMA_ME_DST_ADDR                                                    0xc082
 517 #define mmCP_DMA_ME_DST_ADDR_HI                                                 0xc083
 518 #define mmCP_DMA_ME_CONTROL                                                     0xc078
 519 #define mmCP_DMA_ME_COMMAND                                                     0xc084
 520 #define mmCP_DMA_PFP_SRC_ADDR                                                   0xc085
 521 #define mmCP_DMA_PFP_SRC_ADDR_HI                                                0xc086
 522 #define mmCP_DMA_PFP_DST_ADDR                                                   0xc087
 523 #define mmCP_DMA_PFP_DST_ADDR_HI                                                0xc088
 524 #define mmCP_DMA_PFP_CONTROL                                                    0xc077
 525 #define mmCP_DMA_PFP_COMMAND                                                    0xc089
 526 #define mmCP_DMA_CNTL                                                           0xc08a
 527 #define mmCP_DMA_READ_TAGS                                                      0xc08b
 528 #define mmCP_PFP_IB_CONTROL                                                     0xc08d
 529 #define mmCP_PFP_LOAD_CONTROL                                                   0xc08e
 530 #define mmCP_SCRATCH_INDEX                                                      0xc08f
 531 #define mmCP_SCRATCH_DATA                                                       0xc090
 532 #define mmCP_RB_OFFSET                                                          0xc091
 533 #define mmCP_IB1_OFFSET                                                         0xc092
 534 #define mmCP_IB2_OFFSET                                                         0xc093
 535 #define mmCP_IB1_PREAMBLE_BEGIN                                                 0xc094
 536 #define mmCP_IB1_PREAMBLE_END                                                   0xc095
 537 #define mmCP_IB2_PREAMBLE_BEGIN                                                 0xc096
 538 #define mmCP_IB2_PREAMBLE_END                                                   0xc097
 539 #define mmCP_CE_IB1_OFFSET                                                      0xc098
 540 #define mmCP_CE_IB2_OFFSET                                                      0xc099
 541 #define mmCP_CE_COUNTER                                                         0xc09a
 542 #define mmCP_CE_RB_OFFSET                                                       0xc09b
 543 #define mmCP_PFP_COMPLETION_STATUS                                              0xc0ec
 544 #define mmCP_CE_COMPLETION_STATUS                                               0xc0ed
 545 #define mmCP_PRED_NOT_VISIBLE                                                   0xc0ee
 546 #define mmCP_PFP_METADATA_BASE_ADDR                                             0xc0f0
 547 #define mmCP_PFP_METADATA_BASE_ADDR_HI                                          0xc0f1
 548 #define mmCP_CE_METADATA_BASE_ADDR                                              0xc0f2
 549 #define mmCP_CE_METADATA_BASE_ADDR_HI                                           0xc0f3
 550 #define mmCP_DRAW_INDX_INDR_ADDR                                                0xc0f4
 551 #define mmCP_DRAW_INDX_INDR_ADDR_HI                                             0xc0f5
 552 #define mmCP_DISPATCH_INDR_ADDR                                                 0xc0f6
 553 #define mmCP_DISPATCH_INDR_ADDR_HI                                              0xc0f7
 554 #define mmCP_INDEX_BASE_ADDR                                                    0xc0f8
 555 #define mmCP_INDEX_BASE_ADDR_HI                                                 0xc0f9
 556 #define mmCP_INDEX_TYPE                                                         0xc0fa
 557 #define mmCP_GDS_BKUP_ADDR                                                      0xc0fb
 558 #define mmCP_GDS_BKUP_ADDR_HI                                                   0xc0fc
 559 #define mmCP_SAMPLE_STATUS                                                      0xc0fd
 560 #define mmCP_STALLED_STAT1                                                      0x219d
 561 #define mmCP_STALLED_STAT2                                                      0x219e
 562 #define mmCP_STALLED_STAT3                                                      0x219c
 563 #define mmCP_BUSY_STAT                                                          0x219f
 564 #define mmCP_STAT                                                               0x21a0
 565 #define mmCP_ME_HEADER_DUMP                                                     0x21a1
 566 #define mmCP_PFP_HEADER_DUMP                                                    0x21a2
 567 #define mmCP_GRBM_FREE_COUNT                                                    0x21a3
 568 #define mmCP_CE_HEADER_DUMP                                                     0x21a4
 569 #define mmCP_CSF_STAT                                                           0x21b4
 570 #define mmCP_CSF_CNTL                                                           0x21b5
 571 #define mmCP_ME_CNTL                                                            0x21b6
 572 #define mmCP_CNTX_STAT                                                          0x21b8
 573 #define mmCP_ME_PREEMPTION                                                      0x21b9
 574 #define mmCP_RB0_RPTR                                                           0x21c0
 575 #define mmCP_RB_RPTR                                                            0x21c0
 576 #define mmCP_RB1_RPTR                                                           0x21bf
 577 #define mmCP_RB2_RPTR                                                           0x21be
 578 #define mmCP_RB_WPTR_DELAY                                                      0x21c1
 579 #define mmCP_RB_WPTR_POLL_CNTL                                                  0x21c2
 580 #define mmCP_CE_INIT_BASE_LO                                                    0xc0c3
 581 #define mmCP_CE_INIT_BASE_HI                                                    0xc0c4
 582 #define mmCP_CE_INIT_BUFSZ                                                      0xc0c5
 583 #define mmCP_CE_IB1_BASE_LO                                                     0xc0c6
 584 #define mmCP_CE_IB1_BASE_HI                                                     0xc0c7
 585 #define mmCP_CE_IB1_BUFSZ                                                       0xc0c8
 586 #define mmCP_CE_IB2_BASE_LO                                                     0xc0c9
 587 #define mmCP_CE_IB2_BASE_HI                                                     0xc0ca
 588 #define mmCP_CE_IB2_BUFSZ                                                       0xc0cb
 589 #define mmCP_IB1_BASE_LO                                                        0xc0cc
 590 #define mmCP_IB1_BASE_HI                                                        0xc0cd
 591 #define mmCP_IB1_BUFSZ                                                          0xc0ce
 592 #define mmCP_IB2_BASE_LO                                                        0xc0cf
 593 #define mmCP_IB2_BASE_HI                                                        0xc0d0
 594 #define mmCP_IB2_BUFSZ                                                          0xc0d1
 595 #define mmCP_ST_BASE_LO                                                         0xc0d2
 596 #define mmCP_ST_BASE_HI                                                         0xc0d3
 597 #define mmCP_ST_BUFSZ                                                           0xc0d4
 598 #define mmCP_ROQ_THRESHOLDS                                                     0x21bc
 599 #define mmCP_MEQ_STQ_THRESHOLD                                                  0x21bd
 600 #define mmCP_ROQ1_THRESHOLDS                                                    0x21d5
 601 #define mmCP_ROQ2_THRESHOLDS                                                    0x21d6
 602 #define mmCP_STQ_THRESHOLDS                                                     0x21d7
 603 #define mmCP_QUEUE_THRESHOLDS                                                   0x21d8
 604 #define mmCP_MEQ_THRESHOLDS                                                     0x21d9
 605 #define mmCP_ROQ_AVAIL                                                          0x21da
 606 #define mmCP_STQ_AVAIL                                                          0x21db
 607 #define mmCP_ROQ2_AVAIL                                                         0x21dc
 608 #define mmCP_MEQ_AVAIL                                                          0x21dd
 609 #define mmCP_CMD_INDEX                                                          0x21de
 610 #define mmCP_CMD_DATA                                                           0x21df
 611 #define mmCP_ROQ_RB_STAT                                                        0x21e0
 612 #define mmCP_ROQ_IB1_STAT                                                       0x21e1
 613 #define mmCP_ROQ_IB2_STAT                                                       0x21e2
 614 #define mmCP_STQ_STAT                                                           0x21e3
 615 #define mmCP_STQ_WR_STAT                                                        0x21e4
 616 #define mmCP_MEQ_STAT                                                           0x21e5
 617 #define mmCP_CEQ1_AVAIL                                                         0x21e6
 618 #define mmCP_CEQ2_AVAIL                                                         0x21e7
 619 #define mmCP_CE_ROQ_RB_STAT                                                     0x21e8
 620 #define mmCP_CE_ROQ_IB1_STAT                                                    0x21e9
 621 #define mmCP_CE_ROQ_IB2_STAT                                                    0x21ea
 622 #define mmCP_INT_STAT_DEBUG                                                     0x21f7
 623 #define mmCP_PERFMON_CNTL                                                       0xd808
 624 #define mmCP_PERFMON_CNTX_CNTL                                                  0xa0d8
 625 #define mmCP_RINGID                                                             0xa0d9
 626 #define mmCP_PIPEID                                                             0xa0d9
 627 #define mmCP_VMID                                                               0xa0da
 628 #define mmCP_HPD_ROQ_OFFSETS                                                    0x3240
 629 #define mmCP_HPD_STATUS0                                                        0x3241
 630 #define mmCP_MQD_BASE_ADDR                                                      0x3245
 631 #define mmCP_MQD_BASE_ADDR_HI                                                   0x3246
 632 #define mmCP_HQD_ACTIVE                                                         0x3247
 633 #define mmCP_HQD_VMID                                                           0x3248
 634 #define mmCP_HQD_PERSISTENT_STATE                                               0x3249
 635 #define mmCP_HQD_PIPE_PRIORITY                                                  0x324a
 636 #define mmCP_HQD_QUEUE_PRIORITY                                                 0x324b
 637 #define mmCP_HQD_QUANTUM                                                        0x324c
 638 #define mmCP_HQD_PQ_BASE                                                        0x324d
 639 #define mmCP_HQD_PQ_BASE_HI                                                     0x324e
 640 #define mmCP_HQD_PQ_RPTR                                                        0x324f
 641 #define mmCP_HQD_PQ_RPTR_REPORT_ADDR                                            0x3250
 642 #define mmCP_HQD_PQ_RPTR_REPORT_ADDR_HI                                         0x3251
 643 #define mmCP_HQD_PQ_WPTR_POLL_ADDR                                              0x3252
 644 #define mmCP_HQD_PQ_WPTR_POLL_ADDR_HI                                           0x3253
 645 #define mmCP_HQD_PQ_DOORBELL_CONTROL                                            0x3254
 646 #define mmCP_HQD_PQ_WPTR                                                        0x3255
 647 #define mmCP_HQD_PQ_CONTROL                                                     0x3256
 648 #define mmCP_HQD_IB_BASE_ADDR                                                   0x3257
 649 #define mmCP_HQD_IB_BASE_ADDR_HI                                                0x3258
 650 #define mmCP_HQD_IB_RPTR                                                        0x3259
 651 #define mmCP_HQD_IB_CONTROL                                                     0x325a
 652 #define mmCP_HQD_IQ_TIMER                                                       0x325b
 653 #define mmCP_HQD_IQ_RPTR                                                        0x325c
 654 #define mmCP_HQD_DEQUEUE_REQUEST                                                0x325d
 655 #define mmCP_HQD_DMA_OFFLOAD                                                    0x325e
 656 #define mmCP_HQD_OFFLOAD                                                        0x325e
 657 #define mmCP_HQD_SEMA_CMD                                                       0x325f
 658 #define mmCP_HQD_MSG_TYPE                                                       0x3260
 659 #define mmCP_HQD_ATOMIC0_PREOP_LO                                               0x3261
 660 #define mmCP_HQD_ATOMIC0_PREOP_HI                                               0x3262
 661 #define mmCP_HQD_ATOMIC1_PREOP_LO                                               0x3263
 662 #define mmCP_HQD_ATOMIC1_PREOP_HI                                               0x3264
 663 #define mmCP_HQD_HQ_SCHEDULER0                                                  0x3265
 664 #define mmCP_HQD_HQ_STATUS0                                                     0x3265
 665 #define mmCP_HQD_HQ_SCHEDULER1                                                  0x3266
 666 #define mmCP_HQD_HQ_CONTROL0                                                    0x3266
 667 #define mmCP_MQD_CONTROL                                                        0x3267
 668 #define mmCP_HQD_HQ_STATUS1                                                     0x3268
 669 #define mmCP_HQD_HQ_CONTROL1                                                    0x3269
 670 #define mmCP_HQD_EOP_BASE_ADDR                                                  0x326a
 671 #define mmCP_HQD_EOP_BASE_ADDR_HI                                               0x326b
 672 #define mmCP_HQD_EOP_CONTROL                                                    0x326c
 673 #define mmCP_HQD_EOP_RPTR                                                       0x326d
 674 #define mmCP_HQD_EOP_WPTR                                                       0x326e
 675 #define mmCP_HQD_EOP_EVENTS                                                     0x326f
 676 #define mmCP_HQD_CTX_SAVE_BASE_ADDR_LO                                          0x3270
 677 #define mmCP_HQD_CTX_SAVE_BASE_ADDR_HI                                          0x3271
 678 #define mmCP_HQD_CTX_SAVE_CONTROL                                               0x3272
 679 #define mmCP_HQD_CNTL_STACK_OFFSET                                              0x3273
 680 #define mmCP_HQD_CNTL_STACK_SIZE                                                0x3274
 681 #define mmCP_HQD_WG_STATE_OFFSET                                                0x3275
 682 #define mmCP_HQD_CTX_SAVE_SIZE                                                  0x3276
 683 #define mmCP_HQD_GDS_RESOURCE_STATE                                             0x3277
 684 #define mmCP_HQD_ERROR                                                          0x3278
 685 #define mmCP_HQD_EOP_WPTR_MEM                                                   0x3279
 686 #define mmCP_HQD_EOP_DONES                                                      0x327a
 687 #define mmDB_Z_READ_BASE                                                        0xa012
 688 #define mmDB_STENCIL_READ_BASE                                                  0xa013
 689 #define mmDB_Z_WRITE_BASE                                                       0xa014
 690 #define mmDB_STENCIL_WRITE_BASE                                                 0xa015
 691 #define mmDB_DEPTH_INFO                                                         0xa00f
 692 #define mmDB_Z_INFO                                                             0xa010
 693 #define mmDB_STENCIL_INFO                                                       0xa011
 694 #define mmDB_DEPTH_SIZE                                                         0xa016
 695 #define mmDB_DEPTH_SLICE                                                        0xa017
 696 #define mmDB_DEPTH_VIEW                                                         0xa002
 697 #define mmDB_RENDER_CONTROL                                                     0xa000
 698 #define mmDB_COUNT_CONTROL                                                      0xa001
 699 #define mmDB_RENDER_OVERRIDE                                                    0xa003
 700 #define mmDB_RENDER_OVERRIDE2                                                   0xa004
 701 #define mmDB_EQAA                                                               0xa201
 702 #define mmDB_SHADER_CONTROL                                                     0xa203
 703 #define mmDB_DEPTH_BOUNDS_MIN                                                   0xa008
 704 #define mmDB_DEPTH_BOUNDS_MAX                                                   0xa009
 705 #define mmDB_STENCIL_CLEAR                                                      0xa00a
 706 #define mmDB_DEPTH_CLEAR                                                        0xa00b
 707 #define mmDB_HTILE_DATA_BASE                                                    0xa005
 708 #define mmDB_HTILE_SURFACE                                                      0xa2af
 709 #define mmDB_PRELOAD_CONTROL                                                    0xa2b2
 710 #define mmDB_STENCILREFMASK                                                     0xa10c
 711 #define mmDB_STENCILREFMASK_BF                                                  0xa10d
 712 #define mmDB_SRESULTS_COMPARE_STATE0                                            0xa2b0
 713 #define mmDB_SRESULTS_COMPARE_STATE1                                            0xa2b1
 714 #define mmDB_DEPTH_CONTROL                                                      0xa200
 715 #define mmDB_STENCIL_CONTROL                                                    0xa10b
 716 #define mmDB_ALPHA_TO_MASK                                                      0xa2dc
 717 #define mmDB_PERFCOUNTER0_SELECT                                                0xdc40
 718 #define mmDB_PERFCOUNTER1_SELECT                                                0xdc42
 719 #define mmDB_PERFCOUNTER2_SELECT                                                0xdc44
 720 #define mmDB_PERFCOUNTER3_SELECT                                                0xdc46
 721 #define mmDB_PERFCOUNTER0_SELECT1                                               0xdc41
 722 #define mmDB_PERFCOUNTER1_SELECT1                                               0xdc43
 723 #define mmDB_PERFCOUNTER0_LO                                                    0xd440
 724 #define mmDB_PERFCOUNTER1_LO                                                    0xd442
 725 #define mmDB_PERFCOUNTER2_LO                                                    0xd444
 726 #define mmDB_PERFCOUNTER3_LO                                                    0xd446
 727 #define mmDB_PERFCOUNTER0_HI                                                    0xd441
 728 #define mmDB_PERFCOUNTER1_HI                                                    0xd443
 729 #define mmDB_PERFCOUNTER2_HI                                                    0xd445
 730 #define mmDB_PERFCOUNTER3_HI                                                    0xd447
 731 #define mmDB_DEBUG                                                              0x260c
 732 #define mmDB_DEBUG2                                                             0x260d
 733 #define mmDB_DEBUG3                                                             0x260e
 734 #define mmDB_DEBUG4                                                             0x260f
 735 #define mmDB_CREDIT_LIMIT                                                       0x2614
 736 #define mmDB_WATERMARKS                                                         0x2615
 737 #define mmDB_SUBTILE_CONTROL                                                    0x2616
 738 #define mmDB_FREE_CACHELINES                                                    0x2617
 739 #define mmDB_FIFO_DEPTH1                                                        0x2618
 740 #define mmDB_FIFO_DEPTH2                                                        0x2619
 741 #define mmDB_CGTT_CLK_CTRL_0                                                    0xf0a4
 742 #define mmDB_ZPASS_COUNT_LOW                                                    0xc3fe
 743 #define mmDB_ZPASS_COUNT_HI                                                     0xc3ff
 744 #define mmDB_RING_CONTROL                                                       0x261b
 745 #define mmDB_READ_DEBUG_0                                                       0x2620
 746 #define mmDB_READ_DEBUG_1                                                       0x2621
 747 #define mmDB_READ_DEBUG_2                                                       0x2622
 748 #define mmDB_READ_DEBUG_3                                                       0x2623
 749 #define mmDB_READ_DEBUG_4                                                       0x2624
 750 #define mmDB_READ_DEBUG_5                                                       0x2625
 751 #define mmDB_READ_DEBUG_6                                                       0x2626
 752 #define mmDB_READ_DEBUG_7                                                       0x2627
 753 #define mmDB_READ_DEBUG_8                                                       0x2628
 754 #define mmDB_READ_DEBUG_9                                                       0x2629
 755 #define mmDB_READ_DEBUG_A                                                       0x262a
 756 #define mmDB_READ_DEBUG_B                                                       0x262b
 757 #define mmDB_READ_DEBUG_C                                                       0x262c
 758 #define mmDB_READ_DEBUG_D                                                       0x262d
 759 #define mmDB_READ_DEBUG_E                                                       0x262e
 760 #define mmDB_READ_DEBUG_F                                                       0x262f
 761 #define mmDB_OCCLUSION_COUNT0_LOW                                               0xc3c0
 762 #define mmDB_OCCLUSION_COUNT0_HI                                                0xc3c1
 763 #define mmDB_OCCLUSION_COUNT1_LOW                                               0xc3c2
 764 #define mmDB_OCCLUSION_COUNT1_HI                                                0xc3c3
 765 #define mmDB_OCCLUSION_COUNT2_LOW                                               0xc3c4
 766 #define mmDB_OCCLUSION_COUNT2_HI                                                0xc3c5
 767 #define mmDB_OCCLUSION_COUNT3_LOW                                               0xc3c6
 768 #define mmDB_OCCLUSION_COUNT3_HI                                                0xc3c7
 769 #define mmCC_RB_REDUNDANCY                                                      0x263c
 770 #define mmCC_RB_BACKEND_DISABLE                                                 0x263d
 771 #define mmGC_USER_RB_REDUNDANCY                                                 0x26de
 772 #define mmGC_USER_RB_BACKEND_DISABLE                                            0x26df
 773 #define mmGB_ADDR_CONFIG                                                        0x263e
 774 #define mmGB_BACKEND_MAP                                                        0x263f
 775 #define mmGB_GPU_ID                                                             0x2640
 776 #define mmCC_RB_DAISY_CHAIN                                                     0x2641
 777 #define mmGB_TILE_MODE0                                                         0x2644
 778 #define mmGB_TILE_MODE1                                                         0x2645
 779 #define mmGB_TILE_MODE2                                                         0x2646
 780 #define mmGB_TILE_MODE3                                                         0x2647
 781 #define mmGB_TILE_MODE4                                                         0x2648
 782 #define mmGB_TILE_MODE5                                                         0x2649
 783 #define mmGB_TILE_MODE6                                                         0x264a
 784 #define mmGB_TILE_MODE7                                                         0x264b
 785 #define mmGB_TILE_MODE8                                                         0x264c
 786 #define mmGB_TILE_MODE9                                                         0x264d
 787 #define mmGB_TILE_MODE10                                                        0x264e
 788 #define mmGB_TILE_MODE11                                                        0x264f
 789 #define mmGB_TILE_MODE12                                                        0x2650
 790 #define mmGB_TILE_MODE13                                                        0x2651
 791 #define mmGB_TILE_MODE14                                                        0x2652
 792 #define mmGB_TILE_MODE15                                                        0x2653
 793 #define mmGB_TILE_MODE16                                                        0x2654
 794 #define mmGB_TILE_MODE17                                                        0x2655
 795 #define mmGB_TILE_MODE18                                                        0x2656
 796 #define mmGB_TILE_MODE19                                                        0x2657
 797 #define mmGB_TILE_MODE20                                                        0x2658
 798 #define mmGB_TILE_MODE21                                                        0x2659
 799 #define mmGB_TILE_MODE22                                                        0x265a
 800 #define mmGB_TILE_MODE23                                                        0x265b
 801 #define mmGB_TILE_MODE24                                                        0x265c
 802 #define mmGB_TILE_MODE25                                                        0x265d
 803 #define mmGB_TILE_MODE26                                                        0x265e
 804 #define mmGB_TILE_MODE27                                                        0x265f
 805 #define mmGB_TILE_MODE28                                                        0x2660
 806 #define mmGB_TILE_MODE29                                                        0x2661
 807 #define mmGB_TILE_MODE30                                                        0x2662
 808 #define mmGB_TILE_MODE31                                                        0x2663
 809 #define mmGB_MACROTILE_MODE0                                                    0x2664
 810 #define mmGB_MACROTILE_MODE1                                                    0x2665
 811 #define mmGB_MACROTILE_MODE2                                                    0x2666
 812 #define mmGB_MACROTILE_MODE3                                                    0x2667
 813 #define mmGB_MACROTILE_MODE4                                                    0x2668
 814 #define mmGB_MACROTILE_MODE5                                                    0x2669
 815 #define mmGB_MACROTILE_MODE6                                                    0x266a
 816 #define mmGB_MACROTILE_MODE7                                                    0x266b
 817 #define mmGB_MACROTILE_MODE8                                                    0x266c
 818 #define mmGB_MACROTILE_MODE9                                                    0x266d
 819 #define mmGB_MACROTILE_MODE10                                                   0x266e
 820 #define mmGB_MACROTILE_MODE11                                                   0x266f
 821 #define mmGB_MACROTILE_MODE12                                                   0x2670
 822 #define mmGB_MACROTILE_MODE13                                                   0x2671
 823 #define mmGB_MACROTILE_MODE14                                                   0x2672
 824 #define mmGB_MACROTILE_MODE15                                                   0x2673
 825 #define mmGB_EDC_MODE                                                           0x307e
 826 #define mmCC_GC_EDC_CONFIG                                                      0x3098
 827 #define mmRAS_SIGNATURE_CONTROL                                                 0x3380
 828 #define mmRAS_SIGNATURE_MASK                                                    0x3381
 829 #define mmRAS_SX_SIGNATURE0                                                     0x3382
 830 #define mmRAS_SX_SIGNATURE1                                                     0x3383
 831 #define mmRAS_SX_SIGNATURE2                                                     0x3384
 832 #define mmRAS_SX_SIGNATURE3                                                     0x3385
 833 #define mmRAS_DB_SIGNATURE0                                                     0x338b
 834 #define mmRAS_PA_SIGNATURE0                                                     0x338c
 835 #define mmRAS_VGT_SIGNATURE0                                                    0x338d
 836 #define mmRAS_SQ_SIGNATURE0                                                     0x338e
 837 #define mmRAS_SC_SIGNATURE0                                                     0x338f
 838 #define mmRAS_SC_SIGNATURE1                                                     0x3390
 839 #define mmRAS_SC_SIGNATURE2                                                     0x3391
 840 #define mmRAS_SC_SIGNATURE3                                                     0x3392
 841 #define mmRAS_SC_SIGNATURE4                                                     0x3393
 842 #define mmRAS_SC_SIGNATURE5                                                     0x3394
 843 #define mmRAS_SC_SIGNATURE6                                                     0x3395
 844 #define mmRAS_SC_SIGNATURE7                                                     0x3396
 845 #define mmRAS_IA_SIGNATURE0                                                     0x3397
 846 #define mmRAS_IA_SIGNATURE1                                                     0x3398
 847 #define mmRAS_SPI_SIGNATURE0                                                    0x3399
 848 #define mmRAS_SPI_SIGNATURE1                                                    0x339a
 849 #define mmRAS_TA_SIGNATURE0                                                     0x339b
 850 #define mmRAS_TD_SIGNATURE0                                                     0x339c
 851 #define mmRAS_CB_SIGNATURE0                                                     0x339d
 852 #define mmRAS_BCI_SIGNATURE0                                                    0x339e
 853 #define mmRAS_BCI_SIGNATURE1                                                    0x339f
 854 #define mmRAS_TA_SIGNATURE1                                                     0x33a0
 855 #define mmGRBM_HYP_CAM_INDEX                                                    0xf83e
 856 #define mmGRBM_CAM_INDEX                                                        0xf83e
 857 #define mmGRBM_HYP_CAM_DATA                                                     0xf83f
 858 #define mmGRBM_CAM_DATA                                                         0xf83f
 859 #define mmGRBM_CNTL                                                             0x2000
 860 #define mmGRBM_SKEW_CNTL                                                        0x2001
 861 #define mmGRBM_PWR_CNTL                                                         0x2003
 862 #define mmGRBM_STATUS                                                           0x2004
 863 #define mmGRBM_STATUS2                                                          0x2002
 864 #define mmGRBM_STATUS_SE0                                                       0x2005
 865 #define mmGRBM_STATUS_SE1                                                       0x2006
 866 #define mmGRBM_STATUS_SE2                                                       0x200e
 867 #define mmGRBM_STATUS_SE3                                                       0x200f
 868 #define mmGRBM_SOFT_RESET                                                       0x2008
 869 #define mmGRBM_DEBUG_CNTL                                                       0x2009
 870 #define mmGRBM_DEBUG_DATA                                                       0x200a
 871 #define mmGRBM_GFX_INDEX                                                        0xc200
 872 #define mmGRBM_GFX_CLKEN_CNTL                                                   0x200c
 873 #define mmGRBM_WAIT_IDLE_CLOCKS                                                 0x200d
 874 #define mmGRBM_DEBUG                                                            0x2014
 875 #define mmGRBM_DEBUG_SNAPSHOT                                                   0x2015
 876 #define mmGRBM_READ_ERROR                                                       0x2016
 877 #define mmGRBM_READ_ERROR2                                                      0x2017
 878 #define mmGRBM_INT_CNTL                                                         0x2018
 879 #define mmGRBM_TRAP_OP                                                          0x2019
 880 #define mmGRBM_TRAP_ADDR                                                        0x201a
 881 #define mmGRBM_TRAP_ADDR_MSK                                                    0x201b
 882 #define mmGRBM_TRAP_WD                                                          0x201c
 883 #define mmGRBM_TRAP_WD_MSK                                                      0x201d
 884 #define mmGRBM_DSM_BYPASS                                                       0x201e
 885 #define mmGRBM_WRITE_ERROR                                                      0x201f
 886 #define mmGRBM_PERFCOUNTER0_SELECT                                              0xd840
 887 #define mmGRBM_PERFCOUNTER1_SELECT                                              0xd841
 888 #define mmGRBM_SE0_PERFCOUNTER_SELECT                                           0xd842
 889 #define mmGRBM_SE1_PERFCOUNTER_SELECT                                           0xd843
 890 #define mmGRBM_SE2_PERFCOUNTER_SELECT                                           0xd844
 891 #define mmGRBM_SE3_PERFCOUNTER_SELECT                                           0xd845
 892 #define mmGRBM_PERFCOUNTER0_LO                                                  0xd040
 893 #define mmGRBM_PERFCOUNTER0_HI                                                  0xd041
 894 #define mmGRBM_PERFCOUNTER1_LO                                                  0xd043
 895 #define mmGRBM_PERFCOUNTER1_HI                                                  0xd044
 896 #define mmGRBM_SE0_PERFCOUNTER_LO                                               0xd045
 897 #define mmGRBM_SE0_PERFCOUNTER_HI                                               0xd046
 898 #define mmGRBM_SE1_PERFCOUNTER_LO                                               0xd047
 899 #define mmGRBM_SE1_PERFCOUNTER_HI                                               0xd048
 900 #define mmGRBM_SE2_PERFCOUNTER_LO                                               0xd049
 901 #define mmGRBM_SE2_PERFCOUNTER_HI                                               0xd04a
 902 #define mmGRBM_SE3_PERFCOUNTER_LO                                               0xd04b
 903 #define mmGRBM_SE3_PERFCOUNTER_HI                                               0xd04c
 904 #define mmGRBM_SCRATCH_REG0                                                     0x2040
 905 #define mmGRBM_SCRATCH_REG1                                                     0x2041
 906 #define mmGRBM_SCRATCH_REG2                                                     0x2042
 907 #define mmGRBM_SCRATCH_REG3                                                     0x2043
 908 #define mmGRBM_SCRATCH_REG4                                                     0x2044
 909 #define mmGRBM_SCRATCH_REG5                                                     0x2045
 910 #define mmGRBM_SCRATCH_REG6                                                     0x2046
 911 #define mmGRBM_SCRATCH_REG7                                                     0x2047
 912 #define mmDEBUG_INDEX                                                           0x203c
 913 #define mmDEBUG_DATA                                                            0x203d
 914 #define mmGRBM_NOWHERE                                                          0x203f
 915 #define mmPA_CL_VPORT_XSCALE                                                    0xa10f
 916 #define mmPA_CL_VPORT_XOFFSET                                                   0xa110
 917 #define mmPA_CL_VPORT_YSCALE                                                    0xa111
 918 #define mmPA_CL_VPORT_YOFFSET                                                   0xa112
 919 #define mmPA_CL_VPORT_ZSCALE                                                    0xa113
 920 #define mmPA_CL_VPORT_ZOFFSET                                                   0xa114
 921 #define mmPA_CL_VPORT_XSCALE_1                                                  0xa115
 922 #define mmPA_CL_VPORT_XSCALE_2                                                  0xa11b
 923 #define mmPA_CL_VPORT_XSCALE_3                                                  0xa121
 924 #define mmPA_CL_VPORT_XSCALE_4                                                  0xa127
 925 #define mmPA_CL_VPORT_XSCALE_5                                                  0xa12d
 926 #define mmPA_CL_VPORT_XSCALE_6                                                  0xa133
 927 #define mmPA_CL_VPORT_XSCALE_7                                                  0xa139
 928 #define mmPA_CL_VPORT_XSCALE_8                                                  0xa13f
 929 #define mmPA_CL_VPORT_XSCALE_9                                                  0xa145
 930 #define mmPA_CL_VPORT_XSCALE_10                                                 0xa14b
 931 #define mmPA_CL_VPORT_XSCALE_11                                                 0xa151
 932 #define mmPA_CL_VPORT_XSCALE_12                                                 0xa157
 933 #define mmPA_CL_VPORT_XSCALE_13                                                 0xa15d
 934 #define mmPA_CL_VPORT_XSCALE_14                                                 0xa163
 935 #define mmPA_CL_VPORT_XSCALE_15                                                 0xa169
 936 #define mmPA_CL_VPORT_XOFFSET_1                                                 0xa116
 937 #define mmPA_CL_VPORT_XOFFSET_2                                                 0xa11c
 938 #define mmPA_CL_VPORT_XOFFSET_3                                                 0xa122
 939 #define mmPA_CL_VPORT_XOFFSET_4                                                 0xa128
 940 #define mmPA_CL_VPORT_XOFFSET_5                                                 0xa12e
 941 #define mmPA_CL_VPORT_XOFFSET_6                                                 0xa134
 942 #define mmPA_CL_VPORT_XOFFSET_7                                                 0xa13a
 943 #define mmPA_CL_VPORT_XOFFSET_8                                                 0xa140
 944 #define mmPA_CL_VPORT_XOFFSET_9                                                 0xa146
 945 #define mmPA_CL_VPORT_XOFFSET_10                                                0xa14c
 946 #define mmPA_CL_VPORT_XOFFSET_11                                                0xa152
 947 #define mmPA_CL_VPORT_XOFFSET_12                                                0xa158
 948 #define mmPA_CL_VPORT_XOFFSET_13                                                0xa15e
 949 #define mmPA_CL_VPORT_XOFFSET_14                                                0xa164
 950 #define mmPA_CL_VPORT_XOFFSET_15                                                0xa16a
 951 #define mmPA_CL_VPORT_YSCALE_1                                                  0xa117
 952 #define mmPA_CL_VPORT_YSCALE_2                                                  0xa11d
 953 #define mmPA_CL_VPORT_YSCALE_3                                                  0xa123
 954 #define mmPA_CL_VPORT_YSCALE_4                                                  0xa129
 955 #define mmPA_CL_VPORT_YSCALE_5                                                  0xa12f
 956 #define mmPA_CL_VPORT_YSCALE_6                                                  0xa135
 957 #define mmPA_CL_VPORT_YSCALE_7                                                  0xa13b
 958 #define mmPA_CL_VPORT_YSCALE_8                                                  0xa141
 959 #define mmPA_CL_VPORT_YSCALE_9                                                  0xa147
 960 #define mmPA_CL_VPORT_YSCALE_10                                                 0xa14d
 961 #define mmPA_CL_VPORT_YSCALE_11                                                 0xa153
 962 #define mmPA_CL_VPORT_YSCALE_12                                                 0xa159
 963 #define mmPA_CL_VPORT_YSCALE_13                                                 0xa15f
 964 #define mmPA_CL_VPORT_YSCALE_14                                                 0xa165
 965 #define mmPA_CL_VPORT_YSCALE_15                                                 0xa16b
 966 #define mmPA_CL_VPORT_YOFFSET_1                                                 0xa118
 967 #define mmPA_CL_VPORT_YOFFSET_2                                                 0xa11e
 968 #define mmPA_CL_VPORT_YOFFSET_3                                                 0xa124
 969 #define mmPA_CL_VPORT_YOFFSET_4                                                 0xa12a
 970 #define mmPA_CL_VPORT_YOFFSET_5                                                 0xa130
 971 #define mmPA_CL_VPORT_YOFFSET_6                                                 0xa136
 972 #define mmPA_CL_VPORT_YOFFSET_7                                                 0xa13c
 973 #define mmPA_CL_VPORT_YOFFSET_8                                                 0xa142
 974 #define mmPA_CL_VPORT_YOFFSET_9                                                 0xa148
 975 #define mmPA_CL_VPORT_YOFFSET_10                                                0xa14e
 976 #define mmPA_CL_VPORT_YOFFSET_11                                                0xa154
 977 #define mmPA_CL_VPORT_YOFFSET_12                                                0xa15a
 978 #define mmPA_CL_VPORT_YOFFSET_13                                                0xa160
 979 #define mmPA_CL_VPORT_YOFFSET_14                                                0xa166
 980 #define mmPA_CL_VPORT_YOFFSET_15                                                0xa16c
 981 #define mmPA_CL_VPORT_ZSCALE_1                                                  0xa119
 982 #define mmPA_CL_VPORT_ZSCALE_2                                                  0xa11f
 983 #define mmPA_CL_VPORT_ZSCALE_3                                                  0xa125
 984 #define mmPA_CL_VPORT_ZSCALE_4                                                  0xa12b
 985 #define mmPA_CL_VPORT_ZSCALE_5                                                  0xa131
 986 #define mmPA_CL_VPORT_ZSCALE_6                                                  0xa137
 987 #define mmPA_CL_VPORT_ZSCALE_7                                                  0xa13d
 988 #define mmPA_CL_VPORT_ZSCALE_8                                                  0xa143
 989 #define mmPA_CL_VPORT_ZSCALE_9                                                  0xa149
 990 #define mmPA_CL_VPORT_ZSCALE_10                                                 0xa14f
 991 #define mmPA_CL_VPORT_ZSCALE_11                                                 0xa155
 992 #define mmPA_CL_VPORT_ZSCALE_12                                                 0xa15b
 993 #define mmPA_CL_VPORT_ZSCALE_13                                                 0xa161
 994 #define mmPA_CL_VPORT_ZSCALE_14                                                 0xa167
 995 #define mmPA_CL_VPORT_ZSCALE_15                                                 0xa16d
 996 #define mmPA_CL_VPORT_ZOFFSET_1                                                 0xa11a
 997 #define mmPA_CL_VPORT_ZOFFSET_2                                                 0xa120
 998 #define mmPA_CL_VPORT_ZOFFSET_3                                                 0xa126
 999 #define mmPA_CL_VPORT_ZOFFSET_4                                                 0xa12c
1000 #define mmPA_CL_VPORT_ZOFFSET_5                                                 0xa132
1001 #define mmPA_CL_VPORT_ZOFFSET_6                                                 0xa138
1002 #define mmPA_CL_VPORT_ZOFFSET_7                                                 0xa13e
1003 #define mmPA_CL_VPORT_ZOFFSET_8                                                 0xa144
1004 #define mmPA_CL_VPORT_ZOFFSET_9                                                 0xa14a
1005 #define mmPA_CL_VPORT_ZOFFSET_10                                                0xa150
1006 #define mmPA_CL_VPORT_ZOFFSET_11                                                0xa156
1007 #define mmPA_CL_VPORT_ZOFFSET_12                                                0xa15c
1008 #define mmPA_CL_VPORT_ZOFFSET_13                                                0xa162
1009 #define mmPA_CL_VPORT_ZOFFSET_14                                                0xa168
1010 #define mmPA_CL_VPORT_ZOFFSET_15                                                0xa16e
1011 #define mmPA_CL_VTE_CNTL                                                        0xa206
1012 #define mmPA_CL_VS_OUT_CNTL                                                     0xa207
1013 #define mmPA_CL_NANINF_CNTL                                                     0xa208
1014 #define mmPA_CL_CLIP_CNTL                                                       0xa204
1015 #define mmPA_CL_GB_VERT_CLIP_ADJ                                                0xa2fa
1016 #define mmPA_CL_GB_VERT_DISC_ADJ                                                0xa2fb
1017 #define mmPA_CL_GB_HORZ_CLIP_ADJ                                                0xa2fc
1018 #define mmPA_CL_GB_HORZ_DISC_ADJ                                                0xa2fd
1019 #define mmPA_CL_UCP_0_X                                                         0xa16f
1020 #define mmPA_CL_UCP_0_Y                                                         0xa170
1021 #define mmPA_CL_UCP_0_Z                                                         0xa171
1022 #define mmPA_CL_UCP_0_W                                                         0xa172
1023 #define mmPA_CL_UCP_1_X                                                         0xa173
1024 #define mmPA_CL_UCP_1_Y                                                         0xa174
1025 #define mmPA_CL_UCP_1_Z                                                         0xa175
1026 #define mmPA_CL_UCP_1_W                                                         0xa176
1027 #define mmPA_CL_UCP_2_X                                                         0xa177
1028 #define mmPA_CL_UCP_2_Y                                                         0xa178
1029 #define mmPA_CL_UCP_2_Z                                                         0xa179
1030 #define mmPA_CL_UCP_2_W                                                         0xa17a
1031 #define mmPA_CL_UCP_3_X                                                         0xa17b
1032 #define mmPA_CL_UCP_3_Y                                                         0xa17c
1033 #define mmPA_CL_UCP_3_Z                                                         0xa17d
1034 #define mmPA_CL_UCP_3_W                                                         0xa17e
1035 #define mmPA_CL_UCP_4_X                                                         0xa17f
1036 #define mmPA_CL_UCP_4_Y                                                         0xa180
1037 #define mmPA_CL_UCP_4_Z                                                         0xa181
1038 #define mmPA_CL_UCP_4_W                                                         0xa182
1039 #define mmPA_CL_UCP_5_X                                                         0xa183
1040 #define mmPA_CL_UCP_5_Y                                                         0xa184
1041 #define mmPA_CL_UCP_5_Z                                                         0xa185
1042 #define mmPA_CL_UCP_5_W                                                         0xa186
1043 #define mmPA_CL_POINT_X_RAD                                                     0xa1f5
1044 #define mmPA_CL_POINT_Y_RAD                                                     0xa1f6
1045 #define mmPA_CL_POINT_SIZE                                                      0xa1f7
1046 #define mmPA_CL_POINT_CULL_RAD                                                  0xa1f8
1047 #define mmPA_CL_ENHANCE                                                         0x2285
1048 #define mmPA_CL_RESET_DEBUG                                                     0x2286
1049 #define mmPA_SU_VTX_CNTL                                                        0xa2f9
1050 #define mmPA_SU_POINT_SIZE                                                      0xa280
1051 #define mmPA_SU_POINT_MINMAX                                                    0xa281
1052 #define mmPA_SU_LINE_CNTL                                                       0xa282
1053 #define mmPA_SU_LINE_STIPPLE_CNTL                                               0xa209
1054 #define mmPA_SU_LINE_STIPPLE_SCALE                                              0xa20a
1055 #define mmPA_SU_PRIM_FILTER_CNTL                                                0xa20b
1056 #define mmPA_SU_SC_MODE_CNTL                                                    0xa205
1057 #define mmPA_SU_POLY_OFFSET_DB_FMT_CNTL                                         0xa2de
1058 #define mmPA_SU_POLY_OFFSET_CLAMP                                               0xa2df
1059 #define mmPA_SU_POLY_OFFSET_FRONT_SCALE                                         0xa2e0
1060 #define mmPA_SU_POLY_OFFSET_FRONT_OFFSET                                        0xa2e1
1061 #define mmPA_SU_POLY_OFFSET_BACK_SCALE                                          0xa2e2
1062 #define mmPA_SU_POLY_OFFSET_BACK_OFFSET                                         0xa2e3
1063 #define mmPA_SU_HARDWARE_SCREEN_OFFSET                                          0xa08d
1064 #define mmPA_SU_LINE_STIPPLE_VALUE                                              0xc280
1065 #define mmPA_SU_PERFCOUNTER0_SELECT                                             0xd900
1066 #define mmPA_SU_PERFCOUNTER0_SELECT1                                            0xd901
1067 #define mmPA_SU_PERFCOUNTER1_SELECT                                             0xd902
1068 #define mmPA_SU_PERFCOUNTER1_SELECT1                                            0xd903
1069 #define mmPA_SU_PERFCOUNTER2_SELECT                                             0xd904
1070 #define mmPA_SU_PERFCOUNTER3_SELECT                                             0xd905
1071 #define mmPA_SU_PERFCOUNTER0_LO                                                 0xd100
1072 #define mmPA_SU_PERFCOUNTER0_HI                                                 0xd101
1073 #define mmPA_SU_PERFCOUNTER1_LO                                                 0xd102
1074 #define mmPA_SU_PERFCOUNTER1_HI                                                 0xd103
1075 #define mmPA_SU_PERFCOUNTER2_LO                                                 0xd104
1076 #define mmPA_SU_PERFCOUNTER2_HI                                                 0xd105
1077 #define mmPA_SU_PERFCOUNTER3_LO                                                 0xd106
1078 #define mmPA_SU_PERFCOUNTER3_HI                                                 0xd107
1079 #define mmPA_SC_AA_CONFIG                                                       0xa2f8
1080 #define mmPA_SC_AA_MASK_X0Y0_X1Y0                                               0xa30e
1081 #define mmPA_SC_AA_MASK_X0Y1_X1Y1                                               0xa30f
1082 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0                                     0xa2fe
1083 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1                                     0xa2ff
1084 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2                                     0xa300
1085 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3                                     0xa301
1086 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0                                     0xa302
1087 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1                                     0xa303
1088 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2                                     0xa304
1089 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3                                     0xa305
1090 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0                                     0xa306
1091 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1                                     0xa307
1092 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2                                     0xa308
1093 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3                                     0xa309
1094 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0                                     0xa30a
1095 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1                                     0xa30b
1096 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2                                     0xa30c
1097 #define mmPA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3                                     0xa30d
1098 #define mmPA_SC_CENTROID_PRIORITY_0                                             0xa2f5
1099 #define mmPA_SC_CENTROID_PRIORITY_1                                             0xa2f6
1100 #define mmPA_SC_CLIPRECT_0_TL                                                   0xa084
1101 #define mmPA_SC_CLIPRECT_0_BR                                                   0xa085
1102 #define mmPA_SC_CLIPRECT_1_TL                                                   0xa086
1103 #define mmPA_SC_CLIPRECT_1_BR                                                   0xa087
1104 #define mmPA_SC_CLIPRECT_2_TL                                                   0xa088
1105 #define mmPA_SC_CLIPRECT_2_BR                                                   0xa089
1106 #define mmPA_SC_CLIPRECT_3_TL                                                   0xa08a
1107 #define mmPA_SC_CLIPRECT_3_BR                                                   0xa08b
1108 #define mmPA_SC_CLIPRECT_RULE                                                   0xa083
1109 #define mmPA_SC_EDGERULE                                                        0xa08c
1110 #define mmPA_SC_LINE_CNTL                                                       0xa2f7
1111 #define mmPA_SC_LINE_STIPPLE                                                    0xa283
1112 #define mmPA_SC_MODE_CNTL_0                                                     0xa292
1113 #define mmPA_SC_MODE_CNTL_1                                                     0xa293
1114 #define mmPA_SC_RASTER_CONFIG                                                   0xa0d4
1115 #define mmPA_SC_RASTER_CONFIG_1                                                 0xa0d5
1116 #define mmPA_SC_SCREEN_EXTENT_CONTROL                                           0xa0d6
1117 #define mmPA_SC_GENERIC_SCISSOR_TL                                              0xa090
1118 #define mmPA_SC_GENERIC_SCISSOR_BR                                              0xa091
1119 #define mmPA_SC_SCREEN_SCISSOR_TL                                               0xa00c
1120 #define mmPA_SC_SCREEN_SCISSOR_BR                                               0xa00d
1121 #define mmPA_SC_WINDOW_OFFSET                                                   0xa080
1122 #define mmPA_SC_WINDOW_SCISSOR_TL                                               0xa081
1123 #define mmPA_SC_WINDOW_SCISSOR_BR                                               0xa082
1124 #define mmPA_SC_VPORT_SCISSOR_0_TL                                              0xa094
1125 #define mmPA_SC_VPORT_SCISSOR_1_TL                                              0xa096
1126 #define mmPA_SC_VPORT_SCISSOR_2_TL                                              0xa098
1127 #define mmPA_SC_VPORT_SCISSOR_3_TL                                              0xa09a
1128 #define mmPA_SC_VPORT_SCISSOR_4_TL                                              0xa09c
1129 #define mmPA_SC_VPORT_SCISSOR_5_TL                                              0xa09e
1130 #define mmPA_SC_VPORT_SCISSOR_6_TL                                              0xa0a0
1131 #define mmPA_SC_VPORT_SCISSOR_7_TL                                              0xa0a2
1132 #define mmPA_SC_VPORT_SCISSOR_8_TL                                              0xa0a4
1133 #define mmPA_SC_VPORT_SCISSOR_9_TL                                              0xa0a6
1134 #define mmPA_SC_VPORT_SCISSOR_10_TL                                             0xa0a8
1135 #define mmPA_SC_VPORT_SCISSOR_11_TL                                             0xa0aa
1136 #define mmPA_SC_VPORT_SCISSOR_12_TL                                             0xa0ac
1137 #define mmPA_SC_VPORT_SCISSOR_13_TL                                             0xa0ae
1138 #define mmPA_SC_VPORT_SCISSOR_14_TL                                             0xa0b0
1139 #define mmPA_SC_VPORT_SCISSOR_15_TL                                             0xa0b2
1140 #define mmPA_SC_VPORT_SCISSOR_0_BR                                              0xa095
1141 #define mmPA_SC_VPORT_SCISSOR_1_BR                                              0xa097
1142 #define mmPA_SC_VPORT_SCISSOR_2_BR                                              0xa099
1143 #define mmPA_SC_VPORT_SCISSOR_3_BR                                              0xa09b
1144 #define mmPA_SC_VPORT_SCISSOR_4_BR                                              0xa09d
1145 #define mmPA_SC_VPORT_SCISSOR_5_BR                                              0xa09f
1146 #define mmPA_SC_VPORT_SCISSOR_6_BR                                              0xa0a1
1147 #define mmPA_SC_VPORT_SCISSOR_7_BR                                              0xa0a3
1148 #define mmPA_SC_VPORT_SCISSOR_8_BR                                              0xa0a5
1149 #define mmPA_SC_VPORT_SCISSOR_9_BR                                              0xa0a7
1150 #define mmPA_SC_VPORT_SCISSOR_10_BR                                             0xa0a9
1151 #define mmPA_SC_VPORT_SCISSOR_11_BR                                             0xa0ab
1152 #define mmPA_SC_VPORT_SCISSOR_12_BR                                             0xa0ad
1153 #define mmPA_SC_VPORT_SCISSOR_13_BR                                             0xa0af
1154 #define mmPA_SC_VPORT_SCISSOR_14_BR                                             0xa0b1
1155 #define mmPA_SC_VPORT_SCISSOR_15_BR                                             0xa0b3
1156 #define mmPA_SC_VPORT_ZMIN_0                                                    0xa0b4
1157 #define mmPA_SC_VPORT_ZMIN_1                                                    0xa0b6
1158 #define mmPA_SC_VPORT_ZMIN_2                                                    0xa0b8
1159 #define mmPA_SC_VPORT_ZMIN_3                                                    0xa0ba
1160 #define mmPA_SC_VPORT_ZMIN_4                                                    0xa0bc
1161 #define mmPA_SC_VPORT_ZMIN_5                                                    0xa0be
1162 #define mmPA_SC_VPORT_ZMIN_6                                                    0xa0c0
1163 #define mmPA_SC_VPORT_ZMIN_7                                                    0xa0c2
1164 #define mmPA_SC_VPORT_ZMIN_8                                                    0xa0c4
1165 #define mmPA_SC_VPORT_ZMIN_9                                                    0xa0c6
1166 #define mmPA_SC_VPORT_ZMIN_10                                                   0xa0c8
1167 #define mmPA_SC_VPORT_ZMIN_11                                                   0xa0ca
1168 #define mmPA_SC_VPORT_ZMIN_12                                                   0xa0cc
1169 #define mmPA_SC_VPORT_ZMIN_13                                                   0xa0ce
1170 #define mmPA_SC_VPORT_ZMIN_14                                                   0xa0d0
1171 #define mmPA_SC_VPORT_ZMIN_15                                                   0xa0d2
1172 #define mmPA_SC_VPORT_ZMAX_0                                                    0xa0b5
1173 #define mmPA_SC_VPORT_ZMAX_1                                                    0xa0b7
1174 #define mmPA_SC_VPORT_ZMAX_2                                                    0xa0b9
1175 #define mmPA_SC_VPORT_ZMAX_3                                                    0xa0bb
1176 #define mmPA_SC_VPORT_ZMAX_4                                                    0xa0bd
1177 #define mmPA_SC_VPORT_ZMAX_5                                                    0xa0bf
1178 #define mmPA_SC_VPORT_ZMAX_6                                                    0xa0c1
1179 #define mmPA_SC_VPORT_ZMAX_7                                                    0xa0c3
1180 #define mmPA_SC_VPORT_ZMAX_8                                                    0xa0c5
1181 #define mmPA_SC_VPORT_ZMAX_9                                                    0xa0c7
1182 #define mmPA_SC_VPORT_ZMAX_10                                                   0xa0c9
1183 #define mmPA_SC_VPORT_ZMAX_11                                                   0xa0cb
1184 #define mmPA_SC_VPORT_ZMAX_12                                                   0xa0cd
1185 #define mmPA_SC_VPORT_ZMAX_13                                                   0xa0cf
1186 #define mmPA_SC_VPORT_ZMAX_14                                                   0xa0d1
1187 #define mmPA_SC_VPORT_ZMAX_15                                                   0xa0d3
1188 #define mmPA_SC_ENHANCE                                                         0x22fc
1189 #define mmPA_SC_FIFO_SIZE                                                       0x22f3
1190 #define mmPA_SC_IF_FIFO_SIZE                                                    0x22f5
1191 #define mmPA_SC_FORCE_EOV_MAX_CNTS                                              0x22c9
1192 #define mmPA_SC_LINE_STIPPLE_STATE                                              0xc281
1193 #define mmPA_SC_SCREEN_EXTENT_MIN_0                                             0xc284
1194 #define mmPA_SC_SCREEN_EXTENT_MAX_0                                             0xc285
1195 #define mmPA_SC_SCREEN_EXTENT_MIN_1                                             0xc286
1196 #define mmPA_SC_SCREEN_EXTENT_MAX_1                                             0xc28b
1197 #define mmPA_SC_PERFCOUNTER0_SELECT                                             0xd940
1198 #define mmPA_SC_PERFCOUNTER0_SELECT1                                            0xd941
1199 #define mmPA_SC_PERFCOUNTER1_SELECT                                             0xd942
1200 #define mmPA_SC_PERFCOUNTER2_SELECT                                             0xd943
1201 #define mmPA_SC_PERFCOUNTER3_SELECT                                             0xd944
1202 #define mmPA_SC_PERFCOUNTER4_SELECT                                             0xd945
1203 #define mmPA_SC_PERFCOUNTER5_SELECT                                             0xd946
1204 #define mmPA_SC_PERFCOUNTER6_SELECT                                             0xd947
1205 #define mmPA_SC_PERFCOUNTER7_SELECT                                             0xd948
1206 #define mmPA_SC_PERFCOUNTER0_LO                                                 0xd140
1207 #define mmPA_SC_PERFCOUNTER0_HI                                                 0xd141
1208 #define mmPA_SC_PERFCOUNTER1_LO                                                 0xd142
1209 #define mmPA_SC_PERFCOUNTER1_HI                                                 0xd143
1210 #define mmPA_SC_PERFCOUNTER2_LO                                                 0xd144
1211 #define mmPA_SC_PERFCOUNTER2_HI                                                 0xd145
1212 #define mmPA_SC_PERFCOUNTER3_LO                                                 0xd146
1213 #define mmPA_SC_PERFCOUNTER3_HI                                                 0xd147
1214 #define mmPA_SC_PERFCOUNTER4_LO                                                 0xd148
1215 #define mmPA_SC_PERFCOUNTER4_HI                                                 0xd149
1216 #define mmPA_SC_PERFCOUNTER5_LO                                                 0xd14a
1217 #define mmPA_SC_PERFCOUNTER5_HI                                                 0xd14b
1218 #define mmPA_SC_PERFCOUNTER6_LO                                                 0xd14c
1219 #define mmPA_SC_PERFCOUNTER6_HI                                                 0xd14d
1220 #define mmPA_SC_PERFCOUNTER7_LO                                                 0xd14e
1221 #define mmPA_SC_PERFCOUNTER7_HI                                                 0xd14f
1222 #define mmPA_SC_P3D_TRAP_SCREEN_HV_EN                                           0xc2a0
1223 #define mmPA_SC_P3D_TRAP_SCREEN_H                                               0xc2a1
1224 #define mmPA_SC_P3D_TRAP_SCREEN_V                                               0xc2a2
1225 #define mmPA_SC_P3D_TRAP_SCREEN_OCCURRENCE                                      0xc2a3
1226 #define mmPA_SC_P3D_TRAP_SCREEN_COUNT                                           0xc2a4
1227 #define mmPA_SC_HP3D_TRAP_SCREEN_HV_EN                                          0xc2a8
1228 #define mmPA_SC_HP3D_TRAP_SCREEN_H                                              0xc2a9
1229 #define mmPA_SC_HP3D_TRAP_SCREEN_V                                              0xc2aa
1230 #define mmPA_SC_HP3D_TRAP_SCREEN_OCCURRENCE                                     0xc2ab
1231 #define mmPA_SC_HP3D_TRAP_SCREEN_COUNT                                          0xc2ac
1232 #define mmPA_SC_TRAP_SCREEN_HV_EN                                               0xc2b0
1233 #define mmPA_SC_TRAP_SCREEN_H                                                   0xc2b1
1234 #define mmPA_SC_TRAP_SCREEN_V                                                   0xc2b2
1235 #define mmPA_SC_TRAP_SCREEN_OCCURRENCE                                          0xc2b3
1236 #define mmPA_SC_TRAP_SCREEN_COUNT                                               0xc2b4
1237 #define mmPA_SC_P3D_TRAP_SCREEN_HV_LOCK                                         0x22c0
1238 #define mmPA_SC_HP3D_TRAP_SCREEN_HV_LOCK                                        0x22c1
1239 #define mmPA_SC_TRAP_SCREEN_HV_LOCK                                             0x22c2
1240 #define mmPA_CL_CNTL_STATUS                                                     0x2284
1241 #define mmPA_SU_CNTL_STATUS                                                     0x2294
1242 #define mmPA_SC_FIFO_DEPTH_CNTL                                                 0x2295
1243 #define mmCGTT_PA_CLK_CTRL                                                      0xf088
1244 #define mmCGTT_SC_CLK_CTRL                                                      0xf089
1245 #define mmPA_SU_DEBUG_CNTL                                                      0x2280
1246 #define mmPA_SU_DEBUG_DATA                                                      0x2281
1247 #define mmPA_SC_DEBUG_CNTL                                                      0x22f6
1248 #define mmPA_SC_DEBUG_DATA                                                      0x22f7
1249 #define ixCLIPPER_DEBUG_REG00                                                   0x0
1250 #define ixCLIPPER_DEBUG_REG01                                                   0x1
1251 #define ixCLIPPER_DEBUG_REG02                                                   0x2
1252 #define ixCLIPPER_DEBUG_REG03                                                   0x3
1253 #define ixCLIPPER_DEBUG_REG04                                                   0x4
1254 #define ixCLIPPER_DEBUG_REG05                                                   0x5
1255 #define ixCLIPPER_DEBUG_REG06                                                   0x6
1256 #define ixCLIPPER_DEBUG_REG07                                                   0x7
1257 #define ixCLIPPER_DEBUG_REG08                                                   0x8
1258 #define ixCLIPPER_DEBUG_REG09                                                   0x9
1259 #define ixCLIPPER_DEBUG_REG10                                                   0xa
1260 #define ixCLIPPER_DEBUG_REG11                                                   0xb
1261 #define ixCLIPPER_DEBUG_REG12                                                   0xc
1262 #define ixCLIPPER_DEBUG_REG13                                                   0xd
1263 #define ixCLIPPER_DEBUG_REG14                                                   0xe
1264 #define ixCLIPPER_DEBUG_REG15                                                   0xf
1265 #define ixCLIPPER_DEBUG_REG16                                                   0x10
1266 #define ixCLIPPER_DEBUG_REG17                                                   0x11
1267 #define ixCLIPPER_DEBUG_REG18                                                   0x12
1268 #define ixCLIPPER_DEBUG_REG19                                                   0x13
1269 #define ixSXIFCCG_DEBUG_REG0                                                    0x14
1270 #define ixSXIFCCG_DEBUG_REG1                                                    0x15
1271 #define ixSXIFCCG_DEBUG_REG2                                                    0x16
1272 #define ixSXIFCCG_DEBUG_REG3                                                    0x17
1273 #define ixSETUP_DEBUG_REG0                                                      0x18
1274 #define ixSETUP_DEBUG_REG1                                                      0x19
1275 #define ixSETUP_DEBUG_REG2                                                      0x1a
1276 #define ixSETUP_DEBUG_REG3                                                      0x1b
1277 #define ixSETUP_DEBUG_REG4                                                      0x1c
1278 #define ixSETUP_DEBUG_REG5                                                      0x1d
1279 #define ixPA_SC_DEBUG_REG0                                                      0x0
1280 #define ixPA_SC_DEBUG_REG1                                                      0x1
1281 #define mmCOMPUTE_DISPATCH_INITIATOR                                            0x2e00
1282 #define mmCOMPUTE_DIM_X                                                         0x2e01
1283 #define mmCOMPUTE_DIM_Y                                                         0x2e02
1284 #define mmCOMPUTE_DIM_Z                                                         0x2e03
1285 #define mmCOMPUTE_START_X                                                       0x2e04
1286 #define mmCOMPUTE_START_Y                                                       0x2e05
1287 #define mmCOMPUTE_START_Z                                                       0x2e06
1288 #define mmCOMPUTE_NUM_THREAD_X                                                  0x2e07
1289 #define mmCOMPUTE_NUM_THREAD_Y                                                  0x2e08
1290 #define mmCOMPUTE_NUM_THREAD_Z                                                  0x2e09
1291 #define mmCOMPUTE_PIPELINESTAT_ENABLE                                           0x2e0a
1292 #define mmCOMPUTE_PERFCOUNT_ENABLE                                              0x2e0b
1293 #define mmCOMPUTE_PGM_LO                                                        0x2e0c
1294 #define mmCOMPUTE_PGM_HI                                                        0x2e0d
1295 #define mmCOMPUTE_TBA_LO                                                        0x2e0e
1296 #define mmCOMPUTE_TBA_HI                                                        0x2e0f
1297 #define mmCOMPUTE_TMA_LO                                                        0x2e10
1298 #define mmCOMPUTE_TMA_HI                                                        0x2e11
1299 #define mmCOMPUTE_PGM_RSRC1                                                     0x2e12
1300 #define mmCOMPUTE_PGM_RSRC2                                                     0x2e13
1301 #define mmCOMPUTE_VMID                                                          0x2e14
1302 #define mmCOMPUTE_RESOURCE_LIMITS                                               0x2e15
1303 #define mmCOMPUTE_STATIC_THREAD_MGMT_SE0                                        0x2e16
1304 #define mmCOMPUTE_STATIC_THREAD_MGMT_SE1                                        0x2e17
1305 #define mmCOMPUTE_TMPRING_SIZE                                                  0x2e18
1306 #define mmCOMPUTE_STATIC_THREAD_MGMT_SE2                                        0x2e19
1307 #define mmCOMPUTE_STATIC_THREAD_MGMT_SE3                                        0x2e1a
1308 #define mmCOMPUTE_RESTART_X                                                     0x2e1b
1309 #define mmCOMPUTE_RESTART_Y                                                     0x2e1c
1310 #define mmCOMPUTE_RESTART_Z                                                     0x2e1d
1311 #define mmCOMPUTE_THREAD_TRACE_ENABLE                                           0x2e1e
1312 #define mmCOMPUTE_MISC_RESERVED                                                 0x2e1f
1313 #define mmCOMPUTE_DISPATCH_ID                                                   0x2e20
1314 #define mmCOMPUTE_THREADGROUP_ID                                                0x2e21
1315 #define mmCOMPUTE_RELAUNCH                                                      0x2e22
1316 #define mmCOMPUTE_WAVE_RESTORE_ADDR_LO                                          0x2e23
1317 #define mmCOMPUTE_WAVE_RESTORE_ADDR_HI                                          0x2e24
1318 #define mmCOMPUTE_WAVE_RESTORE_CONTROL                                          0x2e25
1319 #define mmCOMPUTE_USER_DATA_0                                                   0x2e40
1320 #define mmCOMPUTE_USER_DATA_1                                                   0x2e41
1321 #define mmCOMPUTE_USER_DATA_2                                                   0x2e42
1322 #define mmCOMPUTE_USER_DATA_3                                                   0x2e43
1323 #define mmCOMPUTE_USER_DATA_4                                                   0x2e44
1324 #define mmCOMPUTE_USER_DATA_5                                                   0x2e45
1325 #define mmCOMPUTE_USER_DATA_6                                                   0x2e46
1326 #define mmCOMPUTE_USER_DATA_7                                                   0x2e47
1327 #define mmCOMPUTE_USER_DATA_8                                                   0x2e48
1328 #define mmCOMPUTE_USER_DATA_9                                                   0x2e49
1329 #define mmCOMPUTE_USER_DATA_10                                                  0x2e4a
1330 #define mmCOMPUTE_USER_DATA_11                                                  0x2e4b
1331 #define mmCOMPUTE_USER_DATA_12                                                  0x2e4c
1332 #define mmCOMPUTE_USER_DATA_13                                                  0x2e4d
1333 #define mmCOMPUTE_USER_DATA_14                                                  0x2e4e
1334 #define mmCOMPUTE_USER_DATA_15                                                  0x2e4f
1335 #define mmCOMPUTE_NOWHERE                                                       0x2e7f
1336 #define mmCSPRIV_CONNECT                                                        0x0
1337 #define mmCSPRIV_THREAD_TRACE_TG0                                               0x1e
1338 #define mmCSPRIV_THREAD_TRACE_TG1                                               0x1e
1339 #define mmCSPRIV_THREAD_TRACE_TG2                                               0x1e
1340 #define mmCSPRIV_THREAD_TRACE_TG3                                               0x1e
1341 #define mmCSPRIV_THREAD_TRACE_EVENT                                             0x1f
1342 #define mmRLC_CNTL                                                              0xec00
1343 #define mmRLC_DEBUG_SELECT                                                      0xec01
1344 #define mmRLC_DEBUG                                                             0xec02
1345 #define mmRLC_MC_CNTL                                                           0xec03
1346 #define mmRLC_STAT                                                              0xec04
1347 #define mmRLC_SAFE_MODE                                                         0xec05
1348 #define mmRLC_SOFT_RESET_GPU                                                    0xec05
1349 #define mmRLC_MEM_SLP_CNTL                                                      0xec06
1350 #define mmSMU_RLC_RESPONSE                                                      0xec07
1351 #define mmRLC_RLCV_SAFE_MODE                                                    0xec08
1352 #define mmRLC_SMU_SAFE_MODE                                                     0xec09
1353 #define mmRLC_RLCV_COMMAND                                                      0xec0a
1354 #define mmRLC_PERFMON_CLK_CNTL                                                  0xdcbf
1355 #define mmRLC_PERFMON_CNTL                                                      0xdcc0
1356 #define mmRLC_PERFCOUNTER0_SELECT                                               0xdcc1
1357 #define mmRLC_PERFCOUNTER1_SELECT                                               0xdcc2
1358 #define mmRLC_PERFCOUNTER0_LO                                                   0xd480
1359 #define mmRLC_PERFCOUNTER1_LO                                                   0xd482
1360 #define mmRLC_PERFCOUNTER0_HI                                                   0xd481
1361 #define mmRLC_PERFCOUNTER1_HI                                                   0xd483
1362 #define mmCGTT_RLC_CLK_CTRL                                                     0xf0b8
1363 #define mmRLC_LB_CNTL                                                           0xec19
1364 #define mmRLC_LB_CNTR_MAX                                                       0xec12
1365 #define mmRLC_LB_CNTR_INIT                                                      0xec1b
1366 #define mmRLC_LOAD_BALANCE_CNTR                                                 0xec1c
1367 #define mmRLC_SAVE_AND_RESTORE_BASE                                             0xec1d
1368 #define mmRLC_JUMP_TABLE_RESTORE                                                0xec1e
1369 #define mmRLC_DRIVER_CPDMA_STATUS                                               0xec1e
1370 #define mmRLC_PG_DELAY_2                                                        0xec1f
1371 #define mmRLC_GPM_DEBUG_SELECT                                                  0xec20
1372 #define mmRLC_GPM_DEBUG                                                         0xec21
1373 #define mmRLC_HYP_GPM_UCODE_ADDR                                                0xf83c
1374 #define mmRLC_GPM_UCODE_ADDR                                                    0xf83c
1375 #define mmRLC_HYP_GPM_UCODE_DATA                                                0xf83d
1376 #define mmRLC_GPM_UCODE_DATA                                                    0xf83d
1377 #define mmGPU_BIST_CONTROL                                                      0xf835
1378 #define mmRLC_ROM_CNTL                                                          0xf836
1379 #define mmRLC_GPU_CLOCK_COUNT_LSB                                               0xec24
1380 #define mmRLC_GPU_CLOCK_COUNT_MSB                                               0xec25
1381 #define mmRLC_CAPTURE_GPU_CLOCK_COUNT                                           0xec26
1382 #define mmRLC_UCODE_CNTL                                                        0xec27
1383 #define mmRLC_GPM_STAT                                                          0xec40
1384 #define mmRLC_GPU_CLOCK_32_RES_SEL                                              0xec41
1385 #define mmRLC_GPU_CLOCK_32                                                      0xec42
1386 #define mmRLC_PG_CNTL                                                           0xec43
1387 #define mmRLC_GPM_THREAD_PRIORITY                                               0xec44
1388 #define mmRLC_GPM_THREAD_ENABLE                                                 0xec45
1389 #define mmRLC_GPM_VMID_THREAD0                                                  0xec46
1390 #define mmRLC_GPM_VMID_THREAD1                                                  0xec47
1391 #define mmRLC_CGTT_MGCG_OVERRIDE                                                0xec48
1392 #define mmRLC_CGCG_CGLS_CTRL                                                    0xec49
1393 #define mmRLC_CGCG_RAMP_CTRL                                                    0xec4a
1394 #define mmRLC_CGCG_CGLS_CTRL_3D                                                 0xec9d
1395 #define mmRLC_CGCG_RAMP_CTRL_3D                                                 0xec9e
1396 #define mmRLC_DYN_PG_STATUS                                                     0xec4b
1397 #define mmRLC_DYN_PG_REQUEST                                                    0xec4c
1398 #define mmRLC_PG_DELAY                                                          0xec4d
1399 #define mmRLC_CU_STATUS                                                         0xec4e
1400 #define mmRLC_LB_INIT_CU_MASK                                                   0xec4f
1401 #define mmRLC_LB_ALWAYS_ACTIVE_CU_MASK                                          0xec50
1402 #define mmRLC_LB_PARAMS                                                         0xec51
1403 #define mmRLC_THREAD1_DELAY                                                     0xec52
1404 #define mmRLC_PG_ALWAYS_ON_CU_MASK                                              0xec53
1405 #define mmRLC_MAX_PG_CU                                                         0xec54
1406 #define mmRLC_AUTO_PG_CTRL                                                      0xec55
1407 #define mmRLC_SMU_GRBM_REG_SAVE_CTRL                                            0xec56
1408 #define mmRLC_SMU_PG_CTRL                                                       0xec57
1409 #define mmRLC_SMU_PG_WAKE_UP_CTRL                                               0xec58
1410 #define mmRLC_SERDES_RD_MASTER_INDEX                                            0xec59
1411 #define mmRLC_SERDES_RD_DATA_0                                                  0xec5a
1412 #define mmRLC_SERDES_RD_DATA_1                                                  0xec5b
1413 #define mmRLC_SERDES_RD_DATA_2                                                  0xec5c
1414 #define mmRLC_SERDES_WR_CU_MASTER_MASK                                          0xec5d
1415 #define mmRLC_SERDES_WR_NONCU_MASTER_MASK                                       0xec5e
1416 #define mmRLC_SERDES_WR_CTRL                                                    0xec5f
1417 #define mmRLC_SERDES_WR_DATA                                                    0xec60
1418 #define mmRLC_SERDES_CU_MASTER_BUSY                                             0xec61
1419 #define mmRLC_SERDES_NONCU_MASTER_BUSY                                          0xec62
1420 #define mmRLC_GPM_GENERAL_0                                                     0xec63
1421 #define mmRLC_GPM_GENERAL_1                                                     0xec64
1422 #define mmRLC_GPM_GENERAL_2                                                     0xec65
1423 #define mmRLC_GPM_GENERAL_3                                                     0xec66
1424 #define mmRLC_GPM_GENERAL_4                                                     0xec67
1425 #define mmRLC_GPM_GENERAL_5                                                     0xec68
1426 #define mmRLC_GPM_GENERAL_6                                                     0xec69
1427 #define mmRLC_GPM_GENERAL_7                                                     0xec6a
1428 #define mmRLC_GPM_CU_PD_TIMEOUT                                                 0xec6b
1429 #define mmRLC_GPM_SCRATCH_ADDR                                                  0xec6c
1430 #define mmRLC_GPM_SCRATCH_DATA                                                  0xec6d
1431 #define mmRLC_STATIC_PG_STATUS                                                  0xec6e
1432 #define mmRLC_GPM_PERF_COUNT_0                                                  0xec6f
1433 #define mmRLC_GPM_PERF_COUNT_1                                                  0xec70
1434 #define mmRLC_GPR_REG1                                                          0xec79
1435 #define mmRLC_GPR_REG2                                                          0xec7a
1436 #define mmRLC_MGCG_CTRL                                                         0xec1a
1437 #define mmRLC_GPM_THREAD_RESET                                                  0xec28
1438 #define mmRLC_SPM_VMID                                                          0xec71
1439 #define mmRLC_SPM_INT_CNTL                                                      0xec72
1440 #define mmRLC_SPM_INT_STATUS                                                    0xec73
1441 #define mmRLC_SPM_DEBUG_SELECT                                                  0xec74
1442 #define mmRLC_SPM_DEBUG                                                         0xec75
1443 #define mmRLC_GPM_LOG_ADDR                                                      0xec76
1444 #define mmRLC_SMU_MESSAGE                                                       0xec76
1445 #define mmRLC_GPM_LOG_SIZE                                                      0xec77
1446 #define mmRLC_GPM_LOG_CONT                                                      0xec7b
1447 #define mmRLC_PG_DELAY_3                                                        0xec78
1448 #define mmRLC_GPM_INT_DISABLE_TH0                                               0xec7c
1449 #define mmRLC_GPM_INT_DISABLE_TH1                                               0xec7d
1450 #define mmRLC_GPM_INT_FORCE_TH0                                                 0xec7e
1451 #define mmRLC_GPM_INT_FORCE_TH1                                                 0xec7f
1452 #define mmRLC_SRM_CNTL                                                          0xec80
1453 #define mmRLC_SRM_DEBUG_SELECT                                                  0xec81
1454 #define mmRLC_SRM_DEBUG                                                         0xec82
1455 #define mmRLC_SRM_ARAM_ADDR                                                     0xec83
1456 #define mmRLC_SRM_ARAM_DATA                                                     0xec84
1457 #define mmRLC_SRM_DRAM_ADDR                                                     0xec85
1458 #define mmRLC_SRM_DRAM_DATA                                                     0xec86
1459 #define mmRLC_SRM_GPM_COMMAND                                                   0xec87
1460 #define mmRLC_SRM_GPM_COMMAND_STATUS                                            0xec88
1461 #define mmRLC_SRM_RLCV_COMMAND                                                  0xec89
1462 #define mmRLC_SRM_RLCV_COMMAND_STATUS                                           0xec8a
1463 #define mmRLC_SRM_INDEX_CNTL_ADDR_0                                             0xec8b
1464 #define mmRLC_SRM_INDEX_CNTL_ADDR_1                                             0xec8c
1465 #define mmRLC_SRM_INDEX_CNTL_ADDR_2                                             0xec8d
1466 #define mmRLC_SRM_INDEX_CNTL_ADDR_3                                             0xec8e
1467 #define mmRLC_SRM_INDEX_CNTL_ADDR_4                                             0xec8f
1468 #define mmRLC_SRM_INDEX_CNTL_ADDR_5                                             0xec90
1469 #define mmRLC_SRM_INDEX_CNTL_ADDR_6                                             0xec91
1470 #define mmRLC_SRM_INDEX_CNTL_ADDR_7                                             0xec92
1471 #define mmRLC_SRM_INDEX_CNTL_DATA_0                                             0xec93
1472 #define mmRLC_SRM_INDEX_CNTL_DATA_1                                             0xec94
1473 #define mmRLC_SRM_INDEX_CNTL_DATA_2                                             0xec95
1474 #define mmRLC_SRM_INDEX_CNTL_DATA_3                                             0xec96
1475 #define mmRLC_SRM_INDEX_CNTL_DATA_4                                             0xec97
1476 #define mmRLC_SRM_INDEX_CNTL_DATA_5                                             0xec98
1477 #define mmRLC_SRM_INDEX_CNTL_DATA_6                                             0xec99
1478 #define mmRLC_SRM_INDEX_CNTL_DATA_7                                             0xec9a
1479 #define mmRLC_SRM_STAT                                                          0xec9b
1480 #define mmRLC_SRM_GPM_ABORT                                                     0xec9c
1481 #define mmRLC_CSIB_ADDR_LO                                                      0xeca2
1482 #define mmRLC_CSIB_ADDR_HI                                                      0xeca3
1483 #define mmRLC_CSIB_LENGTH                                                       0xeca4
1484 #define mmRLC_CP_RESPONSE0                                                      0xeca5
1485 #define mmRLC_CP_RESPONSE1                                                      0xeca6
1486 #define mmRLC_CP_RESPONSE2                                                      0xeca7
1487 #define mmRLC_CP_RESPONSE3                                                      0xeca8
1488 #define mmRLC_SMU_COMMAND                                                       0xeca9
1489 #define mmRLC_CP_SCHEDULERS                                                     0xecaa
1490 #define mmRLC_SPM_PERFMON_CNTL                                                  0xdc80
1491 #define mmRLC_SPM_PERFMON_RING_BASE_LO                                          0xdc81
1492 #define mmRLC_SPM_PERFMON_RING_BASE_HI                                          0xdc82
1493 #define mmRLC_SPM_PERFMON_RING_SIZE                                             0xdc83
1494 #define mmRLC_SPM_PERFMON_SEGMENT_SIZE                                          0xdc84
1495 #define mmRLC_SPM_SE_MUXSEL_ADDR                                                0xdc85
1496 #define mmRLC_SPM_SE_MUXSEL_DATA                                                0xdc86
1497 #define mmRLC_SPM_CPG_PERFMON_SAMPLE_DELAY                                      0xdc87
1498 #define mmRLC_SPM_CPC_PERFMON_SAMPLE_DELAY                                      0xdc88
1499 #define mmRLC_SPM_CPF_PERFMON_SAMPLE_DELAY                                      0xdc89
1500 #define mmRLC_SPM_CB_PERFMON_SAMPLE_DELAY                                       0xdc8a
1501 #define mmRLC_SPM_DB_PERFMON_SAMPLE_DELAY                                       0xdc8b
1502 #define mmRLC_SPM_PA_PERFMON_SAMPLE_DELAY                                       0xdc8c
1503 #define mmRLC_SPM_GDS_PERFMON_SAMPLE_DELAY                                      0xdc8d
1504 #define mmRLC_SPM_IA_PERFMON_SAMPLE_DELAY                                       0xdc8e
1505 #define mmRLC_SPM_SC_PERFMON_SAMPLE_DELAY                                       0xdc90
1506 #define mmRLC_SPM_TCC_PERFMON_SAMPLE_DELAY                                      0xdc91
1507 #define mmRLC_SPM_TCA_PERFMON_SAMPLE_DELAY                                      0xdc92
1508 #define mmRLC_SPM_TCP_PERFMON_SAMPLE_DELAY                                      0xdc93
1509 #define mmRLC_SPM_TA_PERFMON_SAMPLE_DELAY                                       0xdc94
1510 #define mmRLC_SPM_TD_PERFMON_SAMPLE_DELAY                                       0xdc95
1511 #define mmRLC_SPM_VGT_PERFMON_SAMPLE_DELAY                                      0xdc96
1512 #define mmRLC_SPM_SPI_PERFMON_SAMPLE_DELAY                                      0xdc97
1513 #define mmRLC_SPM_SQG_PERFMON_SAMPLE_DELAY                                      0xdc98
1514 #define mmRLC_SPM_SX_PERFMON_SAMPLE_DELAY                                       0xdc9a
1515 #define mmRLC_SPM_GLOBAL_MUXSEL_ADDR                                            0xdc9b
1516 #define mmRLC_SPM_GLOBAL_MUXSEL_DATA                                            0xdc9c
1517 #define mmRLC_SPM_RING_RDPTR                                                    0xdc9d
1518 #define mmRLC_SPM_SEGMENT_THRESHOLD                                             0xdc9e
1519 #define mmRLC_SPM_DBR0_PERFMON_SAMPLE_DELAY                                     0xdc9f
1520 #define mmRLC_SPM_DBR1_PERFMON_SAMPLE_DELAY                                     0xdca0
1521 #define mmRLC_SPM_CBR0_PERFMON_SAMPLE_DELAY                                     0xdca1
1522 #define mmRLC_SPM_CBR1_PERFMON_SAMPLE_DELAY                                     0xdca2
1523 #define mmRLC_GPU_IOV_VF_ENABLE                                                 0xfb00
1524 #define mmRLC_GPU_IOV_CFG_REG1                                                  0xfb01
1525 #define mmRLC_GPU_IOV_CFG_REG2                                                  0xfb02
1526 #define mmRLC_GPU_IOV_CFG_REG6                                                  0xfb06
1527 #define mmRLC_GPU_IOV_CFG_REG8                                                  0xfb08
1528 #define mmRLC_GPU_IOV_CFG_REG9                                                  0xfb21
1529 #define mmRLC_GPU_IOV_CFG_REG10                                                 0xfb22
1530 #define mmRLC_GPU_IOV_CFG_REG11                                                 0xfb23
1531 #define mmRLC_GPU_IOV_CFG_REG12                                                 0xfb24
1532 #define mmRLC_GPU_IOV_CFG_REG13                                                 0xfb25
1533 #define mmRLC_GPU_IOV_CFG_REG14                                                 0xfb26
1534 #define mmRLC_GPU_IOV_CFG_REG15                                                 0xfb27
1535 #define mmRLC_GPU_IOV_ACTIVE_FCN_ID                                             0xfb40
1536 #define mmRLC_GPM_VMID_THREAD2                                                  0xfb41
1537 #define mmRLC_GPU_IOV_UCODE_ADDR                                                0xfb42
1538 #define mmRLC_GPU_IOV_UCODE_DATA                                                0xfb43
1539 #define mmRLC_GPU_IOV_SCRATCH_ADDR                                              0xfb44
1540 #define mmRLC_GPU_IOV_SCRATCH_DATA                                              0xfb45
1541 #define mmRLC_GPU_IOV_F32_CNTL                                                  0xfb46
1542 #define mmRLC_GPU_IOV_F32_RESET                                                 0xfb47
1543 #define mmRLC_GPU_IOV_SDMA0_STATUS                                              0xfb48
1544 #define mmRLC_GPU_IOV_SDMA1_STATUS                                              0xfb49
1545 #define mmRLC_GPU_IOV_SMU_RESPONSE                                              0xfb4a
1546 #define mmRLC_GPU_IOV_VIRT_RESET_REQ                                            0xfb4c
1547 #define mmRLC_GPU_IOV_RLC_RESPONSE                                              0xfb4d
1548 #define mmRLC_GPU_IOV_INT_DISABLE                                               0xfb4e
1549 #define mmRLC_GPU_IOV_INT_FORCE                                                 0xfb4f
1550 #define mmRLC_GPU_IOV_SDMA0_BUSY_STATUS                                         0xfb50
1551 #define mmRLC_GPU_IOV_SDMA1_BUSY_STATUS                                         0xfb51
1552 #define mmRLC_GPU_IOV_SCH_0                                                     0xfb52
1553 #define mmRLC_GPU_IOV_SCH_1                                                     0xfb53
1554 #define mmRLC_GPU_IOV_SCH_2                                                     0xfb54
1555 #define mmRLC_GPU_IOV_SCH_3                                                     0xfb55
1556 #define mmRLC_GPU_IOV_SCH_INT                                                   0xfb56
1557 #define mmSPI_PS_INPUT_CNTL_0                                                   0xa191
1558 #define mmSPI_PS_INPUT_CNTL_1                                                   0xa192
1559 #define mmSPI_PS_INPUT_CNTL_2                                                   0xa193
1560 #define mmSPI_PS_INPUT_CNTL_3                                                   0xa194
1561 #define mmSPI_PS_INPUT_CNTL_4                                                   0xa195
1562 #define mmSPI_PS_INPUT_CNTL_5                                                   0xa196
1563 #define mmSPI_PS_INPUT_CNTL_6                                                   0xa197
1564 #define mmSPI_PS_INPUT_CNTL_7                                                   0xa198
1565 #define mmSPI_PS_INPUT_CNTL_8                                                   0xa199
1566 #define mmSPI_PS_INPUT_CNTL_9                                                   0xa19a
1567 #define mmSPI_PS_INPUT_CNTL_10                                                  0xa19b
1568 #define mmSPI_PS_INPUT_CNTL_11                                                  0xa19c
1569 #define mmSPI_PS_INPUT_CNTL_12                                                  0xa19d
1570 #define mmSPI_PS_INPUT_CNTL_13                                                  0xa19e
1571 #define mmSPI_PS_INPUT_CNTL_14                                                  0xa19f
1572 #define mmSPI_PS_INPUT_CNTL_15                                                  0xa1a0
1573 #define mmSPI_PS_INPUT_CNTL_16                                                  0xa1a1
1574 #define mmSPI_PS_INPUT_CNTL_17                                                  0xa1a2
1575 #define mmSPI_PS_INPUT_CNTL_18                                                  0xa1a3
1576 #define mmSPI_PS_INPUT_CNTL_19                                                  0xa1a4
1577 #define mmSPI_PS_INPUT_CNTL_20                                                  0xa1a5
1578 #define mmSPI_PS_INPUT_CNTL_21                                                  0xa1a6
1579 #define mmSPI_PS_INPUT_CNTL_22                                                  0xa1a7
1580 #define mmSPI_PS_INPUT_CNTL_23                                                  0xa1a8
1581 #define mmSPI_PS_INPUT_CNTL_24                                                  0xa1a9
1582 #define mmSPI_PS_INPUT_CNTL_25                                                  0xa1aa
1583 #define mmSPI_PS_INPUT_CNTL_26                                                  0xa1ab
1584 #define mmSPI_PS_INPUT_CNTL_27                                                  0xa1ac
1585 #define mmSPI_PS_INPUT_CNTL_28                                                  0xa1ad
1586 #define mmSPI_PS_INPUT_CNTL_29                                                  0xa1ae
1587 #define mmSPI_PS_INPUT_CNTL_30                                                  0xa1af
1588 #define mmSPI_PS_INPUT_CNTL_31                                                  0xa1b0
1589 #define mmSPI_VS_OUT_CONFIG                                                     0xa1b1
1590 #define mmSPI_PS_INPUT_ENA                                                      0xa1b3
1591 #define mmSPI_PS_INPUT_ADDR                                                     0xa1b4
1592 #define mmSPI_INTERP_CONTROL_0                                                  0xa1b5
1593 #define mmSPI_PS_IN_CONTROL                                                     0xa1b6
1594 #define mmSPI_BARYC_CNTL                                                        0xa1b8
1595 #define mmSPI_TMPRING_SIZE                                                      0xa1ba
1596 #define mmSPI_SHADER_POS_FORMAT                                                 0xa1c3
1597 #define mmSPI_SHADER_Z_FORMAT                                                   0xa1c4
1598 #define mmSPI_SHADER_COL_FORMAT                                                 0xa1c5
1599 #define mmSPI_ARB_PRIORITY                                                      0x31c0
1600 #define mmSPI_ARB_CYCLES_0                                                      0x31c1
1601 #define mmSPI_ARB_CYCLES_1                                                      0x31c2
1602 #define mmSPI_CDBG_SYS_GFX                                                      0x31c3
1603 #define mmSPI_CDBG_SYS_HP3D                                                     0x31c4
1604 #define mmSPI_CDBG_SYS_CS0                                                      0x31c5
1605 #define mmSPI_CDBG_SYS_CS1                                                      0x31c6
1606 #define mmSPI_WCL_PIPE_PERCENT_GFX                                              0x31c7
1607 #define mmSPI_WCL_PIPE_PERCENT_HP3D                                             0x31c8
1608 #define mmSPI_WCL_PIPE_PERCENT_CS0                                              0x31c9
1609 #define mmSPI_WCL_PIPE_PERCENT_CS1                                              0x31ca
1610 #define mmSPI_WCL_PIPE_PERCENT_CS2                                              0x31cb
1611 #define mmSPI_WCL_PIPE_PERCENT_CS3                                              0x31cc
1612 #define mmSPI_WCL_PIPE_PERCENT_CS4                                              0x31cd
1613 #define mmSPI_WCL_PIPE_PERCENT_CS5                                              0x31ce
1614 #define mmSPI_WCL_PIPE_PERCENT_CS6                                              0x31cf
1615 #define mmSPI_WCL_PIPE_PERCENT_CS7                                              0x31d0
1616 #define mmSPI_GDBG_WAVE_CNTL                                                    0x31d1
1617 #define mmSPI_GDBG_TRAP_CONFIG                                                  0x31d2
1618 #define mmSPI_GDBG_TRAP_MASK                                                    0x31d3
1619 #define mmSPI_GDBG_TBA_LO                                                       0x31d4
1620 #define mmSPI_GDBG_TBA_HI                                                       0x31d5
1621 #define mmSPI_GDBG_TMA_LO                                                       0x31d6
1622 #define mmSPI_GDBG_TMA_HI                                                       0x31d7
1623 #define mmSPI_GDBG_TRAP_DATA0                                                   0x31d8
1624 #define mmSPI_GDBG_TRAP_DATA1                                                   0x31d9
1625 #define mmSPI_RESET_DEBUG                                                       0x31da
1626 #define mmSPI_COMPUTE_QUEUE_RESET                                               0x31db
1627 #define mmSPI_RESOURCE_RESERVE_CU_0                                             0x31dc
1628 #define mmSPI_RESOURCE_RESERVE_CU_1                                             0x31dd
1629 #define mmSPI_RESOURCE_RESERVE_CU_2                                             0x31de
1630 #define mmSPI_RESOURCE_RESERVE_CU_3                                             0x31df
1631 #define mmSPI_RESOURCE_RESERVE_CU_4                                             0x31e0
1632 #define mmSPI_RESOURCE_RESERVE_CU_5                                             0x31e1
1633 #define mmSPI_RESOURCE_RESERVE_CU_6                                             0x31e2
1634 #define mmSPI_RESOURCE_RESERVE_CU_7                                             0x31e3
1635 #define mmSPI_RESOURCE_RESERVE_CU_8                                             0x31e4
1636 #define mmSPI_RESOURCE_RESERVE_CU_9                                             0x31e5
1637 #define mmSPI_RESOURCE_RESERVE_CU_10                                            0x31f0
1638 #define mmSPI_RESOURCE_RESERVE_CU_11                                            0x31f1
1639 #define mmSPI_RESOURCE_RESERVE_CU_12                                            0x31f4
1640 #define mmSPI_RESOURCE_RESERVE_CU_13                                            0x31f5
1641 #define mmSPI_RESOURCE_RESERVE_CU_14                                            0x31f6
1642 #define mmSPI_RESOURCE_RESERVE_CU_15                                            0x31f7
1643 #define mmSPI_RESOURCE_RESERVE_EN_CU_0                                          0x31e6
1644 #define mmSPI_RESOURCE_RESERVE_EN_CU_1                                          0x31e7
1645 #define mmSPI_RESOURCE_RESERVE_EN_CU_2                                          0x31e8
1646 #define mmSPI_RESOURCE_RESERVE_EN_CU_3                                          0x31e9
1647 #define mmSPI_RESOURCE_RESERVE_EN_CU_4                                          0x31ea
1648 #define mmSPI_RESOURCE_RESERVE_EN_CU_5                                          0x31eb
1649 #define mmSPI_RESOURCE_RESERVE_EN_CU_6                                          0x31ec
1650 #define mmSPI_RESOURCE_RESERVE_EN_CU_7                                          0x31ed
1651 #define mmSPI_RESOURCE_RESERVE_EN_CU_8                                          0x31ee
1652 #define mmSPI_RESOURCE_RESERVE_EN_CU_9                                          0x31ef
1653 #define mmSPI_RESOURCE_RESERVE_EN_CU_10                                         0x31f2
1654 #define mmSPI_RESOURCE_RESERVE_EN_CU_11                                         0x31f3
1655 #define mmSPI_RESOURCE_RESERVE_EN_CU_12                                         0x31f8
1656 #define mmSPI_RESOURCE_RESERVE_EN_CU_13                                         0x31f9
1657 #define mmSPI_RESOURCE_RESERVE_EN_CU_14                                         0x31fa
1658 #define mmSPI_RESOURCE_RESERVE_EN_CU_15                                         0x31fb
1659 #define mmSPI_COMPUTE_WF_CTX_SAVE                                               0x31fc
1660 #define mmSPI_PS_MAX_WAVE_ID                                                    0x243a
1661 #define mmSPI_START_PHASE                                                       0x243b
1662 #define mmSPI_GFX_CNTL                                                          0x243c
1663 #define mmSPI_CONFIG_CNTL                                                       0x2440
1664 #define mmSPI_DEBUG_CNTL                                                        0x2441
1665 #define mmSPI_DEBUG_READ                                                        0x2442
1666 #define mmSPI_DSM_CNTL                                                          0x2443
1667 #define mmSPI_EDC_CNT                                                           0x2444
1668 #define mmSPI_PERFCOUNTER0_SELECT                                               0xd980
1669 #define mmSPI_PERFCOUNTER1_SELECT                                               0xd981
1670 #define mmSPI_PERFCOUNTER2_SELECT                                               0xd982
1671 #define mmSPI_PERFCOUNTER3_SELECT                                               0xd983
1672 #define mmSPI_PERFCOUNTER0_SELECT1                                              0xd984
1673 #define mmSPI_PERFCOUNTER1_SELECT1                                              0xd985
1674 #define mmSPI_PERFCOUNTER2_SELECT1                                              0xd986
1675 #define mmSPI_PERFCOUNTER3_SELECT1                                              0xd987
1676 #define mmSPI_PERFCOUNTER4_SELECT                                               0xd988
1677 #define mmSPI_PERFCOUNTER5_SELECT                                               0xd989
1678 #define mmSPI_PERFCOUNTER_BINS                                                  0xd98a
1679 #define mmSPI_PERFCOUNTER0_HI                                                   0xd180
1680 #define mmSPI_PERFCOUNTER0_LO                                                   0xd181
1681 #define mmSPI_PERFCOUNTER1_HI                                                   0xd182
1682 #define mmSPI_PERFCOUNTER1_LO                                                   0xd183
1683 #define mmSPI_PERFCOUNTER2_HI                                                   0xd184
1684 #define mmSPI_PERFCOUNTER2_LO                                                   0xd185
1685 #define mmSPI_PERFCOUNTER3_HI                                                   0xd186
1686 #define mmSPI_PERFCOUNTER3_LO                                                   0xd187
1687 #define mmSPI_PERFCOUNTER4_HI                                                   0xd188
1688 #define mmSPI_PERFCOUNTER4_LO                                                   0xd189
1689 #define mmSPI_PERFCOUNTER5_HI                                                   0xd18a
1690 #define mmSPI_PERFCOUNTER5_LO                                                   0xd18b
1691 #define mmSPI_CONFIG_CNTL_1                                                     0x244f
1692 #define mmSPI_DEBUG_BUSY                                                        0x2450
1693 #define mmSPI_CONFIG_CNTL_2                                                     0x2451
1694 #define mmCGTS_SM_CTRL_REG                                                      0xf000
1695 #define mmCGTS_RD_CTRL_REG                                                      0xf001
1696 #define mmCGTS_RD_REG                                                           0xf002
1697 #define mmCGTS_TCC_DISABLE                                                      0xf003
1698 #define mmCGTS_USER_TCC_DISABLE                                                 0xf004
1699 #define mmCGTS_CU0_SP0_CTRL_REG                                                 0xf008
1700 #define mmCGTS_CU0_LDS_SQ_CTRL_REG                                              0xf009
1701 #define mmCGTS_CU0_TA_SQC_CTRL_REG                                              0xf00a
1702 #define mmCGTS_CU0_SP1_CTRL_REG                                                 0xf00b
1703 #define mmCGTS_CU0_TD_TCP_CTRL_REG                                              0xf00c
1704 #define mmCGTS_CU1_SP0_CTRL_REG                                                 0xf00d
1705 #define mmCGTS_CU1_LDS_SQ_CTRL_REG                                              0xf00e
1706 #define mmCGTS_CU1_TA_CTRL_REG                                                  0xf00f
1707 #define mmCGTS_CU1_SP1_CTRL_REG                                                 0xf010
1708 #define mmCGTS_CU1_TD_TCP_CTRL_REG                                              0xf011
1709 #define mmCGTS_CU2_SP0_CTRL_REG                                                 0xf012
1710 #define mmCGTS_CU2_LDS_SQ_CTRL_REG                                              0xf013
1711 #define mmCGTS_CU2_TA_CTRL_REG                                                  0xf014
1712 #define mmCGTS_CU2_SP1_CTRL_REG                                                 0xf015
1713 #define mmCGTS_CU2_TD_TCP_CTRL_REG                                              0xf016
1714 #define mmCGTS_CU3_SP0_CTRL_REG                                                 0xf017
1715 #define mmCGTS_CU3_LDS_SQ_CTRL_REG                                              0xf018
1716 #define mmCGTS_CU3_TA_CTRL_REG                                                  0xf019
1717 #define mmCGTS_CU3_SP1_CTRL_REG                                                 0xf01a
1718 #define mmCGTS_CU3_TD_TCP_CTRL_REG                                              0xf01b
1719 #define mmCGTS_CU4_SP0_CTRL_REG                                                 0xf01c
1720 #define mmCGTS_CU4_LDS_SQ_CTRL_REG                                              0xf01d
1721 #define mmCGTS_CU4_TA_SQC_CTRL_REG                                              0xf01e
1722 #define mmCGTS_CU4_SP1_CTRL_REG                                                 0xf01f
1723 #define mmCGTS_CU4_TD_TCP_CTRL_REG                                              0xf020
1724 #define mmCGTS_CU5_SP0_CTRL_REG                                                 0xf021
1725 #define mmCGTS_CU5_LDS_SQ_CTRL_REG                                              0xf022
1726 #define mmCGTS_CU5_TA_CTRL_REG                                                  0xf023
1727 #define mmCGTS_CU5_SP1_CTRL_REG                                                 0xf024
1728 #define mmCGTS_CU5_TD_TCP_CTRL_REG                                              0xf025
1729 #define mmCGTS_CU6_SP0_CTRL_REG                                                 0xf026
1730 #define mmCGTS_CU6_LDS_SQ_CTRL_REG                                              0xf027
1731 #define mmCGTS_CU6_TA_CTRL_REG                                                  0xf028
1732 #define mmCGTS_CU6_SP1_CTRL_REG                                                 0xf029
1733 #define mmCGTS_CU6_TD_TCP_CTRL_REG                                              0xf02a
1734 #define mmCGTS_CU7_SP0_CTRL_REG                                                 0xf02b
1735 #define mmCGTS_CU7_LDS_SQ_CTRL_REG                                              0xf02c
1736 #define mmCGTS_CU7_TA_CTRL_REG                                                  0xf02d
1737 #define mmCGTS_CU7_SP1_CTRL_REG                                                 0xf02e
1738 #define mmCGTS_CU7_TD_TCP_CTRL_REG                                              0xf02f
1739 #define mmCGTS_CU8_SP0_CTRL_REG                                                 0xf030
1740 #define mmCGTS_CU8_LDS_SQ_CTRL_REG                                              0xf031
1741 #define mmCGTS_CU8_TA_SQC_CTRL_REG                                              0xf032
1742 #define mmCGTS_CU8_SP1_CTRL_REG                                                 0xf033
1743 #define mmCGTS_CU8_TD_TCP_CTRL_REG                                              0xf034
1744 #define mmCGTS_CU9_SP0_CTRL_REG                                                 0xf035
1745 #define mmCGTS_CU9_LDS_SQ_CTRL_REG                                              0xf036
1746 #define mmCGTS_CU9_TA_CTRL_REG                                                  0xf037
1747 #define mmCGTS_CU9_SP1_CTRL_REG                                                 0xf038
1748 #define mmCGTS_CU9_TD_TCP_CTRL_REG                                              0xf039
1749 #define mmCGTS_CU10_SP0_CTRL_REG                                                0xf03a
1750 #define mmCGTS_CU10_LDS_SQ_CTRL_REG                                             0xf03b
1751 #define mmCGTS_CU10_TA_CTRL_REG                                                 0xf03c
1752 #define mmCGTS_CU10_SP1_CTRL_REG                                                0xf03d
1753 #define mmCGTS_CU10_TD_TCP_CTRL_REG                                             0xf03e
1754 #define mmCGTS_CU11_SP0_CTRL_REG                                                0xf03f
1755 #define mmCGTS_CU11_LDS_SQ_CTRL_REG                                             0xf040
1756 #define mmCGTS_CU11_TA_CTRL_REG                                                 0xf041
1757 #define mmCGTS_CU11_SP1_CTRL_REG                                                0xf042
1758 #define mmCGTS_CU11_TD_TCP_CTRL_REG                                             0xf043
1759 #define mmCGTS_CU12_SP0_CTRL_REG                                                0xf044
1760 #define mmCGTS_CU12_LDS_SQ_CTRL_REG                                             0xf045
1761 #define mmCGTS_CU12_TA_SQC_CTRL_REG                                             0xf046
1762 #define mmCGTS_CU12_SP1_CTRL_REG                                                0xf047
1763 #define mmCGTS_CU12_TD_TCP_CTRL_REG                                             0xf048
1764 #define mmCGTS_CU13_SP0_CTRL_REG                                                0xf049
1765 #define mmCGTS_CU13_LDS_SQ_CTRL_REG                                             0xf04a
1766 #define mmCGTS_CU13_TA_CTRL_REG                                                 0xf04b
1767 #define mmCGTS_CU13_SP1_CTRL_REG                                                0xf04c
1768 #define mmCGTS_CU13_TD_TCP_CTRL_REG                                             0xf04d
1769 #define mmCGTS_CU14_SP0_CTRL_REG                                                0xf04e
1770 #define mmCGTS_CU14_LDS_SQ_CTRL_REG                                             0xf04f
1771 #define mmCGTS_CU14_TA_CTRL_REG                                                 0xf050
1772 #define mmCGTS_CU14_SP1_CTRL_REG                                                0xf051
1773 #define mmCGTS_CU14_TD_TCP_CTRL_REG                                             0xf052
1774 #define mmCGTS_CU15_SP0_CTRL_REG                                                0xf053
1775 #define mmCGTS_CU15_LDS_SQ_CTRL_REG                                             0xf054
1776 #define mmCGTS_CU15_TA_CTRL_REG                                                 0xf055
1777 #define mmCGTS_CU15_SP1_CTRL_REG                                                0xf056
1778 #define mmCGTS_CU15_TD_TCP_CTRL_REG                                             0xf057
1779 #define mmCGTT_SPI_CLK_CTRL                                                     0xf080
1780 #define mmCGTT_PC_CLK_CTRL                                                      0xf081
1781 #define mmCGTT_BCI_CLK_CTRL                                                     0xf082
1782 #define mmSPI_WF_LIFETIME_CNTL                                                  0x24aa
1783 #define mmSPI_WF_LIFETIME_LIMIT_0                                               0x24ab
1784 #define mmSPI_WF_LIFETIME_LIMIT_1                                               0x24ac
1785 #define mmSPI_WF_LIFETIME_LIMIT_2                                               0x24ad
1786 #define mmSPI_WF_LIFETIME_LIMIT_3                                               0x24ae
1787 #define mmSPI_WF_LIFETIME_LIMIT_4                                               0x24af
1788 #define mmSPI_WF_LIFETIME_LIMIT_5                                               0x24b0
1789 #define mmSPI_WF_LIFETIME_LIMIT_6                                               0x24b1
1790 #define mmSPI_WF_LIFETIME_LIMIT_7                                               0x24b2
1791 #define mmSPI_WF_LIFETIME_LIMIT_8                                               0x24b3
1792 #define mmSPI_WF_LIFETIME_LIMIT_9                                               0x24b4
1793 #define mmSPI_WF_LIFETIME_STATUS_0                                              0x24b5
1794 #define mmSPI_WF_LIFETIME_STATUS_1                                              0x24b6
1795 #define mmSPI_WF_LIFETIME_STATUS_2                                              0x24b7
1796 #define mmSPI_WF_LIFETIME_STATUS_3                                              0x24b8
1797 #define mmSPI_WF_LIFETIME_STATUS_4                                              0x24b9
1798 #define mmSPI_WF_LIFETIME_STATUS_5                                              0x24ba
1799 #define mmSPI_WF_LIFETIME_STATUS_6                                              0x24bb
1800 #define mmSPI_WF_LIFETIME_STATUS_7                                              0x24bc
1801 #define mmSPI_WF_LIFETIME_STATUS_8                                              0x24bd
1802 #define mmSPI_WF_LIFETIME_STATUS_9                                              0x24be
1803 #define mmSPI_WF_LIFETIME_STATUS_10                                             0x24bf
1804 #define mmSPI_WF_LIFETIME_STATUS_11                                             0x24c0
1805 #define mmSPI_WF_LIFETIME_STATUS_12                                             0x24c1
1806 #define mmSPI_WF_LIFETIME_STATUS_13                                             0x24c2
1807 #define mmSPI_WF_LIFETIME_STATUS_14                                             0x24c3
1808 #define mmSPI_WF_LIFETIME_STATUS_15                                             0x24c4
1809 #define mmSPI_WF_LIFETIME_STATUS_16                                             0x24c5
1810 #define mmSPI_WF_LIFETIME_STATUS_17                                             0x24c6
1811 #define mmSPI_WF_LIFETIME_STATUS_18                                             0x24c7
1812 #define mmSPI_WF_LIFETIME_STATUS_19                                             0x24c8
1813 #define mmSPI_WF_LIFETIME_STATUS_20                                             0x24c9
1814 #define mmSPI_WF_LIFETIME_DEBUG                                                 0x24ca
1815 #define mmSPI_SLAVE_DEBUG_BUSY                                                  0x24d3
1816 #define mmSPI_LB_CTR_CTRL                                                       0x24d4
1817 #define mmSPI_LB_CU_MASK                                                        0x24d5
1818 #define mmSPI_LB_DATA_REG                                                       0x24d6
1819 #define mmSPI_PG_ENABLE_STATIC_CU_MASK                                          0x24d7
1820 #define mmSPI_GDS_CREDITS                                                       0x24d8
1821 #define mmSPI_SX_EXPORT_BUFFER_SIZES                                            0x24d9
1822 #define mmSPI_SX_SCOREBOARD_BUFFER_SIZES                                        0x24da
1823 #define mmSPI_CSQ_WF_ACTIVE_STATUS                                              0x24db
1824 #define mmSPI_CSQ_WF_ACTIVE_COUNT_0                                             0x24dc
1825 #define mmSPI_CSQ_WF_ACTIVE_COUNT_1                                             0x24dd
1826 #define mmSPI_CSQ_WF_ACTIVE_COUNT_2                                             0x24de
1827 #define mmSPI_CSQ_WF_ACTIVE_COUNT_3                                             0x24df
1828 #define mmSPI_CSQ_WF_ACTIVE_COUNT_4                                             0x24e0
1829 #define mmSPI_CSQ_WF_ACTIVE_COUNT_5                                             0x24e1
1830 #define mmSPI_CSQ_WF_ACTIVE_COUNT_6                                             0x24e2
1831 #define mmSPI_CSQ_WF_ACTIVE_COUNT_7                                             0x24e3
1832 #define mmBCI_DEBUG_READ                                                        0x24eb
1833 #define mmSPI_P0_TRAP_SCREEN_PSBA_LO                                            0x24ec
1834 #define mmSPI_P0_TRAP_SCREEN_PSBA_HI                                            0x24ed
1835 #define mmSPI_P0_TRAP_SCREEN_PSMA_LO                                            0x24ee
1836 #define mmSPI_P0_TRAP_SCREEN_PSMA_HI                                            0x24ef
1837 #define mmSPI_P0_TRAP_SCREEN_GPR_MIN                                            0x24f0
1838 #define mmSPI_P1_TRAP_SCREEN_PSBA_LO                                            0x24f1
1839 #define mmSPI_P1_TRAP_SCREEN_PSBA_HI                                            0x24f2
1840 #define mmSPI_P1_TRAP_SCREEN_PSMA_LO                                            0x24f3
1841 #define mmSPI_P1_TRAP_SCREEN_PSMA_HI                                            0x24f4
1842 #define mmSPI_P1_TRAP_SCREEN_GPR_MIN                                            0x24f5
1843 #define mmSPI_SHADER_TBA_LO_PS                                                  0x2c00
1844 #define mmSPI_SHADER_TBA_HI_PS                                                  0x2c01
1845 #define mmSPI_SHADER_TMA_LO_PS                                                  0x2c02
1846 #define mmSPI_SHADER_TMA_HI_PS                                                  0x2c03
1847 #define mmSPI_SHADER_PGM_LO_PS                                                  0x2c08
1848 #define mmSPI_SHADER_PGM_HI_PS                                                  0x2c09
1849 #define mmSPI_SHADER_PGM_RSRC1_PS                                               0x2c0a
1850 #define mmSPI_SHADER_PGM_RSRC2_PS                                               0x2c0b
1851 #define mmSPI_SHADER_PGM_RSRC3_PS                                               0x2c07
1852 #define mmSPI_SHADER_USER_DATA_PS_0                                             0x2c0c
1853 #define mmSPI_SHADER_USER_DATA_PS_1                                             0x2c0d
1854 #define mmSPI_SHADER_USER_DATA_PS_2                                             0x2c0e
1855 #define mmSPI_SHADER_USER_DATA_PS_3                                             0x2c0f
1856 #define mmSPI_SHADER_USER_DATA_PS_4                                             0x2c10
1857 #define mmSPI_SHADER_USER_DATA_PS_5                                             0x2c11
1858 #define mmSPI_SHADER_USER_DATA_PS_6                                             0x2c12
1859 #define mmSPI_SHADER_USER_DATA_PS_7                                             0x2c13
1860 #define mmSPI_SHADER_USER_DATA_PS_8                                             0x2c14
1861 #define mmSPI_SHADER_USER_DATA_PS_9                                             0x2c15
1862 #define mmSPI_SHADER_USER_DATA_PS_10                                            0x2c16
1863 #define mmSPI_SHADER_USER_DATA_PS_11                                            0x2c17
1864 #define mmSPI_SHADER_USER_DATA_PS_12                                            0x2c18
1865 #define mmSPI_SHADER_USER_DATA_PS_13                                            0x2c19
1866 #define mmSPI_SHADER_USER_DATA_PS_14                                            0x2c1a
1867 #define mmSPI_SHADER_USER_DATA_PS_15                                            0x2c1b
1868 #define mmSPI_SHADER_TBA_LO_VS                                                  0x2c40
1869 #define mmSPI_SHADER_TBA_HI_VS                                                  0x2c41
1870 #define mmSPI_SHADER_TMA_LO_VS                                                  0x2c42
1871 #define mmSPI_SHADER_TMA_HI_VS                                                  0x2c43
1872 #define mmSPI_SHADER_PGM_LO_VS                                                  0x2c48
1873 #define mmSPI_SHADER_PGM_HI_VS                                                  0x2c49
1874 #define mmSPI_SHADER_PGM_RSRC1_VS                                               0x2c4a
1875 #define mmSPI_SHADER_PGM_RSRC2_VS                                               0x2c4b
1876 #define mmSPI_SHADER_PGM_RSRC3_VS                                               0x2c46
1877 #define mmSPI_SHADER_LATE_ALLOC_VS                                              0x2c47
1878 #define mmSPI_SHADER_USER_DATA_VS_0                                             0x2c4c
1879 #define mmSPI_SHADER_USER_DATA_VS_1                                             0x2c4d
1880 #define mmSPI_SHADER_USER_DATA_VS_2                                             0x2c4e
1881 #define mmSPI_SHADER_USER_DATA_VS_3                                             0x2c4f
1882 #define mmSPI_SHADER_USER_DATA_VS_4                                             0x2c50
1883 #define mmSPI_SHADER_USER_DATA_VS_5                                             0x2c51
1884 #define mmSPI_SHADER_USER_DATA_VS_6                                             0x2c52
1885 #define mmSPI_SHADER_USER_DATA_VS_7                                             0x2c53
1886 #define mmSPI_SHADER_USER_DATA_VS_8                                             0x2c54
1887 #define mmSPI_SHADER_USER_DATA_VS_9                                             0x2c55
1888 #define mmSPI_SHADER_USER_DATA_VS_10                                            0x2c56
1889 #define mmSPI_SHADER_USER_DATA_VS_11                                            0x2c57
1890 #define mmSPI_SHADER_USER_DATA_VS_12                                            0x2c58
1891 #define mmSPI_SHADER_USER_DATA_VS_13                                            0x2c59
1892 #define mmSPI_SHADER_USER_DATA_VS_14                                            0x2c5a
1893 #define mmSPI_SHADER_USER_DATA_VS_15                                            0x2c5b
1894 #define mmSPI_SHADER_PGM_RSRC2_ES_VS                                            0x2c7c
1895 #define mmSPI_SHADER_PGM_RSRC2_LS_VS                                            0x2c7d
1896 #define mmSPI_SHADER_TBA_LO_GS                                                  0x2c80
1897 #define mmSPI_SHADER_TBA_HI_GS                                                  0x2c81
1898 #define mmSPI_SHADER_TMA_LO_GS                                                  0x2c82
1899 #define mmSPI_SHADER_TMA_HI_GS                                                  0x2c83
1900 #define mmSPI_SHADER_PGM_LO_GS                                                  0x2c88
1901 #define mmSPI_SHADER_PGM_HI_GS                                                  0x2c89
1902 #define mmSPI_SHADER_PGM_RSRC1_GS                                               0x2c8a
1903 #define mmSPI_SHADER_PGM_RSRC2_GS                                               0x2c8b
1904 #define mmSPI_SHADER_PGM_RSRC3_GS                                               0x2c87
1905 #define mmSPI_SHADER_USER_DATA_GS_0                                             0x2c8c
1906 #define mmSPI_SHADER_USER_DATA_GS_1                                             0x2c8d
1907 #define mmSPI_SHADER_USER_DATA_GS_2                                             0x2c8e
1908 #define mmSPI_SHADER_USER_DATA_GS_3                                             0x2c8f
1909 #define mmSPI_SHADER_USER_DATA_GS_4                                             0x2c90
1910 #define mmSPI_SHADER_USER_DATA_GS_5                                             0x2c91
1911 #define mmSPI_SHADER_USER_DATA_GS_6                                             0x2c92
1912 #define mmSPI_SHADER_USER_DATA_GS_7                                             0x2c93
1913 #define mmSPI_SHADER_USER_DATA_GS_8                                             0x2c94
1914 #define mmSPI_SHADER_USER_DATA_GS_9                                             0x2c95
1915 #define mmSPI_SHADER_USER_DATA_GS_10                                            0x2c96
1916 #define mmSPI_SHADER_USER_DATA_GS_11                                            0x2c97
1917 #define mmSPI_SHADER_USER_DATA_GS_12                                            0x2c98
1918 #define mmSPI_SHADER_USER_DATA_GS_13                                            0x2c99
1919 #define mmSPI_SHADER_USER_DATA_GS_14                                            0x2c9a
1920 #define mmSPI_SHADER_USER_DATA_GS_15                                            0x2c9b
1921 #define mmSPI_SHADER_PGM_RSRC2_ES_GS                                            0x2cbc
1922 #define mmSPI_SHADER_TBA_LO_ES                                                  0x2cc0
1923 #define mmSPI_SHADER_TBA_HI_ES                                                  0x2cc1
1924 #define mmSPI_SHADER_TMA_LO_ES                                                  0x2cc2
1925 #define mmSPI_SHADER_TMA_HI_ES                                                  0x2cc3
1926 #define mmSPI_SHADER_PGM_LO_ES                                                  0x2cc8
1927 #define mmSPI_SHADER_PGM_HI_ES                                                  0x2cc9
1928 #define mmSPI_SHADER_PGM_RSRC1_ES                                               0x2cca
1929 #define mmSPI_SHADER_PGM_RSRC2_ES                                               0x2ccb
1930 #define mmSPI_SHADER_PGM_RSRC3_ES                                               0x2cc7
1931 #define mmSPI_SHADER_USER_DATA_ES_0                                             0x2ccc
1932 #define mmSPI_SHADER_USER_DATA_ES_1                                             0x2ccd
1933 #define mmSPI_SHADER_USER_DATA_ES_2                                             0x2cce
1934 #define mmSPI_SHADER_USER_DATA_ES_3                                             0x2ccf
1935 #define mmSPI_SHADER_USER_DATA_ES_4                                             0x2cd0
1936 #define mmSPI_SHADER_USER_DATA_ES_5                                             0x2cd1
1937 #define mmSPI_SHADER_USER_DATA_ES_6                                             0x2cd2
1938 #define mmSPI_SHADER_USER_DATA_ES_7                                             0x2cd3
1939 #define mmSPI_SHADER_USER_DATA_ES_8                                             0x2cd4
1940 #define mmSPI_SHADER_USER_DATA_ES_9                                             0x2cd5
1941 #define mmSPI_SHADER_USER_DATA_ES_10                                            0x2cd6
1942 #define mmSPI_SHADER_USER_DATA_ES_11                                            0x2cd7
1943 #define mmSPI_SHADER_USER_DATA_ES_12                                            0x2cd8
1944 #define mmSPI_SHADER_USER_DATA_ES_13                                            0x2cd9
1945 #define mmSPI_SHADER_USER_DATA_ES_14                                            0x2cda
1946 #define mmSPI_SHADER_USER_DATA_ES_15                                            0x2cdb
1947 #define mmSPI_SHADER_PGM_RSRC2_LS_ES                                            0x2cfd
1948 #define mmSPI_SHADER_TBA_LO_HS                                                  0x2d00
1949 #define mmSPI_SHADER_TBA_HI_HS                                                  0x2d01
1950 #define mmSPI_SHADER_TMA_LO_HS                                                  0x2d02
1951 #define mmSPI_SHADER_TMA_HI_HS                                                  0x2d03
1952 #define mmSPI_SHADER_PGM_LO_HS                                                  0x2d08
1953 #define mmSPI_SHADER_PGM_HI_HS                                                  0x2d09
1954 #define mmSPI_SHADER_PGM_RSRC1_HS                                               0x2d0a
1955 #define mmSPI_SHADER_PGM_RSRC2_HS                                               0x2d0b
1956 #define mmSPI_SHADER_PGM_RSRC3_HS                                               0x2d07
1957 #define mmSPI_SHADER_USER_DATA_HS_0                                             0x2d0c
1958 #define mmSPI_SHADER_USER_DATA_HS_1                                             0x2d0d
1959 #define mmSPI_SHADER_USER_DATA_HS_2                                             0x2d0e
1960 #define mmSPI_SHADER_USER_DATA_HS_3                                             0x2d0f
1961 #define mmSPI_SHADER_USER_DATA_HS_4                                             0x2d10
1962 #define mmSPI_SHADER_USER_DATA_HS_5                                             0x2d11
1963 #define mmSPI_SHADER_USER_DATA_HS_6                                             0x2d12
1964 #define mmSPI_SHADER_USER_DATA_HS_7                                             0x2d13
1965 #define mmSPI_SHADER_USER_DATA_HS_8                                             0x2d14
1966 #define mmSPI_SHADER_USER_DATA_HS_9                                             0x2d15
1967 #define mmSPI_SHADER_USER_DATA_HS_10                                            0x2d16
1968 #define mmSPI_SHADER_USER_DATA_HS_11                                            0x2d17
1969 #define mmSPI_SHADER_USER_DATA_HS_12                                            0x2d18
1970 #define mmSPI_SHADER_USER_DATA_HS_13                                            0x2d19
1971 #define mmSPI_SHADER_USER_DATA_HS_14                                            0x2d1a
1972 #define mmSPI_SHADER_USER_DATA_HS_15                                            0x2d1b
1973 #define mmSPI_SHADER_PGM_RSRC2_LS_HS                                            0x2d3d
1974 #define mmSPI_SHADER_TBA_LO_LS                                                  0x2d40
1975 #define mmSPI_SHADER_TBA_HI_LS                                                  0x2d41
1976 #define mmSPI_SHADER_TMA_LO_LS                                                  0x2d42
1977 #define mmSPI_SHADER_TMA_HI_LS                                                  0x2d43
1978 #define mmSPI_SHADER_PGM_LO_LS                                                  0x2d48
1979 #define mmSPI_SHADER_PGM_HI_LS                                                  0x2d49
1980 #define mmSPI_SHADER_PGM_RSRC1_LS                                               0x2d4a
1981 #define mmSPI_SHADER_PGM_RSRC2_LS                                               0x2d4b
1982 #define mmSPI_SHADER_PGM_RSRC3_LS                                               0x2d47
1983 #define mmSPI_SHADER_USER_DATA_LS_0                                             0x2d4c
1984 #define mmSPI_SHADER_USER_DATA_LS_1                                             0x2d4d
1985 #define mmSPI_SHADER_USER_DATA_LS_2                                             0x2d4e
1986 #define mmSPI_SHADER_USER_DATA_LS_3                                             0x2d4f
1987 #define mmSPI_SHADER_USER_DATA_LS_4                                             0x2d50
1988 #define mmSPI_SHADER_USER_DATA_LS_5                                             0x2d51
1989 #define mmSPI_SHADER_USER_DATA_LS_6                                             0x2d52
1990 #define mmSPI_SHADER_USER_DATA_LS_7                                             0x2d53
1991 #define mmSPI_SHADER_USER_DATA_LS_8                                             0x2d54
1992 #define mmSPI_SHADER_USER_DATA_LS_9                                             0x2d55
1993 #define mmSPI_SHADER_USER_DATA_LS_10                                            0x2d56
1994 #define mmSPI_SHADER_USER_DATA_LS_11                                            0x2d57
1995 #define mmSPI_SHADER_USER_DATA_LS_12                                            0x2d58
1996 #define mmSPI_SHADER_USER_DATA_LS_13                                            0x2d59
1997 #define mmSPI_SHADER_USER_DATA_LS_14                                            0x2d5a
1998 #define mmSPI_SHADER_USER_DATA_LS_15                                            0x2d5b
1999 #define mmSQ_CONFIG                                                             0x2300
2000 #define mmSQC_CONFIG                                                            0x2301
2001 #define mmSQC_CACHES                                                            0xc348
2002 #define mmSQC_WRITEBACK                                                         0xc349
2003 #define mmSQC_DSM_CNTL                                                          0x230f
2004 #define mmSQ_RANDOM_WAVE_PRI                                                    0x2303
2005 #define mmSQ_REG_CREDITS                                                        0x2304
2006 #define mmSQ_FIFO_SIZES                                                         0x2305
2007 #define mmSQ_DSM_CNTL                                                           0x2306
2008 #define mmCC_GC_SHADER_RATE_CONFIG                                              0x2312
2009 #define mmGC_USER_SHADER_RATE_CONFIG                                            0x2313
2010 #define mmSQ_INTERRUPT_AUTO_MASK                                                0x2314
2011 #define mmSQ_INTERRUPT_MSG_CTRL                                                 0x2315
2012 #define mmSQ_PERFCOUNTER_CTRL                                                   0xd9e0
2013 #define mmSQ_PERFCOUNTER_MASK                                                   0xd9e1
2014 #define mmSQ_PERFCOUNTER_CTRL2                                                  0xd9e2
2015 #define mmCC_SQC_BANK_DISABLE                                                   0x2307
2016 #define mmUSER_SQC_BANK_DISABLE                                                 0x2308
2017 #define mmSQ_PERFCOUNTER0_LO                                                    0xd1c0
2018 #define mmSQ_PERFCOUNTER1_LO                                                    0xd1c2
2019 #define mmSQ_PERFCOUNTER2_LO                                                    0xd1c4
2020 #define mmSQ_PERFCOUNTER3_LO                                                    0xd1c6
2021 #define mmSQ_PERFCOUNTER4_LO                                                    0xd1c8
2022 #define mmSQ_PERFCOUNTER5_LO                                                    0xd1ca
2023 #define mmSQ_PERFCOUNTER6_LO                                                    0xd1cc
2024 #define mmSQ_PERFCOUNTER7_LO                                                    0xd1ce
2025 #define mmSQ_PERFCOUNTER8_LO                                                    0xd1d0
2026 #define mmSQ_PERFCOUNTER9_LO                                                    0xd1d2
2027 #define mmSQ_PERFCOUNTER10_LO                                                   0xd1d4
2028 #define mmSQ_PERFCOUNTER11_LO                                                   0xd1d6
2029 #define mmSQ_PERFCOUNTER12_LO                                                   0xd1d8
2030 #define mmSQ_PERFCOUNTER13_LO                                                   0xd1da
2031 #define mmSQ_PERFCOUNTER14_LO                                                   0xd1dc
2032 #define mmSQ_PERFCOUNTER15_LO                                                   0xd1de
2033 #define mmSQ_PERFCOUNTER0_HI                                                    0xd1c1
2034 #define mmSQ_PERFCOUNTER1_HI                                                    0xd1c3
2035 #define mmSQ_PERFCOUNTER2_HI                                                    0xd1c5
2036 #define mmSQ_PERFCOUNTER3_HI                                                    0xd1c7
2037 #define mmSQ_PERFCOUNTER4_HI                                                    0xd1c9
2038 #define mmSQ_PERFCOUNTER5_HI                                                    0xd1cb
2039 #define mmSQ_PERFCOUNTER6_HI                                                    0xd1cd
2040 #define mmSQ_PERFCOUNTER7_HI                                                    0xd1cf
2041 #define mmSQ_PERFCOUNTER8_HI                                                    0xd1d1
2042 #define mmSQ_PERFCOUNTER9_HI                                                    0xd1d3
2043 #define mmSQ_PERFCOUNTER10_HI                                                   0xd1d5
2044 #define mmSQ_PERFCOUNTER11_HI                                                   0xd1d7
2045 #define mmSQ_PERFCOUNTER12_HI                                                   0xd1d9
2046 #define mmSQ_PERFCOUNTER13_HI                                                   0xd1db
2047 #define mmSQ_PERFCOUNTER14_HI                                                   0xd1dd
2048 #define mmSQ_PERFCOUNTER15_HI                                                   0xd1df
2049 #define mmSQ_PERFCOUNTER0_SELECT                                                0xd9c0
2050 #define mmSQ_PERFCOUNTER1_SELECT                                                0xd9c1
2051 #define mmSQ_PERFCOUNTER2_SELECT                                                0xd9c2
2052 #define mmSQ_PERFCOUNTER3_SELECT                                                0xd9c3
2053 #define mmSQ_PERFCOUNTER4_SELECT                                                0xd9c4
2054 #define mmSQ_PERFCOUNTER5_SELECT                                                0xd9c5
2055 #define mmSQ_PERFCOUNTER6_SELECT                                                0xd9c6
2056 #define mmSQ_PERFCOUNTER7_SELECT                                                0xd9c7
2057 #define mmSQ_PERFCOUNTER8_SELECT                                                0xd9c8
2058 #define mmSQ_PERFCOUNTER9_SELECT                                                0xd9c9
2059 #define mmSQ_PERFCOUNTER10_SELECT                                               0xd9ca
2060 #define mmSQ_PERFCOUNTER11_SELECT                                               0xd9cb
2061 #define mmSQ_PERFCOUNTER12_SELECT                                               0xd9cc
2062 #define mmSQ_PERFCOUNTER13_SELECT                                               0xd9cd
2063 #define mmSQ_PERFCOUNTER14_SELECT                                               0xd9ce
2064 #define mmSQ_PERFCOUNTER15_SELECT                                               0xd9cf
2065 #define mmCGTT_SQ_CLK_CTRL                                                      0xf08c
2066 #define mmCGTT_SQG_CLK_CTRL                                                     0xf08d
2067 #define mmSQ_ALU_CLK_CTRL                                                       0xf08e
2068 #define mmSQ_TEX_CLK_CTRL                                                       0xf08f
2069 #define mmSQ_LDS_CLK_CTRL                                                       0xf090
2070 #define mmSQ_POWER_THROTTLE                                                     0xf091
2071 #define mmSQ_POWER_THROTTLE2                                                    0xf092
2072 #define mmSQ_TIME_HI                                                            0x237c
2073 #define mmSQ_TIME_LO                                                            0x237d
2074 #define mmSQ_THREAD_TRACE_BASE                                                  0xc330
2075 #define mmSQ_THREAD_TRACE_BASE2                                                 0xc337
2076 #define mmSQ_THREAD_TRACE_SIZE                                                  0xc331
2077 #define mmSQ_THREAD_TRACE_MASK                                                  0xc332
2078 #define mmSQ_THREAD_TRACE_USERDATA_0                                            0xc340
2079 #define mmSQ_THREAD_TRACE_USERDATA_1                                            0xc341
2080 #define mmSQ_THREAD_TRACE_USERDATA_2                                            0xc342
2081 #define mmSQ_THREAD_TRACE_USERDATA_3                                            0xc343
2082 #define mmSQ_THREAD_TRACE_MODE                                                  0xc336
2083 #define mmSQ_THREAD_TRACE_CTRL                                                  0xc335
2084 #define mmSQ_THREAD_TRACE_TOKEN_MASK                                            0xc333
2085 #define mmSQ_THREAD_TRACE_TOKEN_MASK2                                           0xc338
2086 #define mmSQ_THREAD_TRACE_PERF_MASK                                             0xc334
2087 #define mmSQ_THREAD_TRACE_WPTR                                                  0xc339
2088 #define mmSQ_THREAD_TRACE_STATUS                                                0xc33a
2089 #define mmSQ_THREAD_TRACE_CNTR                                                  0x2390
2090 #define mmSQ_THREAD_TRACE_HIWATER                                               0xc33b
2091 #define mmSQ_LB_CTR_CTRL                                                        0x2398
2092 #define mmSQ_LB_DATA_ALU_CYCLES                                                 0x2399
2093 #define mmSQ_LB_DATA_TEX_CYCLES                                                 0x239a
2094 #define mmSQ_LB_DATA_ALU_STALLS                                                 0x239b
2095 #define mmSQ_LB_DATA_TEX_STALLS                                                 0x239c
2096 #define mmSQC_EDC_CNT                                                           0x23a0
2097 #define mmSQ_EDC_SEC_CNT                                                        0x23a1
2098 #define mmSQ_EDC_DED_CNT                                                        0x23a2
2099 #define mmSQ_EDC_INFO                                                           0x23a3
2100 #define mmSQ_BUF_RSRC_WORD0                                                     0x23c0
2101 #define mmSQ_BUF_RSRC_WORD1                                                     0x23c1
2102 #define mmSQ_BUF_RSRC_WORD2                                                     0x23c2
2103 #define mmSQ_BUF_RSRC_WORD3                                                     0x23c3
2104 #define mmSQ_IMG_RSRC_WORD0                                                     0x23c4
2105 #define mmSQ_IMG_RSRC_WORD1                                                     0x23c5
2106 #define mmSQ_IMG_RSRC_WORD2                                                     0x23c6
2107 #define mmSQ_IMG_RSRC_WORD3                                                     0x23c7
2108 #define mmSQ_IMG_RSRC_WORD4                                                     0x23c8
2109 #define mmSQ_IMG_RSRC_WORD5                                                     0x23c9
2110 #define mmSQ_IMG_RSRC_WORD6                                                     0x23ca
2111 #define mmSQ_IMG_RSRC_WORD7                                                     0x23cb
2112 #define mmSQ_IMG_SAMP_WORD0                                                     0x23cc
2113 #define mmSQ_IMG_SAMP_WORD1                                                     0x23cd
2114 #define mmSQ_IMG_SAMP_WORD2                                                     0x23ce
2115 #define mmSQ_IMG_SAMP_WORD3                                                     0x23cf
2116 #define mmSQ_FLAT_SCRATCH_WORD0                                                 0x23d0
2117 #define mmSQ_FLAT_SCRATCH_WORD1                                                 0x23d1
2118 #define mmSQ_M0_GPR_IDX_WORD                                                    0x23d2
2119 #define mmSQ_IND_INDEX                                                          0x2378
2120 #define mmSQ_CMD                                                                0x237b
2121 #define mmSQ_IND_DATA                                                           0x2379
2122 #define mmSQ_REG_TIMESTAMP                                                      0x2374
2123 #define mmSQ_CMD_TIMESTAMP                                                      0x2375
2124 #define mmSQ_HV_VMID_CTRL                                                       0xf840
2125 #define ixSQ_WAVE_INST_DW0                                                      0x1a
2126 #define ixSQ_WAVE_INST_DW1                                                      0x1b
2127 #define ixSQ_WAVE_PC_LO                                                         0x18
2128 #define ixSQ_WAVE_PC_HI                                                         0x19
2129 #define ixSQ_WAVE_IB_DBG0                                                       0x1c
2130 #define ixSQ_WAVE_IB_DBG1                                                       0x1d
2131 #define ixSQ_WAVE_EXEC_LO                                                       0x27e
2132 #define ixSQ_WAVE_EXEC_HI                                                       0x27f
2133 #define ixSQ_WAVE_STATUS                                                        0x12
2134 #define ixSQ_WAVE_MODE                                                          0x11
2135 #define ixSQ_WAVE_TRAPSTS                                                       0x13
2136 #define ixSQ_WAVE_HW_ID                                                         0x14
2137 #define ixSQ_WAVE_GPR_ALLOC                                                     0x15
2138 #define ixSQ_WAVE_LDS_ALLOC                                                     0x16
2139 #define ixSQ_WAVE_IB_STS                                                        0x17
2140 #define ixSQ_WAVE_M0                                                            0x27c
2141 #define ixSQ_WAVE_TBA_LO                                                        0x26c
2142 #define ixSQ_WAVE_TBA_HI                                                        0x26d
2143 #define ixSQ_WAVE_TMA_LO                                                        0x26e
2144 #define ixSQ_WAVE_TMA_HI                                                        0x26f
2145 #define ixSQ_WAVE_TTMP0                                                         0x270
2146 #define ixSQ_WAVE_TTMP1                                                         0x271
2147 #define ixSQ_WAVE_TTMP2                                                         0x272
2148 #define ixSQ_WAVE_TTMP3                                                         0x273
2149 #define ixSQ_WAVE_TTMP4                                                         0x274
2150 #define ixSQ_WAVE_TTMP5                                                         0x275
2151 #define ixSQ_WAVE_TTMP6                                                         0x276
2152 #define ixSQ_WAVE_TTMP7                                                         0x277
2153 #define ixSQ_WAVE_TTMP8                                                         0x278
2154 #define ixSQ_WAVE_TTMP9                                                         0x279
2155 #define ixSQ_WAVE_TTMP10                                                        0x27a
2156 #define ixSQ_WAVE_TTMP11                                                        0x27b
2157 #define mmSQ_DEBUG_STS_GLOBAL                                                   0x2309
2158 #define mmSQ_DEBUG_STS_GLOBAL2                                                  0x2310
2159 #define mmSQ_DEBUG_STS_GLOBAL3                                                  0x2311
2160 #define ixSQ_DEBUG_STS_LOCAL                                                    0x8
2161 #define ixSQ_DEBUG_CTRL_LOCAL                                                   0x9
2162 #define mmSH_MEM_BASES                                                          0x230a
2163 #define mmSH_MEM_APE1_BASE                                                      0x230b
2164 #define mmSH_MEM_APE1_LIMIT                                                     0x230c
2165 #define mmSH_MEM_CONFIG                                                         0x230d
2166 #define mmSQ_THREAD_TRACE_WORD_CMN                                              0x23b0
2167 #define mmSQ_THREAD_TRACE_WORD_INST                                             0x23b0
2168 #define mmSQ_THREAD_TRACE_WORD_INST_PC_1_OF_2                                   0x23b0
2169 #define mmSQ_THREAD_TRACE_WORD_INST_PC_2_OF_2                                   0x23b1
2170 #define mmSQ_THREAD_TRACE_WORD_INST_USERDATA_1_OF_2                             0x23b0
2171 #define mmSQ_THREAD_TRACE_WORD_INST_USERDATA_2_OF_2                             0x23b1
2172 #define mmSQ_THREAD_TRACE_WORD_TIMESTAMP_1_OF_2                                 0x23b0
2173 #define mmSQ_THREAD_TRACE_WORD_TIMESTAMP_2_OF_2                                 0x23b1
2174 #define mmSQ_THREAD_TRACE_WORD_WAVE                                             0x23b0
2175 #define mmSQ_THREAD_TRACE_WORD_MISC                                             0x23b0
2176 #define mmSQ_THREAD_TRACE_WORD_WAVE_START                                       0x23b0
2177 #define mmSQ_THREAD_TRACE_WORD_REG_1_OF_2                                       0x23b0
2178 #define mmSQ_THREAD_TRACE_WORD_REG_2_OF_2                                       0x23b0
2179 #define mmSQ_THREAD_TRACE_WORD_REG_CS_1_OF_2                                    0x23b0
2180 #define mmSQ_THREAD_TRACE_WORD_REG_CS_2_OF_2                                    0x23b0
2181 #define mmSQ_THREAD_TRACE_WORD_EVENT                                            0x23b0
2182 #define mmSQ_THREAD_TRACE_WORD_ISSUE                                            0x23b0
2183 #define mmSQ_THREAD_TRACE_WORD_PERF_1_OF_2                                      0x23b0
2184 #define mmSQ_THREAD_TRACE_WORD_PERF_2_OF_2                                      0x23b1
2185 #define mmSQ_WREXEC_EXEC_LO                                                     0x23b1
2186 #define mmSQ_WREXEC_EXEC_HI                                                     0x23b1
2187 #define mmSQC_GATCL1_CNTL                                                       0x23b2
2188 #define mmSQC_ATC_EDC_GATCL1_CNT                                                0x23b3
2189 #define ixSQ_INTERRUPT_WORD_CMN                                                 0x20c0
2190 #define ixSQ_INTERRUPT_WORD_AUTO                                                0x20c0
2191 #define ixSQ_INTERRUPT_WORD_WAVE                                                0x20c0
2192 #define mmSQ_SOP2                                                               0x237f
2193 #define mmSQ_VOP1                                                               0x237f
2194 #define mmSQ_MTBUF_1                                                            0x237f
2195 #define mmSQ_EXP_1                                                              0x237f
2196 #define mmSQ_MUBUF_1                                                            0x237f
2197 #define mmSQ_SMEM_1                                                             0x237f
2198 #define mmSQ_INST                                                               0x237f
2199 #define mmSQ_EXP_0                                                              0x237f
2200 #define mmSQ_MUBUF_0                                                            0x237f
2201 #define mmSQ_VOP_SDWA                                                           0x237f
2202 #define mmSQ_VOP3_0                                                             0x237f
2203 #define mmSQ_VOP2                                                               0x237f
2204 #define mmSQ_MTBUF_0                                                            0x237f
2205 #define mmSQ_SOPP                                                               0x237f
2206 #define mmSQ_FLAT_0                                                             0x237f
2207 #define mmSQ_VOP3_0_SDST_ENC                                                    0x237f
2208 #define mmSQ_MIMG_1                                                             0x237f
2209 #define mmSQ_SOP1                                                               0x237f
2210 #define mmSQ_SOPC                                                               0x237f
2211 #define mmSQ_FLAT_1                                                             0x237f
2212 #define mmSQ_DS_1                                                               0x237f
2213 #define mmSQ_VOP3_1                                                             0x237f
2214 #define mmSQ_SMEM_0                                                             0x237f
2215 #define mmSQ_MIMG_0                                                             0x237f
2216 #define mmSQ_SOPK                                                               0x237f
2217 #define mmSQ_DS_0                                                               0x237f
2218 #define mmSQ_VOP_DPP                                                            0x237f
2219 #define mmSQ_VOPC                                                               0x237f
2220 #define mmSQ_VINTRP                                                             0x237f
2221 #define mmCGTT_SX_CLK_CTRL0                                                     0xf094
2222 #define mmCGTT_SX_CLK_CTRL1                                                     0xf095
2223 #define mmCGTT_SX_CLK_CTRL2                                                     0xf096
2224 #define mmCGTT_SX_CLK_CTRL3                                                     0xf097
2225 #define mmCGTT_SX_CLK_CTRL4                                                     0xf098
2226 #define mmSX_DEBUG_BUSY                                                         0x2414
2227 #define mmSX_DEBUG_BUSY_2                                                       0x2415
2228 #define mmSX_DEBUG_BUSY_3                                                       0x2416
2229 #define mmSX_DEBUG_BUSY_4                                                       0x2417
2230 #define mmSX_DEBUG_1                                                            0x2418
2231 #define mmSX_PERFCOUNTER0_SELECT                                                0xda40
2232 #define mmSX_PERFCOUNTER1_SELECT                                                0xda41
2233 #define mmSX_PERFCOUNTER2_SELECT                                                0xda42
2234 #define mmSX_PERFCOUNTER3_SELECT                                                0xda43
2235 #define mmSX_PERFCOUNTER0_SELECT1                                               0xda44
2236 #define mmSX_PERFCOUNTER1_SELECT1                                               0xda45
2237 #define mmSX_PERFCOUNTER0_LO                                                    0xd240
2238 #define mmSX_PERFCOUNTER0_HI                                                    0xd241
2239 #define mmSX_PERFCOUNTER1_LO                                                    0xd242
2240 #define mmSX_PERFCOUNTER1_HI                                                    0xd243
2241 #define mmSX_PERFCOUNTER2_LO                                                    0xd244
2242 #define mmSX_PERFCOUNTER2_HI                                                    0xd245
2243 #define mmSX_PERFCOUNTER3_LO                                                    0xd246
2244 #define mmSX_PERFCOUNTER3_HI                                                    0xd247
2245 #define mmTCC_CTRL                                                              0x2b80
2246 #define mmTCC_EDC_CNT                                                           0x2b82
2247 #define mmTCC_REDUNDANCY                                                        0x2b83
2248 #define mmTCC_EXE_DISABLE                                                       0x2b84
2249 #define mmTCC_DSM_CNTL                                                          0x2b85
2250 #define mmTCC_CGTT_SCLK_CTRL                                                    0xf0ac
2251 #define mmTCA_CGTT_SCLK_CTRL                                                    0xf0ad
2252 #define mmTCC_PERFCOUNTER0_SELECT                                               0xdb80
2253 #define mmTCC_PERFCOUNTER1_SELECT                                               0xdb82
2254 #define mmTCC_PERFCOUNTER0_SELECT1                                              0xdb81
2255 #define mmTCC_PERFCOUNTER1_SELECT1                                              0xdb83
2256 #define mmTCC_PERFCOUNTER2_SELECT                                               0xdb84
2257 #define mmTCC_PERFCOUNTER3_SELECT                                               0xdb85
2258 #define mmTCC_PERFCOUNTER0_LO                                                   0xd380
2259 #define mmTCC_PERFCOUNTER1_LO                                                   0xd382
2260 #define mmTCC_PERFCOUNTER2_LO                                                   0xd384
2261 #define mmTCC_PERFCOUNTER3_LO                                                   0xd386
2262 #define mmTCC_PERFCOUNTER0_HI                                                   0xd381
2263 #define mmTCC_PERFCOUNTER1_HI                                                   0xd383
2264 #define mmTCC_PERFCOUNTER2_HI                                                   0xd385
2265 #define mmTCC_PERFCOUNTER3_HI                                                   0xd387
2266 #define mmTCA_CTRL                                                              0x2bc0
2267 #define mmTCA_PERFCOUNTER0_SELECT                                               0xdb90
2268 #define mmTCA_PERFCOUNTER1_SELECT                                               0xdb92
2269 #define mmTCA_PERFCOUNTER0_SELECT1                                              0xdb91
2270 #define mmTCA_PERFCOUNTER1_SELECT1                                              0xdb93
2271 #define mmTCA_PERFCOUNTER2_SELECT                                               0xdb94
2272 #define mmTCA_PERFCOUNTER3_SELECT                                               0xdb95
2273 #define mmTCA_PERFCOUNTER0_LO                                                   0xd390
2274 #define mmTCA_PERFCOUNTER1_LO                                                   0xd392
2275 #define mmTCA_PERFCOUNTER2_LO                                                   0xd394
2276 #define mmTCA_PERFCOUNTER3_LO                                                   0xd396
2277 #define mmTCA_PERFCOUNTER0_HI                                                   0xd391
2278 #define mmTCA_PERFCOUNTER1_HI                                                   0xd393
2279 #define mmTCA_PERFCOUNTER2_HI                                                   0xd395
2280 #define mmTCA_PERFCOUNTER3_HI                                                   0xd397
2281 #define mmTA_BC_BASE_ADDR                                                       0xa020
2282 #define mmTA_BC_BASE_ADDR_HI                                                    0xa021
2283 #define mmTD_CNTL                                                               0x2525
2284 #define mmTD_STATUS                                                             0x2526
2285 #define mmTD_DEBUG_INDEX                                                        0x2528
2286 #define mmTD_DEBUG_DATA                                                         0x2529
2287 #define mmTD_DSM_CNTL                                                           0x252f
2288 #define mmTD_PERFCOUNTER0_SELECT                                                0xdb00
2289 #define mmTD_PERFCOUNTER1_SELECT                                                0xdb02
2290 #define mmTD_PERFCOUNTER0_SELECT1                                               0xdb01
2291 #define mmTD_PERFCOUNTER0_LO                                                    0xd300
2292 #define mmTD_PERFCOUNTER1_LO                                                    0xd302
2293 #define mmTD_PERFCOUNTER0_HI                                                    0xd301
2294 #define mmTD_PERFCOUNTER1_HI                                                    0xd303
2295 #define mmTD_SCRATCH                                                            0x2533
2296 #define mmTA_CNTL                                                               0x2541
2297 #define mmTA_CNTL_AUX                                                           0x2542
2298 #define mmTA_RESERVED_010C                                                      0x2543
2299 #define mmTA_CS_BC_BASE_ADDR                                                    0xc380
2300 #define mmTA_CS_BC_BASE_ADDR_HI                                                 0xc381
2301 #define mmTA_STATUS                                                             0x2548
2302 #define mmTA_DEBUG_INDEX                                                        0x254c
2303 #define mmTA_DEBUG_DATA                                                         0x254d
2304 #define mmTA_PERFCOUNTER0_SELECT                                                0xdac0
2305 #define mmTA_PERFCOUNTER1_SELECT                                                0xdac2
2306 #define mmTA_PERFCOUNTER0_SELECT1                                               0xdac1
2307 #define mmTA_PERFCOUNTER0_LO                                                    0xd2c0
2308 #define mmTA_PERFCOUNTER1_LO                                                    0xd2c2
2309 #define mmTA_PERFCOUNTER0_HI                                                    0xd2c1
2310 #define mmTA_PERFCOUNTER1_HI                                                    0xd2c3
2311 #define mmTA_SCRATCH                                                            0x2564
2312 #define mmSH_HIDDEN_PRIVATE_BASE_VMID                                           0x2580
2313 #define mmSH_STATIC_MEM_CONFIG                                                  0x2581
2314 #define mmTCP_INVALIDATE                                                        0x2b00
2315 #define mmTCP_STATUS                                                            0x2b01
2316 #define mmTCP_CNTL                                                              0x2b02
2317 #define mmTCP_CHAN_STEER_LO                                                     0x2b03
2318 #define mmTCP_CHAN_STEER_HI                                                     0x2b04
2319 #define mmTCP_ADDR_CONFIG                                                       0x2b05
2320 #define mmTCP_CREDIT                                                            0x2b06
2321 #define mmTCP_PERFCOUNTER0_SELECT                                               0xdb40
2322 #define mmTCP_PERFCOUNTER1_SELECT                                               0xdb42
2323 #define mmTCP_PERFCOUNTER0_SELECT1                                              0xdb41
2324 #define mmTCP_PERFCOUNTER1_SELECT1                                              0xdb43
2325 #define mmTCP_PERFCOUNTER2_SELECT                                               0xdb44
2326 #define mmTCP_PERFCOUNTER3_SELECT                                               0xdb45
2327 #define mmTCP_PERFCOUNTER0_LO                                                   0xd340
2328 #define mmTCP_PERFCOUNTER1_LO                                                   0xd342
2329 #define mmTCP_PERFCOUNTER2_LO                                                   0xd344
2330 #define mmTCP_PERFCOUNTER3_LO                                                   0xd346
2331 #define mmTCP_PERFCOUNTER0_HI                                                   0xd341
2332 #define mmTCP_PERFCOUNTER1_HI                                                   0xd343
2333 #define mmTCP_PERFCOUNTER2_HI                                                   0xd345
2334 #define mmTCP_PERFCOUNTER3_HI                                                   0xd347
2335 #define mmTCP_BUFFER_ADDR_HASH_CNTL                                             0x2b16
2336 #define mmTCP_EDC_CNT                                                           0x2b17
2337 #define mmTC_CFG_L1_LOAD_POLICY0                                                0x2b1a
2338 #define mmTC_CFG_L1_LOAD_POLICY1                                                0x2b1b
2339 #define mmTC_CFG_L1_STORE_POLICY                                                0x2b1c
2340 #define mmTC_CFG_L2_LOAD_POLICY0                                                0x2b1d
2341 #define mmTC_CFG_L2_LOAD_POLICY1                                                0x2b1e
2342 #define mmTC_CFG_L2_STORE_POLICY0                                               0x2b1f
2343 #define mmTC_CFG_L2_STORE_POLICY1                                               0x2b20
2344 #define mmTC_CFG_L2_ATOMIC_POLICY                                               0x2b21
2345 #define mmTC_CFG_L1_VOLATILE                                                    0x2b22
2346 #define mmTC_CFG_L2_VOLATILE                                                    0x2b23
2347 #define mmTCP_WATCH0_ADDR_H                                                     0x32a0
2348 #define mmTCP_WATCH1_ADDR_H                                                     0x32a3
2349 #define mmTCP_WATCH2_ADDR_H                                                     0x32a6
2350 #define mmTCP_WATCH3_ADDR_H                                                     0x32a9
2351 #define mmTCP_WATCH0_ADDR_L                                                     0x32a1
2352 #define mmTCP_WATCH1_ADDR_L                                                     0x32a4
2353 #define mmTCP_WATCH2_ADDR_L                                                     0x32a7
2354 #define mmTCP_WATCH3_ADDR_L                                                     0x32aa
2355 #define mmTCP_WATCH0_CNTL                                                       0x32a2
2356 #define mmTCP_WATCH1_CNTL                                                       0x32a5
2357 #define mmTCP_WATCH2_CNTL                                                       0x32a8
2358 #define mmTCP_WATCH3_CNTL                                                       0x32ab
2359 #define mmTCP_GATCL1_CNTL                                                       0x32b0
2360 #define mmTCP_ATC_EDC_GATCL1_CNT                                                0x32b1
2361 #define mmTCP_GATCL1_DSM_CNTL                                                   0x32b2
2362 #define mmTCP_DSM_CNTL                                                          0x32b3
2363 #define mmTCP_CNTL2                                                             0x32b4
2364 #define mmTD_CGTT_CTRL                                                          0xf09c
2365 #define mmTA_CGTT_CTRL                                                          0xf09d
2366 #define mmCGTT_TCP_CLK_CTRL                                                     0xf09e
2367 #define mmCGTT_TCI_CLK_CTRL                                                     0xf09f
2368 #define mmTCI_STATUS                                                            0x2b61
2369 #define mmTCI_CNTL_1                                                            0x2b62
2370 #define mmTCI_CNTL_2                                                            0x2b63
2371 #define mmGDS_CONFIG                                                            0x25c0
2372 #define mmGDS_CNTL_STATUS                                                       0x25c1
2373 #define mmGDS_ENHANCE2                                                          0x25c2
2374 #define mmGDS_PROTECTION_FAULT                                                  0x25c3
2375 #define mmGDS_VM_PROTECTION_FAULT                                               0x25c4
2376 #define mmGDS_EDC_CNT                                                           0x25c5
2377 #define mmGDS_EDC_GRBM_CNT                                                      0x25c6
2378 #define mmGDS_EDC_OA_DED                                                        0x25c7
2379 #define mmGDS_DEBUG_CNTL                                                        0x25c8
2380 #define mmGDS_DEBUG_DATA                                                        0x25c9
2381 #define mmGDS_DSM_CNTL                                                          0x25ca
2382 #define mmCGTT_GDS_CLK_CTRL                                                     0xf0a0
2383 #define mmGDS_RD_ADDR                                                           0xc400
2384 #define mmGDS_RD_DATA                                                           0xc401
2385 #define mmGDS_RD_BURST_ADDR                                                     0xc402
2386 #define mmGDS_RD_BURST_COUNT                                                    0xc403
2387 #define mmGDS_RD_BURST_DATA                                                     0xc404
2388 #define mmGDS_WR_ADDR                                                           0xc405
2389 #define mmGDS_WR_DATA                                                           0xc406
2390 #define mmGDS_WR_BURST_ADDR                                                     0xc407
2391 #define mmGDS_WR_BURST_DATA                                                     0xc408
2392 #define mmGDS_WRITE_COMPLETE                                                    0xc409
2393 #define mmGDS_ATOM_CNTL                                                         0xc40a
2394 #define mmGDS_ATOM_COMPLETE                                                     0xc40b
2395 #define mmGDS_ATOM_BASE                                                         0xc40c
2396 #define mmGDS_ATOM_SIZE                                                         0xc40d
2397 #define mmGDS_ATOM_OFFSET0                                                      0xc40e
2398 #define mmGDS_ATOM_OFFSET1                                                      0xc40f
2399 #define mmGDS_ATOM_DST                                                          0xc410
2400 #define mmGDS_ATOM_OP                                                           0xc411
2401 #define mmGDS_ATOM_SRC0                                                         0xc412
2402 #define mmGDS_ATOM_SRC0_U                                                       0xc413
2403 #define mmGDS_ATOM_SRC1                                                         0xc414
2404 #define mmGDS_ATOM_SRC1_U                                                       0xc415
2405 #define mmGDS_ATOM_READ0                                                        0xc416
2406 #define mmGDS_ATOM_READ0_U                                                      0xc417
2407 #define mmGDS_ATOM_READ1                                                        0xc418
2408 #define mmGDS_ATOM_READ1_U                                                      0xc419
2409 #define mmGDS_GWS_RESOURCE_CNTL                                                 0xc41a
2410 #define mmGDS_GWS_RESOURCE                                                      0xc41b
2411 #define mmGDS_GWS_RESOURCE_CNT                                                  0xc41c
2412 #define mmGDS_OA_CNTL                                                           0xc41d
2413 #define mmGDS_OA_COUNTER                                                        0xc41e
2414 #define mmGDS_OA_ADDRESS                                                        0xc41f
2415 #define mmGDS_OA_INCDEC                                                         0xc420
2416 #define mmGDS_OA_RING_SIZE                                                      0xc421
2417 #define ixGDS_DEBUG_REG0                                                        0x0
2418 #define ixGDS_DEBUG_REG1                                                        0x1
2419 #define ixGDS_DEBUG_REG2                                                        0x2
2420 #define ixGDS_DEBUG_REG3                                                        0x3
2421 #define ixGDS_DEBUG_REG4                                                        0x4
2422 #define ixGDS_DEBUG_REG5                                                        0x5
2423 #define ixGDS_DEBUG_REG6                                                        0x6
2424 #define mmGDS_PERFCOUNTER0_SELECT                                               0xda80
2425 #define mmGDS_PERFCOUNTER1_SELECT                                               0xda81
2426 #define mmGDS_PERFCOUNTER2_SELECT                                               0xda82
2427 #define mmGDS_PERFCOUNTER3_SELECT                                               0xda83
2428 #define mmGDS_PERFCOUNTER0_LO                                                   0xd280
2429 #define mmGDS_PERFCOUNTER1_LO                                                   0xd282
2430 #define mmGDS_PERFCOUNTER2_LO                                                   0xd284
2431 #define mmGDS_PERFCOUNTER3_LO                                                   0xd286
2432 #define mmGDS_PERFCOUNTER0_HI                                                   0xd281
2433 #define mmGDS_PERFCOUNTER1_HI                                                   0xd283
2434 #define mmGDS_PERFCOUNTER2_HI                                                   0xd285
2435 #define mmGDS_PERFCOUNTER3_HI                                                   0xd287
2436 #define mmGDS_PERFCOUNTER0_SELECT1                                              0xda84
2437 #define mmGDS_VMID0_BASE                                                        0x3300
2438 #define mmGDS_VMID1_BASE                                                        0x3302
2439 #define mmGDS_VMID2_BASE                                                        0x3304
2440 #define mmGDS_VMID3_BASE                                                        0x3306
2441 #define mmGDS_VMID4_BASE                                                        0x3308
2442 #define mmGDS_VMID5_BASE                                                        0x330a
2443 #define mmGDS_VMID6_BASE                                                        0x330c
2444 #define mmGDS_VMID7_BASE                                                        0x330e
2445 #define mmGDS_VMID8_BASE                                                        0x3310
2446 #define mmGDS_VMID9_BASE                                                        0x3312
2447 #define mmGDS_VMID10_BASE                                                       0x3314
2448 #define mmGDS_VMID11_BASE                                                       0x3316
2449 #define mmGDS_VMID12_BASE                                                       0x3318
2450 #define mmGDS_VMID13_BASE                                                       0x331a
2451 #define mmGDS_VMID14_BASE                                                       0x331c
2452 #define mmGDS_VMID15_BASE                                                       0x331e
2453 #define mmGDS_VMID0_SIZE                                                        0x3301
2454 #define mmGDS_VMID1_SIZE                                                        0x3303
2455 #define mmGDS_VMID2_SIZE                                                        0x3305
2456 #define mmGDS_VMID3_SIZE                                                        0x3307
2457 #define mmGDS_VMID4_SIZE                                                        0x3309
2458 #define mmGDS_VMID5_SIZE                                                        0x330b
2459 #define mmGDS_VMID6_SIZE                                                        0x330d
2460 #define mmGDS_VMID7_SIZE                                                        0x330f
2461 #define mmGDS_VMID8_SIZE                                                        0x3311
2462 #define mmGDS_VMID9_SIZE                                                        0x3313
2463 #define mmGDS_VMID10_SIZE                                                       0x3315
2464 #define mmGDS_VMID11_SIZE                                                       0x3317
2465 #define mmGDS_VMID12_SIZE                                                       0x3319
2466 #define mmGDS_VMID13_SIZE                                                       0x331b
2467 #define mmGDS_VMID14_SIZE                                                       0x331d
2468 #define mmGDS_VMID15_SIZE                                                       0x331f
2469 #define mmGDS_GWS_VMID0                                                         0x3320
2470 #define mmGDS_GWS_VMID1                                                         0x3321
2471 #define mmGDS_GWS_VMID2                                                         0x3322
2472 #define mmGDS_GWS_VMID3                                                         0x3323
2473 #define mmGDS_GWS_VMID4                                                         0x3324
2474 #define mmGDS_GWS_VMID5                                                         0x3325
2475 #define mmGDS_GWS_VMID6                                                         0x3326
2476 #define mmGDS_GWS_VMID7                                                         0x3327
2477 #define mmGDS_GWS_VMID8                                                         0x3328
2478 #define mmGDS_GWS_VMID9                                                         0x3329
2479 #define mmGDS_GWS_VMID10                                                        0x332a
2480 #define mmGDS_GWS_VMID11                                                        0x332b
2481 #define mmGDS_GWS_VMID12                                                        0x332c
2482 #define mmGDS_GWS_VMID13                                                        0x332d
2483 #define mmGDS_GWS_VMID14                                                        0x332e
2484 #define mmGDS_GWS_VMID15                                                        0x332f
2485 #define mmGDS_OA_VMID0                                                          0x3330
2486 #define mmGDS_OA_VMID1                                                          0x3331
2487 #define mmGDS_OA_VMID2                                                          0x3332
2488 #define mmGDS_OA_VMID3                                                          0x3333
2489 #define mmGDS_OA_VMID4                                                          0x3334
2490 #define mmGDS_OA_VMID5                                                          0x3335
2491 #define mmGDS_OA_VMID6                                                          0x3336
2492 #define mmGDS_OA_VMID7                                                          0x3337
2493 #define mmGDS_OA_VMID8                                                          0x3338
2494 #define mmGDS_OA_VMID9                                                          0x3339
2495 #define mmGDS_OA_VMID10                                                         0x333a
2496 #define mmGDS_OA_VMID11                                                         0x333b
2497 #define mmGDS_OA_VMID12                                                         0x333c
2498 #define mmGDS_OA_VMID13                                                         0x333d
2499 #define mmGDS_OA_VMID14                                                         0x333e
2500 #define mmGDS_OA_VMID15                                                         0x333f
2501 #define mmGDS_GWS_RESET0                                                        0x3344
2502 #define mmGDS_GWS_RESET1                                                        0x3345
2503 #define mmGDS_GWS_RESOURCE_RESET                                                0x3346
2504 #define mmGDS_COMPUTE_MAX_WAVE_ID                                               0x3348
2505 #define mmGDS_OA_RESET_MASK                                                     0x3349
2506 #define mmGDS_OA_RESET                                                          0x334a
2507 #define mmGDS_ENHANCE                                                           0x334b
2508 #define mmGDS_OA_CGPG_RESTORE                                                   0x334c
2509 #define mmGDS_CS_CTXSW_STATUS                                                   0x334d
2510 #define mmGDS_CS_CTXSW_CNT0                                                     0x334e
2511 #define mmGDS_CS_CTXSW_CNT1                                                     0x334f
2512 #define mmGDS_CS_CTXSW_CNT2                                                     0x3350
2513 #define mmGDS_CS_CTXSW_CNT3                                                     0x3351
2514 #define mmGDS_GFX_CTXSW_STATUS                                                  0x3352
2515 #define mmGDS_VS_CTXSW_CNT0                                                     0x3353
2516 #define mmGDS_VS_CTXSW_CNT1                                                     0x3354
2517 #define mmGDS_VS_CTXSW_CNT2                                                     0x3355
2518 #define mmGDS_VS_CTXSW_CNT3                                                     0x3356
2519 #define mmGDS_PS0_CTXSW_CNT0                                                    0x3357
2520 #define mmGDS_PS1_CTXSW_CNT0                                                    0x335b
2521 #define mmGDS_PS2_CTXSW_CNT0                                                    0x335f
2522 #define mmGDS_PS3_CTXSW_CNT0                                                    0x3363
2523 #define mmGDS_PS4_CTXSW_CNT0                                                    0x3367
2524 #define mmGDS_PS5_CTXSW_CNT0                                                    0x336b
2525 #define mmGDS_PS6_CTXSW_CNT0                                                    0x336f
2526 #define mmGDS_PS7_CTXSW_CNT0                                                    0x3373
2527 #define mmGDS_PS0_CTXSW_CNT1                                                    0x3358
2528 #define mmGDS_PS1_CTXSW_CNT1                                                    0x335c
2529 #define mmGDS_PS2_CTXSW_CNT1                                                    0x3360
2530 #define mmGDS_PS3_CTXSW_CNT1                                                    0x3364
2531 #define mmGDS_PS4_CTXSW_CNT1                                                    0x3368
2532 #define mmGDS_PS5_CTXSW_CNT1                                                    0x336c
2533 #define mmGDS_PS6_CTXSW_CNT1                                                    0x3370
2534 #define mmGDS_PS7_CTXSW_CNT1                                                    0x3374
2535 #define mmGDS_PS0_CTXSW_CNT2                                                    0x3359
2536 #define mmGDS_PS1_CTXSW_CNT2                                                    0x335d
2537 #define mmGDS_PS2_CTXSW_CNT2                                                    0x3361
2538 #define mmGDS_PS3_CTXSW_CNT2                                                    0x3365
2539 #define mmGDS_PS4_CTXSW_CNT2                                                    0x3369
2540 #define mmGDS_PS5_CTXSW_CNT2                                                    0x336d
2541 #define mmGDS_PS6_CTXSW_CNT2                                                    0x3371
2542 #define mmGDS_PS7_CTXSW_CNT2                                                    0x3375
2543 #define mmGDS_PS0_CTXSW_CNT3                                                    0x335a
2544 #define mmGDS_PS1_CTXSW_CNT3                                                    0x335e
2545 #define mmGDS_PS2_CTXSW_CNT3                                                    0x3362
2546 #define mmGDS_PS3_CTXSW_CNT3                                                    0x3366
2547 #define mmGDS_PS4_CTXSW_CNT3                                                    0x336a
2548 #define mmGDS_PS5_CTXSW_CNT3                                                    0x336e
2549 #define mmGDS_PS6_CTXSW_CNT3                                                    0x3372
2550 #define mmGDS_PS7_CTXSW_CNT3                                                    0x3376
2551 #define mmCS_COPY_STATE                                                         0xa1f3
2552 #define mmGFX_COPY_STATE                                                        0xa1f4
2553 #define mmVGT_DRAW_INITIATOR                                                    0xa1fc
2554 #define mmVGT_EVENT_INITIATOR                                                   0xa2a4
2555 #define mmVGT_EVENT_ADDRESS_REG                                                 0xa1fe
2556 #define mmVGT_DMA_BASE_HI                                                       0xa1f9
2557 #define mmVGT_DMA_BASE                                                          0xa1fa
2558 #define mmVGT_DMA_INDEX_TYPE                                                    0xa29f
2559 #define mmVGT_DMA_NUM_INSTANCES                                                 0xa2a2
2560 #define mmIA_ENHANCE                                                            0xa29c
2561 #define mmVGT_DMA_SIZE                                                          0xa29d
2562 #define mmVGT_DMA_MAX_SIZE                                                      0xa29e
2563 #define mmVGT_DMA_PRIMITIVE_TYPE                                                0x2271
2564 #define mmVGT_DMA_CONTROL                                                       0x2272
2565 #define mmVGT_IMMED_DATA                                                        0xa1fd
2566 #define mmVGT_INDEX_TYPE                                                        0xc243
2567 #define mmVGT_NUM_INDICES                                                       0xc24c
2568 #define mmVGT_NUM_INSTANCES                                                     0xc24d
2569 #define mmVGT_PRIMITIVE_TYPE                                                    0xc242
2570 #define mmVGT_PRIMITIVEID_EN                                                    0xa2a1
2571 #define mmVGT_PRIMITIVEID_RESET                                                 0xa2a3
2572 #define mmVGT_VTX_CNT_EN                                                        0xa2ae
2573 #define mmVGT_REUSE_OFF                                                         0xa2ad
2574 #define mmVGT_INSTANCE_STEP_RATE_0                                              0xa2a8
2575 #define mmVGT_INSTANCE_STEP_RATE_1                                              0xa2a9
2576 #define mmVGT_MAX_VTX_INDX                                                      0xa100
2577 #define mmVGT_MIN_VTX_INDX                                                      0xa101
2578 #define mmVGT_INDX_OFFSET                                                       0xa102
2579 #define mmVGT_VERTEX_REUSE_BLOCK_CNTL                                           0xa316
2580 #define mmVGT_OUT_DEALLOC_CNTL                                                  0xa317
2581 #define mmVGT_MULTI_PRIM_IB_RESET_INDX                                          0xa103
2582 #define mmVGT_MULTI_PRIM_IB_RESET_EN                                            0xa2a5
2583 #define mmVGT_ENHANCE                                                           0xa294
2584 #define mmVGT_OUTPUT_PATH_CNTL                                                  0xa284
2585 #define mmVGT_HOS_CNTL                                                          0xa285
2586 #define mmVGT_HOS_MAX_TESS_LEVEL                                                0xa286
2587 #define mmVGT_HOS_MIN_TESS_LEVEL                                                0xa287
2588 #define mmVGT_HOS_REUSE_DEPTH                                                   0xa288
2589 #define mmVGT_GROUP_PRIM_TYPE                                                   0xa289
2590 #define mmVGT_GROUP_FIRST_DECR                                                  0xa28a
2591 #define mmVGT_GROUP_DECR                                                        0xa28b
2592 #define mmVGT_GROUP_VECT_0_CNTL                                                 0xa28c
2593 #define mmVGT_GROUP_VECT_1_CNTL                                                 0xa28d
2594 #define mmVGT_GROUP_VECT_0_FMT_CNTL                                             0xa28e
2595 #define mmVGT_GROUP_VECT_1_FMT_CNTL                                             0xa28f
2596 #define mmVGT_VTX_VECT_EJECT_REG                                                0x222c
2597 #define mmVGT_DMA_DATA_FIFO_DEPTH                                               0x222d
2598 #define mmVGT_DMA_REQ_FIFO_DEPTH                                                0x222e
2599 #define mmVGT_DRAW_INIT_FIFO_DEPTH                                              0x222f
2600 #define mmVGT_LAST_COPY_STATE                                                   0x2230
2601 #define mmCC_GC_SHADER_ARRAY_CONFIG                                             0x226f
2602 #define mmGC_USER_SHADER_ARRAY_CONFIG                                           0x2270
2603 #define mmVGT_GS_MODE                                                           0xa290
2604 #define mmVGT_GS_ONCHIP_CNTL                                                    0xa291
2605 #define mmVGT_GS_OUT_PRIM_TYPE                                                  0xa29b
2606 #define mmVGT_CACHE_INVALIDATION                                                0x2231
2607 #define mmVGT_RESET_DEBUG                                                       0x2232
2608 #define mmVGT_STRMOUT_DELAY                                                     0x2233
2609 #define mmVGT_FIFO_DEPTHS                                                       0x2234
2610 #define mmVGT_GS_PER_ES                                                         0xa295
2611 #define mmVGT_ES_PER_GS                                                         0xa296
2612 #define mmVGT_GS_PER_VS                                                         0xa297
2613 #define mmVGT_GS_VERTEX_REUSE                                                   0x2235
2614 #define mmVGT_MC_LAT_CNTL                                                       0x2236
2615 #define mmIA_CNTL_STATUS                                                        0x2237
2616 #define mmVGT_STRMOUT_CONFIG                                                    0xa2e5
2617 #define mmVGT_STRMOUT_BUFFER_SIZE_0                                             0xa2b4
2618 #define mmVGT_STRMOUT_BUFFER_SIZE_1                                             0xa2b8
2619 #define mmVGT_STRMOUT_BUFFER_SIZE_2                                             0xa2bc
2620 #define mmVGT_STRMOUT_BUFFER_SIZE_3                                             0xa2c0
2621 #define mmVGT_STRMOUT_BUFFER_OFFSET_0                                           0xa2b7
2622 #define mmVGT_STRMOUT_BUFFER_OFFSET_1                                           0xa2bb
2623 #define mmVGT_STRMOUT_BUFFER_OFFSET_2                                           0xa2bf
2624 #define mmVGT_STRMOUT_BUFFER_OFFSET_3                                           0xa2c3
2625 #define mmVGT_STRMOUT_VTX_STRIDE_0                                              0xa2b5
2626 #define mmVGT_STRMOUT_VTX_STRIDE_1                                              0xa2b9
2627 #define mmVGT_STRMOUT_VTX_STRIDE_2                                              0xa2bd
2628 #define mmVGT_STRMOUT_VTX_STRIDE_3                                              0xa2c1
2629 #define mmVGT_STRMOUT_BUFFER_CONFIG                                             0xa2e6
2630 #define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_0                                      0xc244
2631 #define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_1                                      0xc245
2632 #define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_2                                      0xc246
2633 #define mmVGT_STRMOUT_BUFFER_FILLED_SIZE_3                                      0xc247
2634 #define mmVGT_STRMOUT_DRAW_OPAQUE_OFFSET                                        0xa2ca
2635 #define mmVGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE                            0xa2cb
2636 #define mmVGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE                                 0xa2cc
2637 #define mmVGT_GS_MAX_VERT_OUT                                                   0xa2ce
2638 #define mmVGT_SHADER_STAGES_EN                                                  0xa2d5
2639 #define mmVGT_DISPATCH_DRAW_INDEX                                               0xa2dd
2640 #define mmVGT_LS_HS_CONFIG                                                      0xa2d6
2641 #define mmVGT_DMA_LS_HS_CONFIG                                                  0x2273
2642 #define mmVGT_TF_PARAM                                                          0xa2db
2643 #define mmVGT_TESS_DISTRIBUTION                                                 0xa2d4
2644 #define mmVGT_TF_RING_SIZE                                                      0xc24e
2645 #define mmVGT_SYS_CONFIG                                                        0x2263
2646 #define mmVGT_HS_OFFCHIP_PARAM                                                  0xc24f
2647 #define mmVGT_TF_MEMORY_BASE                                                    0xc250
2648 #define mmVGT_GS_INSTANCE_CNT                                                   0xa2e4
2649 #define mmIA_MULTI_VGT_PARAM                                                    0xa2aa
2650 #define mmVGT_VS_MAX_WAVE_ID                                                    0x2268
2651 #define mmVGT_ESGS_RING_SIZE                                                    0xc240
2652 #define mmVGT_GSVS_RING_SIZE                                                    0xc241
2653 #define mmVGT_GSVS_RING_OFFSET_1                                                0xa298
2654 #define mmVGT_GSVS_RING_OFFSET_2                                                0xa299
2655 #define mmVGT_GSVS_RING_OFFSET_3                                                0xa29a
2656 #define mmVGT_ESGS_RING_ITEMSIZE                                                0xa2ab
2657 #define mmVGT_GSVS_RING_ITEMSIZE                                                0xa2ac
2658 #define mmVGT_GS_VERT_ITEMSIZE                                                  0xa2d7
2659 #define mmVGT_GS_VERT_ITEMSIZE_1                                                0xa2d8
2660 #define mmVGT_GS_VERT_ITEMSIZE_2                                                0xa2d9
2661 #define mmVGT_GS_VERT_ITEMSIZE_3                                                0xa2da
2662 #define mmWD_CNTL_STATUS                                                        0x223f
2663 #define mmWD_ENHANCE                                                            0xa2a0
2664 #define mmGFX_PIPE_CONTROL                                                      0x226d
2665 #define mmGFX_PIPE_PRIORITY                                                     0xf87f
2666 #define mmCGTT_VGT_CLK_CTRL                                                     0xf084
2667 #define mmCGTT_IA_CLK_CTRL                                                      0xf085
2668 #define mmCGTT_WD_CLK_CTRL                                                      0xf086
2669 #define mmVGT_DEBUG_CNTL                                                        0x2238
2670 #define mmVGT_DEBUG_DATA                                                        0x2239
2671 #define mmIA_DEBUG_CNTL                                                         0x223a
2672 #define mmIA_DEBUG_DATA                                                         0x223b
2673 #define mmVGT_CNTL_STATUS                                                       0x223c
2674 #define mmWD_DEBUG_CNTL                                                         0x223d
2675 #define mmWD_DEBUG_DATA                                                         0x223e
2676 #define mmWD_QOS                                                                0x2242
2677 #define mmCC_GC_PRIM_CONFIG                                                     0x2240
2678 #define mmGC_USER_PRIM_CONFIG                                                   0x2241
2679 #define ixWD_DEBUG_REG0                                                         0x0
2680 #define ixWD_DEBUG_REG1                                                         0x1
2681 #define ixWD_DEBUG_REG2                                                         0x2
2682 #define ixWD_DEBUG_REG3                                                         0x3
2683 #define ixWD_DEBUG_REG4                                                         0x4
2684 #define ixWD_DEBUG_REG5                                                         0x5
2685 #define ixWD_DEBUG_REG6                                                         0x6
2686 #define ixWD_DEBUG_REG7                                                         0x7
2687 #define ixWD_DEBUG_REG8                                                         0x8
2688 #define ixWD_DEBUG_REG9                                                         0x9
2689 #define ixWD_DEBUG_REG10                                                        0xa
2690 #define ixIA_DEBUG_REG0                                                         0x0
2691 #define ixIA_DEBUG_REG1                                                         0x1
2692 #define ixIA_DEBUG_REG2                                                         0x2
2693 #define ixIA_DEBUG_REG3                                                         0x3
2694 #define ixIA_DEBUG_REG4                                                         0x4
2695 #define ixIA_DEBUG_REG5                                                         0x5
2696 #define ixIA_DEBUG_REG6                                                         0x6
2697 #define ixIA_DEBUG_REG7                                                         0x7
2698 #define ixIA_DEBUG_REG8                                                         0x8
2699 #define ixIA_DEBUG_REG9                                                         0x9
2700 #define ixVGT_DEBUG_REG0                                                        0x0
2701 #define ixVGT_DEBUG_REG1                                                        0x1
2702 #define ixVGT_DEBUG_REG2                                                        0x1e
2703 #define ixVGT_DEBUG_REG3                                                        0x1f
2704 #define ixVGT_DEBUG_REG4                                                        0x20
2705 #define ixVGT_DEBUG_REG5                                                        0x21
2706 #define ixVGT_DEBUG_REG6                                                        0x22
2707 #define ixVGT_DEBUG_REG7                                                        0x23
2708 #define ixVGT_DEBUG_REG8                                                        0x8
2709 #define ixVGT_DEBUG_REG9                                                        0x9
2710 #define ixVGT_DEBUG_REG10                                                       0xa
2711 #define ixVGT_DEBUG_REG11                                                       0xb
2712 #define ixVGT_DEBUG_REG12                                                       0xc
2713 #define ixVGT_DEBUG_REG13                                                       0xd
2714 #define ixVGT_DEBUG_REG14                                                       0xe
2715 #define ixVGT_DEBUG_REG15                                                       0xf
2716 #define ixVGT_DEBUG_REG16                                                       0x10
2717 #define ixVGT_DEBUG_REG17                                                       0x11
2718 #define ixVGT_DEBUG_REG18                                                       0x7
2719 #define ixVGT_DEBUG_REG19                                                       0x13
2720 #define ixVGT_DEBUG_REG20                                                       0x14
2721 #define ixVGT_DEBUG_REG21                                                       0x15
2722 #define ixVGT_DEBUG_REG22                                                       0x16
2723 #define ixVGT_DEBUG_REG23                                                       0x17
2724 #define ixVGT_DEBUG_REG24                                                       0x18
2725 #define ixVGT_DEBUG_REG25                                                       0x19
2726 #define ixVGT_DEBUG_REG26                                                       0x24
2727 #define ixVGT_DEBUG_REG27                                                       0x1b
2728 #define ixVGT_DEBUG_REG28                                                       0x1c
2729 #define ixVGT_DEBUG_REG29                                                       0x1d
2730 #define ixVGT_DEBUG_REG31                                                       0x26
2731 #define ixVGT_DEBUG_REG32                                                       0x27
2732 #define ixVGT_DEBUG_REG33                                                       0x28
2733 #define ixVGT_DEBUG_REG34                                                       0x29
2734 #define ixVGT_DEBUG_REG36                                                       0x2b
2735 #define mmVGT_PERFCOUNTER_SEID_MASK                                             0xd894
2736 #define mmVGT_PERFCOUNTER0_SELECT                                               0xd88c
2737 #define mmVGT_PERFCOUNTER1_SELECT                                               0xd88d
2738 #define mmVGT_PERFCOUNTER2_SELECT                                               0xd88e
2739 #define mmVGT_PERFCOUNTER3_SELECT                                               0xd88f
2740 #define mmVGT_PERFCOUNTER0_SELECT1                                              0xd890
2741 #define mmVGT_PERFCOUNTER1_SELECT1                                              0xd891
2742 #define mmVGT_PERFCOUNTER0_LO                                                   0xd090
2743 #define mmVGT_PERFCOUNTER1_LO                                                   0xd092
2744 #define mmVGT_PERFCOUNTER2_LO                                                   0xd094
2745 #define mmVGT_PERFCOUNTER3_LO                                                   0xd096
2746 #define mmVGT_PERFCOUNTER0_HI                                                   0xd091
2747 #define mmVGT_PERFCOUNTER1_HI                                                   0xd093
2748 #define mmVGT_PERFCOUNTER2_HI                                                   0xd095
2749 #define mmVGT_PERFCOUNTER3_HI                                                   0xd097
2750 #define mmIA_PERFCOUNTER0_SELECT                                                0xd884
2751 #define mmIA_PERFCOUNTER1_SELECT                                                0xd885
2752 #define mmIA_PERFCOUNTER2_SELECT                                                0xd886
2753 #define mmIA_PERFCOUNTER3_SELECT                                                0xd887
2754 #define mmIA_PERFCOUNTER0_SELECT1                                               0xd888
2755 #define mmIA_PERFCOUNTER0_LO                                                    0xd088
2756 #define mmIA_PERFCOUNTER1_LO                                                    0xd08a
2757 #define mmIA_PERFCOUNTER2_LO                                                    0xd08c
2758 #define mmIA_PERFCOUNTER3_LO                                                    0xd08e
2759 #define mmIA_PERFCOUNTER0_HI                                                    0xd089
2760 #define mmIA_PERFCOUNTER1_HI                                                    0xd08b
2761 #define mmIA_PERFCOUNTER2_HI                                                    0xd08d
2762 #define mmIA_PERFCOUNTER3_HI                                                    0xd08f
2763 #define mmWD_PERFCOUNTER0_SELECT                                                0xd880
2764 #define mmWD_PERFCOUNTER1_SELECT                                                0xd881
2765 #define mmWD_PERFCOUNTER2_SELECT                                                0xd882
2766 #define mmWD_PERFCOUNTER3_SELECT                                                0xd883
2767 #define mmWD_PERFCOUNTER0_LO                                                    0xd080
2768 #define mmWD_PERFCOUNTER1_LO                                                    0xd082
2769 #define mmWD_PERFCOUNTER2_LO                                                    0xd084
2770 #define mmWD_PERFCOUNTER3_LO                                                    0xd086
2771 #define mmWD_PERFCOUNTER0_HI                                                    0xd081
2772 #define mmWD_PERFCOUNTER1_HI                                                    0xd083
2773 #define mmWD_PERFCOUNTER2_HI                                                    0xd085
2774 #define mmWD_PERFCOUNTER3_HI                                                    0xd087
2775 #define mmDIDT_IND_INDEX                                                        0x3280
2776 #define mmDIDT_IND_DATA                                                         0x3281
2777 #define ixDIDT_SQ_CTRL0                                                         0x0
2778 #define ixDIDT_SQ_CTRL1                                                         0x1
2779 #define ixDIDT_SQ_CTRL2                                                         0x2
2780 #define ixDIDT_SQ_CTRL_OCP                                                      0x3
2781 #define ixDIDT_SQ_WEIGHT0_3                                                     0x10
2782 #define ixDIDT_SQ_WEIGHT4_7                                                     0x11
2783 #define ixDIDT_SQ_WEIGHT8_11                                                    0x12
2784 #define ixDIDT_DB_CTRL0                                                         0x20
2785 #define ixDIDT_DB_CTRL1                                                         0x21
2786 #define ixDIDT_DB_CTRL2                                                         0x22
2787 #define ixDIDT_DB_CTRL_OCP                                                      0x23
2788 #define ixDIDT_DB_WEIGHT0_3                                                     0x30
2789 #define ixDIDT_DB_WEIGHT4_7                                                     0x31
2790 #define ixDIDT_DB_WEIGHT8_11                                                    0x32
2791 #define ixDIDT_TD_CTRL0                                                         0x40
2792 #define ixDIDT_TD_CTRL1                                                         0x41
2793 #define ixDIDT_TD_CTRL2                                                         0x42
2794 #define ixDIDT_TD_CTRL_OCP                                                      0x43
2795 #define ixDIDT_TD_WEIGHT0_3                                                     0x50
2796 #define ixDIDT_TD_WEIGHT4_7                                                     0x51
2797 #define ixDIDT_TD_WEIGHT8_11                                                    0x52
2798 #define ixDIDT_TCP_CTRL0                                                        0x60
2799 #define ixDIDT_TCP_CTRL1                                                        0x61
2800 #define ixDIDT_TCP_CTRL2                                                        0x62
2801 #define ixDIDT_TCP_CTRL_OCP                                                     0x63
2802 #define ixDIDT_TCP_WEIGHT0_3                                                    0x70
2803 #define ixDIDT_TCP_WEIGHT4_7                                                    0x71
2804 #define ixDIDT_TCP_WEIGHT8_11                                                   0x72
2805 #define ixDIDT_DBR_CTRL0                                                        0x80
2806 #define ixDIDT_DBR_CTRL1                                                        0x81
2807 #define ixDIDT_DBR_CTRL2                                                        0x82
2808 #define ixDIDT_DBR_CTRL_OCP                                                     0x83
2809 #define ixDIDT_DBR_WEIGHT0_3                                                    0x90
2810 #define ixDIDT_DBR_WEIGHT4_7                                                    0x91
2811 #define ixDIDT_DBR_WEIGHT8_11                                                   0x92
2812 #define mmTD_EDC_CNT                                                            0x252e
2813 #define mmCPF_EDC_TAG_CNT                                                       0x3188
2814 #define mmCPF_EDC_ROQ_CNT                                                       0x3189
2815 #define mmCPF_EDC_ATC_CNT                                                       0x318a
2816 #define mmCPG_EDC_TAG_CNT                                                       0x318b
2817 #define mmCPG_EDC_ATC_CNT                                                       0x318c
2818 #define mmCPG_EDC_DMA_CNT                                                       0x318d
2819 #define mmCPC_EDC_SCRATCH_CNT                                                   0x318e
2820 #define mmCPC_EDC_UCODE_CNT                                                     0x318f
2821 #define mmCPC_EDC_ATC_CNT                                                       0x3190
2822 #define mmDC_EDC_STATE_CNT                                                      0x3191
2823 #define mmDC_EDC_CSINVOC_CNT                                                    0x3192
2824 #define mmDC_EDC_RESTORE_CNT                                                    0x3193
2825 
2826 #define mmGC_CAC_IND_INDEX                                                      0x129a
2827 #define mmGC_CAC_IND_DATA                                                       0x129b
2828 
2829 #endif /* GFX_8_0_D_H */