root/drivers/gpu/drm/amd/include/asic_reg/umc/umc_6_0_offset.h

   1 /*
   2  * Copyright (C) 2017  Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included
  12  * in all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  15  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
  18  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  19  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  */
  21 
  22 #ifndef _umc_6_0_OFFSET_H_
  23 #define _umc_6_0_OFFSET_H_
  24 
  25 #define mmUMCCH0_0_EccCtrl                              0x0053
  26 #define mmUMCCH0_0_EccCtrl_BASE_IDX                     0
  27 #define mmUMCCH1_0_EccCtrl                              0x0853
  28 #define mmUMCCH1_0_EccCtrl_BASE_IDX                     0
  29 #define mmUMCCH2_0_EccCtrl                              0x1053
  30 #define mmUMCCH2_0_EccCtrl_BASE_IDX                     0
  31 #define mmUMCCH3_0_EccCtrl                              0x1853
  32 #define mmUMCCH3_0_EccCtrl_BASE_IDX                     0
  33 
  34 #define mmUMCCH0_0_UMC_CONFIG                           0x0040
  35 #define mmUMCCH0_0_UMC_CONFIG_BASE_IDX                  0
  36 #define mmUMCCH1_0_UMC_CONFIG                           0x0840
  37 #define mmUMCCH1_0_UMC_CONFIG_BASE_IDX                  0
  38 #define mmUMCCH2_0_UMC_CONFIG                           0x1040
  39 #define mmUMCCH2_0_UMC_CONFIG_BASE_IDX                  0
  40 #define mmUMCCH3_0_UMC_CONFIG                           0x1840
  41 #define mmUMCCH3_0_UMC_CONFIG_BASE_IDX                  0
  42 
  43 #define mmUMCCH0_0_UmcLocalCap                          0x0306
  44 #define mmUMCCH0_0_UmcLocalCap_BASE_IDX                 0
  45 #define mmUMCCH1_0_UmcLocalCap                          0x0b06
  46 #define mmUMCCH1_0_UmcLocalCap_BASE_IDX                 0
  47 #define mmUMCCH2_0_UmcLocalCap                          0x1306
  48 #define mmUMCCH2_0_UmcLocalCap_BASE_IDX                 0
  49 #define mmUMCCH3_0_UmcLocalCap                          0x1b06
  50 #define mmUMCCH3_0_UmcLocalCap_BASE_IDX                 0
  51 
  52 #endif