root/drivers/gpu/drm/amd/include/asic_reg/thm/thm_9_0_offset.h

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   1 /*
   2  * Copyright (C) 2017  Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included
  12  * in all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  15  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
  18  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  19  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  */
  21 #ifndef _thm_9_0_OFFSET_HEADER
  22 #define _thm_9_0_OFFSET_HEADER
  23 
  24 
  25 
  26 // addressBlock: thm_thm_SmuThmDec
  27 // base address: 0x59800
  28 #define mmTHM_TCON_CUR_TMP                                                                             0x0000
  29 #define mmTHM_TCON_CUR_TMP_BASE_IDX                                                                    0
  30 #define mmTHM_TCON_HTC                                                                                 0x0001
  31 #define mmTHM_TCON_HTC_BASE_IDX                                                                        0
  32 #define mmTHM_TCON_THERM_TRIP                                                                          0x0002
  33 #define mmTHM_TCON_THERM_TRIP_BASE_IDX                                                                 0
  34 #define mmTHM_GPIO_PROCHOT_CTRL                                                                        0x0004
  35 #define mmTHM_GPIO_PROCHOT_CTRL_BASE_IDX                                                               0
  36 #define mmTHM_GPIO_THERMTRIP_CTRL                                                                      0x0005
  37 #define mmTHM_GPIO_THERMTRIP_CTRL_BASE_IDX                                                             0
  38 #define mmTHM_GPIO_PWM_CTRL                                                                            0x0006
  39 #define mmTHM_GPIO_PWM_CTRL_BASE_IDX                                                                   0
  40 #define mmTHM_GPIO_TACHIN_CTRL                                                                         0x0007
  41 #define mmTHM_GPIO_TACHIN_CTRL_BASE_IDX                                                                0
  42 #define mmTHM_GPIO_PUMPOUT_CTRL                                                                        0x0008
  43 #define mmTHM_GPIO_PUMPOUT_CTRL_BASE_IDX                                                               0
  44 #define mmTHM_GPIO_PUMPIN_CTRL                                                                         0x0009
  45 #define mmTHM_GPIO_PUMPIN_CTRL_BASE_IDX                                                                0
  46 #define mmTHM_THERMAL_INT_ENA                                                                          0x000a
  47 #define mmTHM_THERMAL_INT_ENA_BASE_IDX                                                                 0
  48 #define mmTHM_THERMAL_INT_CTRL                                                                         0x000b
  49 #define mmTHM_THERMAL_INT_CTRL_BASE_IDX                                                                0
  50 #define mmTHM_THERMAL_INT_STATUS                                                                       0x000c
  51 #define mmTHM_THERMAL_INT_STATUS_BASE_IDX                                                              0
  52 #define mmTHM_TMON0_RDIL0_DATA                                                                         0x000d
  53 #define mmTHM_TMON0_RDIL0_DATA_BASE_IDX                                                                0
  54 #define mmTHM_TMON0_RDIL1_DATA                                                                         0x000e
  55 #define mmTHM_TMON0_RDIL1_DATA_BASE_IDX                                                                0
  56 #define mmTHM_TMON0_RDIL2_DATA                                                                         0x000f
  57 #define mmTHM_TMON0_RDIL2_DATA_BASE_IDX                                                                0
  58 #define mmTHM_TMON0_RDIL3_DATA                                                                         0x0010
  59 #define mmTHM_TMON0_RDIL3_DATA_BASE_IDX                                                                0
  60 #define mmTHM_TMON0_RDIL4_DATA                                                                         0x0011
  61 #define mmTHM_TMON0_RDIL4_DATA_BASE_IDX                                                                0
  62 #define mmTHM_TMON0_RDIL5_DATA                                                                         0x0012
  63 #define mmTHM_TMON0_RDIL5_DATA_BASE_IDX                                                                0
  64 #define mmTHM_TMON0_RDIL6_DATA                                                                         0x0013
  65 #define mmTHM_TMON0_RDIL6_DATA_BASE_IDX                                                                0
  66 #define mmTHM_TMON0_RDIL7_DATA                                                                         0x0014
  67 #define mmTHM_TMON0_RDIL7_DATA_BASE_IDX                                                                0
  68 #define mmTHM_TMON0_RDIL8_DATA                                                                         0x0015
  69 #define mmTHM_TMON0_RDIL8_DATA_BASE_IDX                                                                0
  70 #define mmTHM_TMON0_RDIL9_DATA                                                                         0x0016
  71 #define mmTHM_TMON0_RDIL9_DATA_BASE_IDX                                                                0
  72 #define mmTHM_TMON0_RDIL10_DATA                                                                        0x0017
  73 #define mmTHM_TMON0_RDIL10_DATA_BASE_IDX                                                               0
  74 #define mmTHM_TMON0_RDIL11_DATA                                                                        0x0018
  75 #define mmTHM_TMON0_RDIL11_DATA_BASE_IDX                                                               0
  76 #define mmTHM_TMON0_RDIL12_DATA                                                                        0x0019
  77 #define mmTHM_TMON0_RDIL12_DATA_BASE_IDX                                                               0
  78 #define mmTHM_TMON0_RDIL13_DATA                                                                        0x001a
  79 #define mmTHM_TMON0_RDIL13_DATA_BASE_IDX                                                               0
  80 #define mmTHM_TMON0_RDIL14_DATA                                                                        0x001b
  81 #define mmTHM_TMON0_RDIL14_DATA_BASE_IDX                                                               0
  82 #define mmTHM_TMON0_RDIL15_DATA                                                                        0x001c
  83 #define mmTHM_TMON0_RDIL15_DATA_BASE_IDX                                                               0
  84 #define mmTHM_TMON0_RDIR0_DATA                                                                         0x001d
  85 #define mmTHM_TMON0_RDIR0_DATA_BASE_IDX                                                                0
  86 #define mmTHM_TMON0_RDIR1_DATA                                                                         0x001e
  87 #define mmTHM_TMON0_RDIR1_DATA_BASE_IDX                                                                0
  88 #define mmTHM_TMON0_RDIR2_DATA                                                                         0x001f
  89 #define mmTHM_TMON0_RDIR2_DATA_BASE_IDX                                                                0
  90 #define mmTHM_TMON0_RDIR3_DATA                                                                         0x0020
  91 #define mmTHM_TMON0_RDIR3_DATA_BASE_IDX                                                                0
  92 #define mmTHM_TMON0_RDIR4_DATA                                                                         0x0021
  93 #define mmTHM_TMON0_RDIR4_DATA_BASE_IDX                                                                0
  94 #define mmTHM_TMON0_RDIR5_DATA                                                                         0x0022
  95 #define mmTHM_TMON0_RDIR5_DATA_BASE_IDX                                                                0
  96 #define mmTHM_TMON0_RDIR6_DATA                                                                         0x0023
  97 #define mmTHM_TMON0_RDIR6_DATA_BASE_IDX                                                                0
  98 #define mmTHM_TMON0_RDIR7_DATA                                                                         0x0024
  99 #define mmTHM_TMON0_RDIR7_DATA_BASE_IDX                                                                0
 100 #define mmTHM_TMON0_RDIR8_DATA                                                                         0x0025
 101 #define mmTHM_TMON0_RDIR8_DATA_BASE_IDX                                                                0
 102 #define mmTHM_TMON0_RDIR9_DATA                                                                         0x0026
 103 #define mmTHM_TMON0_RDIR9_DATA_BASE_IDX                                                                0
 104 #define mmTHM_TMON0_RDIR10_DATA                                                                        0x0027
 105 #define mmTHM_TMON0_RDIR10_DATA_BASE_IDX                                                               0
 106 #define mmTHM_TMON0_RDIR11_DATA                                                                        0x0028
 107 #define mmTHM_TMON0_RDIR11_DATA_BASE_IDX                                                               0
 108 #define mmTHM_TMON0_RDIR12_DATA                                                                        0x0029
 109 #define mmTHM_TMON0_RDIR12_DATA_BASE_IDX                                                               0
 110 #define mmTHM_TMON0_RDIR13_DATA                                                                        0x002a
 111 #define mmTHM_TMON0_RDIR13_DATA_BASE_IDX                                                               0
 112 #define mmTHM_TMON0_RDIR14_DATA                                                                        0x002b
 113 #define mmTHM_TMON0_RDIR14_DATA_BASE_IDX                                                               0
 114 #define mmTHM_TMON0_RDIR15_DATA                                                                        0x002c
 115 #define mmTHM_TMON0_RDIR15_DATA_BASE_IDX                                                               0
 116 #define mmTHM_TMON0_INT_DATA                                                                           0x002d
 117 #define mmTHM_TMON0_INT_DATA_BASE_IDX                                                                  0
 118 #define mmTHM_TMON0_DEBUG                                                                              0x0030
 119 #define mmTHM_TMON0_DEBUG_BASE_IDX                                                                     0
 120 #define mmTHM_TMON1_RDIL0_DATA                                                                         0x0031
 121 #define mmTHM_TMON1_RDIL0_DATA_BASE_IDX                                                                0
 122 #define mmTHM_TMON1_RDIL1_DATA                                                                         0x0032
 123 #define mmTHM_TMON1_RDIL1_DATA_BASE_IDX                                                                0
 124 #define mmTHM_TMON1_RDIL2_DATA                                                                         0x0033
 125 #define mmTHM_TMON1_RDIL2_DATA_BASE_IDX                                                                0
 126 #define mmTHM_TMON1_RDIL3_DATA                                                                         0x0034
 127 #define mmTHM_TMON1_RDIL3_DATA_BASE_IDX                                                                0
 128 #define mmTHM_TMON1_RDIL4_DATA                                                                         0x0035
 129 #define mmTHM_TMON1_RDIL4_DATA_BASE_IDX                                                                0
 130 #define mmTHM_TMON1_RDIL5_DATA                                                                         0x0036
 131 #define mmTHM_TMON1_RDIL5_DATA_BASE_IDX                                                                0
 132 #define mmTHM_TMON1_RDIL6_DATA                                                                         0x0037
 133 #define mmTHM_TMON1_RDIL6_DATA_BASE_IDX                                                                0
 134 #define mmTHM_TMON1_RDIL7_DATA                                                                         0x0038
 135 #define mmTHM_TMON1_RDIL7_DATA_BASE_IDX                                                                0
 136 #define mmTHM_TMON1_RDIL8_DATA                                                                         0x0039
 137 #define mmTHM_TMON1_RDIL8_DATA_BASE_IDX                                                                0
 138 #define mmTHM_TMON1_RDIL9_DATA                                                                         0x003a
 139 #define mmTHM_TMON1_RDIL9_DATA_BASE_IDX                                                                0
 140 #define mmTHM_TMON1_RDIL10_DATA                                                                        0x003b
 141 #define mmTHM_TMON1_RDIL10_DATA_BASE_IDX                                                               0
 142 #define mmTHM_TMON1_RDIL11_DATA                                                                        0x003c
 143 #define mmTHM_TMON1_RDIL11_DATA_BASE_IDX                                                               0
 144 #define mmTHM_TMON1_RDIL12_DATA                                                                        0x003d
 145 #define mmTHM_TMON1_RDIL12_DATA_BASE_IDX                                                               0
 146 #define mmTHM_TMON1_RDIL13_DATA                                                                        0x003e
 147 #define mmTHM_TMON1_RDIL13_DATA_BASE_IDX                                                               0
 148 #define mmTHM_TMON1_RDIL14_DATA                                                                        0x003f
 149 #define mmTHM_TMON1_RDIL14_DATA_BASE_IDX                                                               0
 150 #define mmTHM_TMON1_RDIL15_DATA                                                                        0x0040
 151 #define mmTHM_TMON1_RDIL15_DATA_BASE_IDX                                                               0
 152 #define mmTHM_TMON1_RDIR0_DATA                                                                         0x0041
 153 #define mmTHM_TMON1_RDIR0_DATA_BASE_IDX                                                                0
 154 #define mmTHM_TMON1_RDIR1_DATA                                                                         0x0042
 155 #define mmTHM_TMON1_RDIR1_DATA_BASE_IDX                                                                0
 156 #define mmTHM_TMON1_RDIR2_DATA                                                                         0x0043
 157 #define mmTHM_TMON1_RDIR2_DATA_BASE_IDX                                                                0
 158 #define mmTHM_TMON1_RDIR3_DATA                                                                         0x0044
 159 #define mmTHM_TMON1_RDIR3_DATA_BASE_IDX                                                                0
 160 #define mmTHM_TMON1_RDIR4_DATA                                                                         0x0045
 161 #define mmTHM_TMON1_RDIR4_DATA_BASE_IDX                                                                0
 162 #define mmTHM_TMON1_RDIR5_DATA                                                                         0x0046
 163 #define mmTHM_TMON1_RDIR5_DATA_BASE_IDX                                                                0
 164 #define mmTHM_TMON1_RDIR6_DATA                                                                         0x0047
 165 #define mmTHM_TMON1_RDIR6_DATA_BASE_IDX                                                                0
 166 #define mmTHM_TMON1_RDIR7_DATA                                                                         0x0048
 167 #define mmTHM_TMON1_RDIR7_DATA_BASE_IDX                                                                0
 168 #define mmTHM_TMON1_RDIR8_DATA                                                                         0x0049
 169 #define mmTHM_TMON1_RDIR8_DATA_BASE_IDX                                                                0
 170 #define mmTHM_TMON1_RDIR9_DATA                                                                         0x004a
 171 #define mmTHM_TMON1_RDIR9_DATA_BASE_IDX                                                                0
 172 #define mmTHM_TMON1_RDIR10_DATA                                                                        0x004b
 173 #define mmTHM_TMON1_RDIR10_DATA_BASE_IDX                                                               0
 174 #define mmTHM_TMON1_RDIR11_DATA                                                                        0x004c
 175 #define mmTHM_TMON1_RDIR11_DATA_BASE_IDX                                                               0
 176 #define mmTHM_TMON1_RDIR12_DATA                                                                        0x004d
 177 #define mmTHM_TMON1_RDIR12_DATA_BASE_IDX                                                               0
 178 #define mmTHM_TMON1_RDIR13_DATA                                                                        0x004e
 179 #define mmTHM_TMON1_RDIR13_DATA_BASE_IDX                                                               0
 180 #define mmTHM_TMON1_RDIR14_DATA                                                                        0x004f
 181 #define mmTHM_TMON1_RDIR14_DATA_BASE_IDX                                                               0
 182 #define mmTHM_TMON1_RDIR15_DATA                                                                        0x0050
 183 #define mmTHM_TMON1_RDIR15_DATA_BASE_IDX                                                               0
 184 #define mmTHM_TMON1_INT_DATA                                                                           0x0051
 185 #define mmTHM_TMON1_INT_DATA_BASE_IDX                                                                  0
 186 #define mmTHM_TMON1_DEBUG                                                                              0x0054
 187 #define mmTHM_TMON1_DEBUG_BASE_IDX                                                                     0
 188 #define mmTHM_DIE1_TEMP                                                                                0x0055
 189 #define mmTHM_DIE1_TEMP_BASE_IDX                                                                       0
 190 #define mmTHM_DIE2_TEMP                                                                                0x0056
 191 #define mmTHM_DIE2_TEMP_BASE_IDX                                                                       0
 192 #define mmTHM_DIE3_TEMP                                                                                0x0057
 193 #define mmTHM_DIE3_TEMP_BASE_IDX                                                                       0
 194 #define mmCG_MULT_THERMAL_CTRL                                                                         0x0059
 195 #define mmCG_MULT_THERMAL_CTRL_BASE_IDX                                                                0
 196 #define mmCG_MULT_THERMAL_STATUS                                                                       0x005a
 197 #define mmCG_MULT_THERMAL_STATUS_BASE_IDX                                                              0
 198 #define mmTHM_TMON0_COEFF                                                                              0x005e
 199 #define mmTHM_TMON0_COEFF_BASE_IDX                                                                     0
 200 #define mmTHM_TMON1_COEFF                                                                              0x005f
 201 #define mmTHM_TMON1_COEFF_BASE_IDX                                                                     0
 202 #define mmCG_FDO_CTRL0                                                                                 0x0062
 203 #define mmCG_FDO_CTRL0_BASE_IDX                                                                        0
 204 #define mmCG_FDO_CTRL1                                                                                 0x0063
 205 #define mmCG_FDO_CTRL1_BASE_IDX                                                                        0
 206 #define mmCG_FDO_CTRL2                                                                                 0x0064
 207 #define mmCG_FDO_CTRL2_BASE_IDX                                                                        0
 208 #define mmCG_TACH_CTRL                                                                                 0x0065
 209 #define mmCG_TACH_CTRL_BASE_IDX                                                                        0
 210 #define mmCG_TACH_STATUS                                                                               0x0066
 211 #define mmCG_TACH_STATUS_BASE_IDX                                                                      0
 212 #define mmCG_THERMAL_STATUS                                                                            0x0067
 213 #define mmCG_THERMAL_STATUS_BASE_IDX                                                                   0
 214 #define mmCG_PUMP_CTRL0                                                                                0x0068
 215 #define mmCG_PUMP_CTRL0_BASE_IDX                                                                       0
 216 #define mmCG_PUMP_CTRL1                                                                                0x0069
 217 #define mmCG_PUMP_CTRL1_BASE_IDX                                                                       0
 218 #define mmCG_PUMP_CTRL2                                                                                0x006a
 219 #define mmCG_PUMP_CTRL2_BASE_IDX                                                                       0
 220 #define mmCG_PUMP_TACH_CTRL                                                                            0x006b
 221 #define mmCG_PUMP_TACH_CTRL_BASE_IDX                                                                   0
 222 #define mmCG_PUMP_TACH_STATUS                                                                          0x006c
 223 #define mmCG_PUMP_TACH_STATUS_BASE_IDX                                                                 0
 224 #define mmCG_PUMP_STATUS                                                                               0x006d
 225 #define mmCG_PUMP_STATUS_BASE_IDX                                                                      0
 226 #define mmTHM_TCON_LOCAL0                                                                              0x006e
 227 #define mmTHM_TCON_LOCAL0_BASE_IDX                                                                     0
 228 #define mmTHM_TCON_LOCAL1                                                                              0x006f
 229 #define mmTHM_TCON_LOCAL1_BASE_IDX                                                                     0
 230 #define mmTHM_TCON_LOCAL2                                                                              0x0070
 231 #define mmTHM_TCON_LOCAL2_BASE_IDX                                                                     0
 232 #define mmTHM_TCON_LOCAL3                                                                              0x0071
 233 #define mmTHM_TCON_LOCAL3_BASE_IDX                                                                     0
 234 #define mmTHM_TCON_LOCAL4                                                                              0x0072
 235 #define mmTHM_TCON_LOCAL4_BASE_IDX                                                                     0
 236 #define mmTHM_TCON_LOCAL5                                                                              0x0073
 237 #define mmTHM_TCON_LOCAL5_BASE_IDX                                                                     0
 238 #define mmTHM_TCON_LOCAL6                                                                              0x0074
 239 #define mmTHM_TCON_LOCAL6_BASE_IDX                                                                     0
 240 #define mmTHM_TCON_LOCAL7                                                                              0x0075
 241 #define mmTHM_TCON_LOCAL7_BASE_IDX                                                                     0
 242 #define mmTHM_TCON_LOCAL8                                                                              0x0076
 243 #define mmTHM_TCON_LOCAL8_BASE_IDX                                                                     0
 244 #define mmTHM_TCON_LOCAL9                                                                              0x0077
 245 #define mmTHM_TCON_LOCAL9_BASE_IDX                                                                     0
 246 #define mmTHM_TCON_LOCAL10                                                                             0x0078
 247 #define mmTHM_TCON_LOCAL10_BASE_IDX                                                                    0
 248 #define mmTHM_TCON_LOCAL11                                                                             0x0079
 249 #define mmTHM_TCON_LOCAL11_BASE_IDX                                                                    0
 250 #define mmTHM_TCON_LOCAL12                                                                             0x007a
 251 #define mmTHM_TCON_LOCAL12_BASE_IDX                                                                    0
 252 #define mmTHM_TCON_LOCAL13                                                                             0x007b
 253 #define mmTHM_TCON_LOCAL13_BASE_IDX                                                                    0
 254 #define mmTHM_BACO_CNTL                                                                                0x007c
 255 #define mmTHM_BACO_CNTL_BASE_IDX                                                                       0
 256 #define mmTHM_BACO_TIMING0                                                                             0x007d
 257 #define mmTHM_BACO_TIMING0_BASE_IDX                                                                    0
 258 #define mmTHM_BACO_TIMING1                                                                             0x007e
 259 #define mmTHM_BACO_TIMING1_BASE_IDX                                                                    0
 260 #define mmXTAL_CNTL                                                                                    0x007f
 261 #define mmXTAL_CNTL_BASE_IDX                                                                           0
 262 #define mmSBTSI_REMOTE_TEMP                                                                            0x008a
 263 #define mmSBTSI_REMOTE_TEMP_BASE_IDX                                                                   0
 264 #define mmSBRMI_CONTROL                                                                                0x008b
 265 #define mmSBRMI_CONTROL_BASE_IDX                                                                       0
 266 #define mmSBRMI_COMMAND                                                                                0x008c
 267 #define mmSBRMI_COMMAND_BASE_IDX                                                                       0
 268 #define mmSBRMI_WRITE_DATA0                                                                            0x008d
 269 #define mmSBRMI_WRITE_DATA0_BASE_IDX                                                                   0
 270 #define mmSBRMI_WRITE_DATA1                                                                            0x008e
 271 #define mmSBRMI_WRITE_DATA1_BASE_IDX                                                                   0
 272 #define mmSBRMI_WRITE_DATA2                                                                            0x008f
 273 #define mmSBRMI_WRITE_DATA2_BASE_IDX                                                                   0
 274 #define mmSBRMI_READ_DATA0                                                                             0x0090
 275 #define mmSBRMI_READ_DATA0_BASE_IDX                                                                    0
 276 #define mmSBRMI_READ_DATA1                                                                             0x0091
 277 #define mmSBRMI_READ_DATA1_BASE_IDX                                                                    0
 278 #define mmSBRMI_CORE_EN_NUMBER                                                                         0x0092
 279 #define mmSBRMI_CORE_EN_NUMBER_BASE_IDX                                                                0
 280 #define mmSBRMI_CORE_EN_STATUS0                                                                        0x0093
 281 #define mmSBRMI_CORE_EN_STATUS0_BASE_IDX                                                               0
 282 #define mmSBRMI_CORE_EN_STATUS1                                                                        0x0094
 283 #define mmSBRMI_CORE_EN_STATUS1_BASE_IDX                                                               0
 284 #define mmSBRMI_APIC_STATUS0                                                                           0x0095
 285 #define mmSBRMI_APIC_STATUS0_BASE_IDX                                                                  0
 286 #define mmSBRMI_APIC_STATUS1                                                                           0x0096
 287 #define mmSBRMI_APIC_STATUS1_BASE_IDX                                                                  0
 288 #define mmSBRMI_MCE_STATUS0                                                                            0x0097
 289 #define mmSBRMI_MCE_STATUS0_BASE_IDX                                                                   0
 290 #define mmSBRMI_MCE_STATUS1                                                                            0x0098
 291 #define mmSBRMI_MCE_STATUS1_BASE_IDX                                                                   0
 292 #define mmSMBUS_CNTL0                                                                                  0x0099
 293 #define mmSMBUS_CNTL0_BASE_IDX                                                                         0
 294 #define mmSMBUS_CNTL1                                                                                  0x009a
 295 #define mmSMBUS_CNTL1_BASE_IDX                                                                         0
 296 #define mmSMBUS_BLKWR_CMD_CTRL0                                                                        0x009b
 297 #define mmSMBUS_BLKWR_CMD_CTRL0_BASE_IDX                                                               0
 298 #define mmSMBUS_BLKWR_CMD_CTRL1                                                                        0x009c
 299 #define mmSMBUS_BLKWR_CMD_CTRL1_BASE_IDX                                                               0
 300 #define mmSMBUS_BLKRD_CMD_CTRL0                                                                        0x009d
 301 #define mmSMBUS_BLKRD_CMD_CTRL0_BASE_IDX                                                               0
 302 #define mmSMBUS_BLKRD_CMD_CTRL1                                                                        0x009e
 303 #define mmSMBUS_BLKRD_CMD_CTRL1_BASE_IDX                                                               0
 304 #define mmSMBUS_TIMING_CNTL0                                                                           0x009f
 305 #define mmSMBUS_TIMING_CNTL0_BASE_IDX                                                                  0
 306 #define mmSMBUS_TIMING_CNTL1                                                                           0x00a0
 307 #define mmSMBUS_TIMING_CNTL1_BASE_IDX                                                                  0
 308 #define mmSMBUS_TIMING_CNTL2                                                                           0x00a1
 309 #define mmSMBUS_TIMING_CNTL2_BASE_IDX                                                                  0
 310 #define mmSMBUS_TRIGGER_CNTL                                                                           0x00a2
 311 #define mmSMBUS_TRIGGER_CNTL_BASE_IDX                                                                  0
 312 #define mmSMBUS_UDID_CNTL0                                                                             0x00a3
 313 #define mmSMBUS_UDID_CNTL0_BASE_IDX                                                                    0
 314 #define mmSMBUS_UDID_CNTL1                                                                             0x00a4
 315 #define mmSMBUS_UDID_CNTL1_BASE_IDX                                                                    0
 316 #define mmSMBUS_UDID_CNTL2                                                                             0x00a5
 317 #define mmSMBUS_UDID_CNTL2_BASE_IDX                                                                    0
 318 #define mmSMBUS_BACO_DUMMY                                                                             0x00a8
 319 #define mmSMBUS_BACO_DUMMY_BASE_IDX                                                                    0
 320 #define mmSMBUS_BACO_ADDR_RANGE0_LOW                                                                   0x00a9
 321 #define mmSMBUS_BACO_ADDR_RANGE0_LOW_BASE_IDX                                                          0
 322 #define mmSMBUS_BACO_ADDR_RANGE0_HIGH                                                                  0x00aa
 323 #define mmSMBUS_BACO_ADDR_RANGE0_HIGH_BASE_IDX                                                         0
 324 #define mmSMBUS_BACO_ADDR_RANGE1_LOW                                                                   0x00ab
 325 #define mmSMBUS_BACO_ADDR_RANGE1_LOW_BASE_IDX                                                          0
 326 #define mmSMBUS_BACO_ADDR_RANGE1_HIGH                                                                  0x00ac
 327 #define mmSMBUS_BACO_ADDR_RANGE1_HIGH_BASE_IDX                                                         0
 328 #define mmSMBUS_BACO_ADDR_RANGE2_LOW                                                                   0x00ad
 329 #define mmSMBUS_BACO_ADDR_RANGE2_LOW_BASE_IDX                                                          0
 330 #define mmSMBUS_BACO_ADDR_RANGE2_HIGH                                                                  0x00ae
 331 #define mmSMBUS_BACO_ADDR_RANGE2_HIGH_BASE_IDX                                                         0
 332 #define mmSMBUS_BACO_ADDR_RANGE3_LOW                                                                   0x00af
 333 #define mmSMBUS_BACO_ADDR_RANGE3_LOW_BASE_IDX                                                          0
 334 #define mmSMBUS_BACO_ADDR_RANGE3_HIGH                                                                  0x00b0
 335 #define mmSMBUS_BACO_ADDR_RANGE3_HIGH_BASE_IDX                                                         0
 336 #define mmSMBUS_BACO_ADDR_RANGE4_LOW                                                                   0x00b1
 337 #define mmSMBUS_BACO_ADDR_RANGE4_LOW_BASE_IDX                                                          0
 338 #define mmSMBUS_BACO_ADDR_RANGE4_HIGH                                                                  0x00b2
 339 #define mmSMBUS_BACO_ADDR_RANGE4_HIGH_BASE_IDX                                                         0
 340 #define mmTHM_GPIO_MACO_EN_CTRL                                                                        0x00bd
 341 #define mmTHM_GPIO_MACO_EN_CTRL_BASE_IDX                                                               0
 342 #define mmTHM_BACO_TIMING2                                                                             0x00bf
 343 #define mmTHM_BACO_TIMING2_BASE_IDX                                                                    0
 344 #define mmTHM_BACO_TIMING                                                                              0x00c0
 345 #define mmTHM_BACO_TIMING_BASE_IDX                                                                     0
 346 #define mmTHM_TMON0_REMOTE_START                                                                       0x0100
 347 #define mmTHM_TMON0_REMOTE_START_BASE_IDX                                                              0
 348 #define mmTHM_TMON0_REMOTE_END                                                                         0x013f
 349 #define mmTHM_TMON0_REMOTE_END_BASE_IDX                                                                0
 350 #define mmTHM_TMON1_REMOTE_START                                                                       0x0140
 351 #define mmTHM_TMON1_REMOTE_START_BASE_IDX                                                              0
 352 #define mmTHM_TMON1_REMOTE_END                                                                         0x017f
 353 #define mmTHM_TMON1_REMOTE_END_BASE_IDX                                                                0
 354 #define mmTHM_TMON2_REMOTE_START                                                                       0x0180
 355 #define mmTHM_TMON2_REMOTE_START_BASE_IDX                                                              0
 356 #define mmTHM_TMON2_REMOTE_END                                                                         0x01bf
 357 #define mmTHM_TMON2_REMOTE_END_BASE_IDX                                                                0
 358 #define mmTHM_TMON3_REMOTE_START                                                                       0x01c0
 359 #define mmTHM_TMON3_REMOTE_START_BASE_IDX                                                              0
 360 #define mmTHM_TMON3_REMOTE_END                                                                         0x01ff
 361 #define mmTHM_TMON3_REMOTE_END_BASE_IDX                                                                0
 362 
 363 #endif
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