root/drivers/gpu/drm/amd/include/asic_reg/thm/thm_10_0_offset.h

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INCLUDED FROM

   1 /*
   2  * Copyright (C) 2017  Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included
  12  * in all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  15  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
  18  * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  19  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  20  */
  21 #ifndef _thm_10_0_OFFSET_HEADER
  22 #define _thm_10_0_OFFSET_HEADER
  23 
  24 
  25 
  26 // addressBlock: thm_thm_SmuThmDec
  27 // base address: 0x59800
  28 #define mmTHM_TCON_CUR_TMP                                                                             0x0000
  29 #define mmTHM_TCON_CUR_TMP_BASE_IDX                                                                    0
  30 #define mmTHM_TCON_HTC                                                                                 0x0001
  31 #define mmTHM_TCON_HTC_BASE_IDX                                                                        0
  32 #define mmTHM_TCON_THERM_TRIP                                                                          0x0002
  33 #define mmTHM_TCON_THERM_TRIP_BASE_IDX                                                                 0
  34 #define mmTHM_CTF_DELAY                                                                                0x0003
  35 #define mmTHM_CTF_DELAY_BASE_IDX                                                                       0
  36 #define mmTHM_GPIO_PROCHOT_CTRL                                                                        0x0004
  37 #define mmTHM_GPIO_PROCHOT_CTRL_BASE_IDX                                                               0
  38 #define mmTHM_THERMAL_INT_ENA                                                                          0x000a
  39 #define mmTHM_THERMAL_INT_ENA_BASE_IDX                                                                 0
  40 #define mmTHM_THERMAL_INT_CTRL                                                                         0x000b
  41 #define mmTHM_THERMAL_INT_CTRL_BASE_IDX                                                                0
  42 #define mmTHM_THERMAL_INT_STATUS                                                                       0x000c
  43 #define mmTHM_THERMAL_INT_STATUS_BASE_IDX                                                              0
  44 #define mmTHM_TMON0_RDIL0_DATA                                                                         0x000d
  45 #define mmTHM_TMON0_RDIL0_DATA_BASE_IDX                                                                0
  46 #define mmTHM_TMON0_RDIL1_DATA                                                                         0x000e
  47 #define mmTHM_TMON0_RDIL1_DATA_BASE_IDX                                                                0
  48 #define mmTHM_TMON0_RDIL2_DATA                                                                         0x000f
  49 #define mmTHM_TMON0_RDIL2_DATA_BASE_IDX                                                                0
  50 #define mmTHM_TMON0_RDIL3_DATA                                                                         0x0010
  51 #define mmTHM_TMON0_RDIL3_DATA_BASE_IDX                                                                0
  52 #define mmTHM_TMON0_RDIL4_DATA                                                                         0x0011
  53 #define mmTHM_TMON0_RDIL4_DATA_BASE_IDX                                                                0
  54 #define mmTHM_TMON0_RDIL5_DATA                                                                         0x0012
  55 #define mmTHM_TMON0_RDIL5_DATA_BASE_IDX                                                                0
  56 #define mmTHM_TMON0_RDIL6_DATA                                                                         0x0013
  57 #define mmTHM_TMON0_RDIL6_DATA_BASE_IDX                                                                0
  58 #define mmTHM_TMON0_RDIL7_DATA                                                                         0x0014
  59 #define mmTHM_TMON0_RDIL7_DATA_BASE_IDX                                                                0
  60 #define mmTHM_TMON0_RDIL8_DATA                                                                         0x0015
  61 #define mmTHM_TMON0_RDIL8_DATA_BASE_IDX                                                                0
  62 #define mmTHM_TMON0_RDIL9_DATA                                                                         0x0016
  63 #define mmTHM_TMON0_RDIL9_DATA_BASE_IDX                                                                0
  64 #define mmTHM_TMON0_RDIL10_DATA                                                                        0x0017
  65 #define mmTHM_TMON0_RDIL10_DATA_BASE_IDX                                                               0
  66 #define mmTHM_TMON0_RDIL11_DATA                                                                        0x0018
  67 #define mmTHM_TMON0_RDIL11_DATA_BASE_IDX                                                               0
  68 #define mmTHM_TMON0_RDIL12_DATA                                                                        0x0019
  69 #define mmTHM_TMON0_RDIL12_DATA_BASE_IDX                                                               0
  70 #define mmTHM_TMON0_RDIL13_DATA                                                                        0x001a
  71 #define mmTHM_TMON0_RDIL13_DATA_BASE_IDX                                                               0
  72 #define mmTHM_TMON0_RDIL14_DATA                                                                        0x001b
  73 #define mmTHM_TMON0_RDIL14_DATA_BASE_IDX                                                               0
  74 #define mmTHM_TMON0_RDIL15_DATA                                                                        0x001c
  75 #define mmTHM_TMON0_RDIL15_DATA_BASE_IDX                                                               0
  76 #define mmTHM_TMON0_RDIR0_DATA                                                                         0x001d
  77 #define mmTHM_TMON0_RDIR0_DATA_BASE_IDX                                                                0
  78 #define mmTHM_TMON0_RDIR1_DATA                                                                         0x001e
  79 #define mmTHM_TMON0_RDIR1_DATA_BASE_IDX                                                                0
  80 #define mmTHM_TMON0_RDIR2_DATA                                                                         0x001f
  81 #define mmTHM_TMON0_RDIR2_DATA_BASE_IDX                                                                0
  82 #define mmTHM_TMON0_RDIR3_DATA                                                                         0x0020
  83 #define mmTHM_TMON0_RDIR3_DATA_BASE_IDX                                                                0
  84 #define mmTHM_TMON0_RDIR4_DATA                                                                         0x0021
  85 #define mmTHM_TMON0_RDIR4_DATA_BASE_IDX                                                                0
  86 #define mmTHM_TMON0_RDIR5_DATA                                                                         0x0022
  87 #define mmTHM_TMON0_RDIR5_DATA_BASE_IDX                                                                0
  88 #define mmTHM_TMON0_RDIR6_DATA                                                                         0x0023
  89 #define mmTHM_TMON0_RDIR6_DATA_BASE_IDX                                                                0
  90 #define mmTHM_TMON0_RDIR7_DATA                                                                         0x0024
  91 #define mmTHM_TMON0_RDIR7_DATA_BASE_IDX                                                                0
  92 #define mmTHM_TMON0_RDIR8_DATA                                                                         0x0025
  93 #define mmTHM_TMON0_RDIR8_DATA_BASE_IDX                                                                0
  94 #define mmTHM_TMON0_RDIR9_DATA                                                                         0x0026
  95 #define mmTHM_TMON0_RDIR9_DATA_BASE_IDX                                                                0
  96 #define mmTHM_TMON0_RDIR10_DATA                                                                        0x0027
  97 #define mmTHM_TMON0_RDIR10_DATA_BASE_IDX                                                               0
  98 #define mmTHM_TMON0_RDIR11_DATA                                                                        0x0028
  99 #define mmTHM_TMON0_RDIR11_DATA_BASE_IDX                                                               0
 100 #define mmTHM_TMON0_RDIR12_DATA                                                                        0x0029
 101 #define mmTHM_TMON0_RDIR12_DATA_BASE_IDX                                                               0
 102 #define mmTHM_TMON0_RDIR13_DATA                                                                        0x002a
 103 #define mmTHM_TMON0_RDIR13_DATA_BASE_IDX                                                               0
 104 #define mmTHM_TMON0_RDIR14_DATA                                                                        0x002b
 105 #define mmTHM_TMON0_RDIR14_DATA_BASE_IDX                                                               0
 106 #define mmTHM_TMON0_RDIR15_DATA                                                                        0x002c
 107 #define mmTHM_TMON0_RDIR15_DATA_BASE_IDX                                                               0
 108 #define mmTHM_TMON0_INT_DATA                                                                           0x002d
 109 #define mmTHM_TMON0_INT_DATA_BASE_IDX                                                                  0
 110 #define mmTHM_TMON0_CTRL                                                                               0x002e
 111 #define mmTHM_TMON0_CTRL_BASE_IDX                                                                      0
 112 #define mmTHM_TMON0_CTRL2                                                                              0x002f
 113 #define mmTHM_TMON0_CTRL2_BASE_IDX                                                                     0
 114 #define mmTHM_TMON0_DEBUG                                                                              0x0030
 115 #define mmTHM_TMON0_DEBUG_BASE_IDX                                                                     0
 116 #define mmTHM_DIE1_TEMP                                                                                0x0055
 117 #define mmTHM_DIE1_TEMP_BASE_IDX                                                                       0
 118 #define mmTHM_DIE2_TEMP                                                                                0x0056
 119 #define mmTHM_DIE2_TEMP_BASE_IDX                                                                       0
 120 #define mmTHM_DIE3_TEMP                                                                                0x0057
 121 #define mmTHM_DIE3_TEMP_BASE_IDX                                                                       0
 122 #define mmTHM_SW_TEMP                                                                                  0x0058
 123 #define mmTHM_SW_TEMP_BASE_IDX                                                                         0
 124 #define mmCG_MULT_THERMAL_CTRL                                                                         0x0059
 125 #define mmCG_MULT_THERMAL_CTRL_BASE_IDX                                                                0
 126 #define mmCG_MULT_THERMAL_STATUS                                                                       0x005a
 127 #define mmCG_MULT_THERMAL_STATUS_BASE_IDX                                                              0
 128 #define mmCG_THERMAL_RANGE                                                                             0x005b
 129 #define mmCG_THERMAL_RANGE_BASE_IDX                                                                    0
 130 #define mmTHM_TMON_CONFIG                                                                              0x005c
 131 #define mmTHM_TMON_CONFIG_BASE_IDX                                                                     0
 132 #define mmTHM_TMON_CONFIG2                                                                             0x005d
 133 #define mmTHM_TMON_CONFIG2_BASE_IDX                                                                    0
 134 #define mmTHM_TMON0_COEFF                                                                              0x005e
 135 #define mmTHM_TMON0_COEFF_BASE_IDX                                                                     0
 136 #define mmTHM_TCON_LOCAL0                                                                              0x006e
 137 #define mmTHM_TCON_LOCAL0_BASE_IDX                                                                     0
 138 #define mmTHM_TCON_LOCAL1                                                                              0x006f
 139 #define mmTHM_TCON_LOCAL1_BASE_IDX                                                                     0
 140 #define mmTHM_TCON_LOCAL2                                                                              0x0070
 141 #define mmTHM_TCON_LOCAL2_BASE_IDX                                                                     0
 142 #define mmTHM_TCON_LOCAL3                                                                              0x0071
 143 #define mmTHM_TCON_LOCAL3_BASE_IDX                                                                     0
 144 #define mmTHM_TCON_LOCAL4                                                                              0x0072
 145 #define mmTHM_TCON_LOCAL4_BASE_IDX                                                                     0
 146 #define mmTHM_TCON_LOCAL5                                                                              0x0073
 147 #define mmTHM_TCON_LOCAL5_BASE_IDX                                                                     0
 148 #define mmTHM_TCON_LOCAL6                                                                              0x0074
 149 #define mmTHM_TCON_LOCAL6_BASE_IDX                                                                     0
 150 #define mmTHM_TCON_LOCAL7                                                                              0x0075
 151 #define mmTHM_TCON_LOCAL7_BASE_IDX                                                                     0
 152 #define mmTHM_TCON_LOCAL8                                                                              0x0076
 153 #define mmTHM_TCON_LOCAL8_BASE_IDX                                                                     0
 154 #define mmTHM_TCON_LOCAL9                                                                              0x0077
 155 #define mmTHM_TCON_LOCAL9_BASE_IDX                                                                     0
 156 #define mmTHM_TCON_LOCAL10                                                                             0x0078
 157 #define mmTHM_TCON_LOCAL10_BASE_IDX                                                                    0
 158 #define mmTHM_TCON_LOCAL11                                                                             0x0079
 159 #define mmTHM_TCON_LOCAL11_BASE_IDX                                                                    0
 160 #define mmTHM_TCON_LOCAL12                                                                             0x007a
 161 #define mmTHM_TCON_LOCAL12_BASE_IDX                                                                    0
 162 #define mmTHM_TCON_LOCAL13                                                                             0x007b
 163 #define mmTHM_TCON_LOCAL13_BASE_IDX                                                                    0
 164 #define mmTHM_PWRMGT                                                                                   0x007d
 165 #define mmTHM_PWRMGT_BASE_IDX                                                                          0
 166 #define mmSMUSBI_SBIREGADDR                                                                            0x0080
 167 #define mmSMUSBI_SBIREGADDR_BASE_IDX                                                                   0
 168 #define mmSMUSBI_SBIREGDATA                                                                            0x0081
 169 #define mmSMUSBI_SBIREGDATA_BASE_IDX                                                                   0
 170 #define mmSMUSBI_ERRATA_STAT_REG                                                                       0x0085
 171 #define mmSMUSBI_ERRATA_STAT_REG_BASE_IDX                                                              0
 172 #define mmSMUSBI_SBICTRL                                                                               0x0086
 173 #define mmSMUSBI_SBICTRL_BASE_IDX                                                                      0
 174 #define mmSMUSBI_CKNBIRESET                                                                            0x0087
 175 #define mmSMUSBI_CKNBIRESET_BASE_IDX                                                                   0
 176 #define mmSMUSBI_TIMING                                                                                0x0088
 177 #define mmSMUSBI_TIMING_BASE_IDX                                                                       0
 178 #define mmSMUSBI_HS_TIMING                                                                             0x0089
 179 #define mmSMUSBI_HS_TIMING_BASE_IDX                                                                    0
 180 #define mmSBTSI_REMOTE_TEMP                                                                            0x008a
 181 #define mmSBTSI_REMOTE_TEMP_BASE_IDX                                                                   0
 182 #define mmSBRMI_CONTROL                                                                                0x008b
 183 #define mmSBRMI_CONTROL_BASE_IDX                                                                       0
 184 #define mmSBRMI_COMMAND                                                                                0x008c
 185 #define mmSBRMI_COMMAND_BASE_IDX                                                                       0
 186 #define mmSBRMI_WRITE_DATA0                                                                            0x008d
 187 #define mmSBRMI_WRITE_DATA0_BASE_IDX                                                                   0
 188 #define mmSBRMI_WRITE_DATA1                                                                            0x008e
 189 #define mmSBRMI_WRITE_DATA1_BASE_IDX                                                                   0
 190 #define mmSBRMI_WRITE_DATA2                                                                            0x008f
 191 #define mmSBRMI_WRITE_DATA2_BASE_IDX                                                                   0
 192 #define mmSBRMI_READ_DATA0                                                                             0x0090
 193 #define mmSBRMI_READ_DATA0_BASE_IDX                                                                    0
 194 #define mmSBRMI_READ_DATA1                                                                             0x0091
 195 #define mmSBRMI_READ_DATA1_BASE_IDX                                                                    0
 196 #define mmSBRMI_CORE_EN_NUMBER                                                                         0x0092
 197 #define mmSBRMI_CORE_EN_NUMBER_BASE_IDX                                                                0
 198 #define mmSBRMI_CORE_EN_STATUS0                                                                        0x0093
 199 #define mmSBRMI_CORE_EN_STATUS0_BASE_IDX                                                               0
 200 #define mmSBRMI_CORE_EN_STATUS1                                                                        0x0094
 201 #define mmSBRMI_CORE_EN_STATUS1_BASE_IDX                                                               0
 202 #define mmSBRMI_APIC_STATUS0                                                                           0x0095
 203 #define mmSBRMI_APIC_STATUS0_BASE_IDX                                                                  0
 204 #define mmSBRMI_APIC_STATUS1                                                                           0x0096
 205 #define mmSBRMI_APIC_STATUS1_BASE_IDX                                                                  0
 206 #define mmSBRMI_MCE_STATUS0                                                                            0x0097
 207 #define mmSBRMI_MCE_STATUS0_BASE_IDX                                                                   0
 208 #define mmSBRMI_MCE_STATUS1                                                                            0x0098
 209 #define mmSBRMI_MCE_STATUS1_BASE_IDX                                                                   0
 210 #define mmSMBUS_CNTL0                                                                                  0x0099
 211 #define mmSMBUS_CNTL0_BASE_IDX                                                                         0
 212 #define mmSMBUS_CNTL1                                                                                  0x009a
 213 #define mmSMBUS_CNTL1_BASE_IDX                                                                         0
 214 #define mmSMBUS_BLKWR_CMD_CTRL0                                                                        0x009b
 215 #define mmSMBUS_BLKWR_CMD_CTRL0_BASE_IDX                                                               0
 216 #define mmSMBUS_BLKWR_CMD_CTRL1                                                                        0x009c
 217 #define mmSMBUS_BLKWR_CMD_CTRL1_BASE_IDX                                                               0
 218 #define mmSMBUS_BLKRD_CMD_CTRL0                                                                        0x009d
 219 #define mmSMBUS_BLKRD_CMD_CTRL0_BASE_IDX                                                               0
 220 #define mmSMBUS_BLKRD_CMD_CTRL1                                                                        0x009e
 221 #define mmSMBUS_BLKRD_CMD_CTRL1_BASE_IDX                                                               0
 222 #define mmSMBUS_TIMING_CNTL0                                                                           0x009f
 223 #define mmSMBUS_TIMING_CNTL0_BASE_IDX                                                                  0
 224 #define mmSMBUS_TIMING_CNTL1                                                                           0x00a0
 225 #define mmSMBUS_TIMING_CNTL1_BASE_IDX                                                                  0
 226 #define mmSMBUS_TIMING_CNTL2                                                                           0x00a1
 227 #define mmSMBUS_TIMING_CNTL2_BASE_IDX                                                                  0
 228 #define mmSMBUS_TRIGGER_CNTL                                                                           0x00a2
 229 #define mmSMBUS_TRIGGER_CNTL_BASE_IDX                                                                  0
 230 #define mmSMBUS_UDID_CNTL0                                                                             0x00a3
 231 #define mmSMBUS_UDID_CNTL0_BASE_IDX                                                                    0
 232 #define mmSMBUS_UDID_CNTL1                                                                             0x00a4
 233 #define mmSMBUS_UDID_CNTL1_BASE_IDX                                                                    0
 234 #define mmSMBUS_UDID_CNTL2                                                                             0x00a5
 235 #define mmSMBUS_UDID_CNTL2_BASE_IDX                                                                    0
 236 #define mmSMUSBI_SMBUS                                                                                 0x00a6
 237 #define mmSMUSBI_SMBUS_BASE_IDX                                                                        0
 238 #define mmSMUSBI_ALERT                                                                                 0x00a7
 239 #define mmSMUSBI_ALERT_BASE_IDX                                                                        0
 240 #define mmTHM_TMON0_REMOTE_START                                                                       0x0100
 241 #define mmTHM_TMON0_REMOTE_START_BASE_IDX                                                              0
 242 #define mmTHM_TMON0_REMOTE_END                                                                         0x013f
 243 #define mmTHM_TMON0_REMOTE_END_BASE_IDX                                                                0
 244 #define mmTHM_TMON1_REMOTE_START                                                                       0x0140
 245 #define mmTHM_TMON1_REMOTE_START_BASE_IDX                                                              0
 246 #define mmTHM_TMON1_REMOTE_END                                                                         0x017f
 247 #define mmTHM_TMON1_REMOTE_END_BASE_IDX                                                                0
 248 #define mmTHM_TMON2_REMOTE_START                                                                       0x0180
 249 #define mmTHM_TMON2_REMOTE_START_BASE_IDX                                                              0
 250 #define mmTHM_TMON2_REMOTE_END                                                                         0x01bf
 251 #define mmTHM_TMON2_REMOTE_END_BASE_IDX                                                                0
 252 #define mmTHM_TMON3_REMOTE_START                                                                       0x01c0
 253 #define mmTHM_TMON3_REMOTE_START_BASE_IDX                                                              0
 254 #define mmTHM_TMON3_REMOTE_END                                                                         0x01ff
 255 #define mmTHM_TMON3_REMOTE_END_BASE_IDX                                                                0
 256 
 257 #endif
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