root/drivers/gpu/drm/amd/include/ivsrcid/vcn/irqsrcs_vcn_2_0.h

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   1 /*
   2  * Copyright 2018 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  */
  22 
  23 #ifndef __IRQSRCS_VCN_2_0_H__
  24 #define __IRQSRCS_VCN_2_0_H__
  25 
  26 #define VCN_2_0__SRCID__UVD_ENC_GENERAL_PURPOSE                         119             // 0x77 Encoder General Purpose
  27 #define VCN_2_0__SRCID__UVD_ENC_LOW_LATENCY                             120             // 0x78 Encoder Low Latency
  28 #define VCN_2_0__SRCID__UVD_SYSTEM_MESSAGE_INTERRUPT                    124             // 0x7c UVD system message interrupt
  29 #define VCN_2_0__SRCID__JPEG_ENCODE                                     151             // 0x97 JRBC Encode interrupt
  30 #define VCN_2_0__SRCID__JPEG_DECODE                                     153             // 0x99 JRBC Decode interrupt
  31 
  32 #endif

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