root/drivers/gpu/drm/amd/include/atomfirmwareid.h

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   1 /****************************************************************************\
   2 * 
   3 *  File Name      atomfirmwareid.h
   4 *
   5 *  Description    ATOM BIOS command/data table ID definition header file
   6 *
   7 *  Copyright 2016 Advanced Micro Devices, Inc.
   8 *
   9 * Permission is hereby granted, free of charge, to any person obtaining a copy of this software 
  10 * and associated documentation files (the "Software"), to deal in the Software without restriction,
  11 * including without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12 * and/or sell copies of the Software, and to permit persons to whom the Software is furnished to do so,
  13 * subject to the following conditions:
  14 *
  15 * The above copyright notice and this permission notice shall be included in all copies or substantial
  16 * portions of the Software.
  17 *
  18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  21 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  22 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  23 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  24 * OTHER DEALINGS IN THE SOFTWARE.
  25 *
  26 \****************************************************************************/
  27 
  28 #ifndef _ATOMFIRMWAREID_H_
  29 #define _ATOMFIRMWAREID_H_
  30 
  31 enum atom_master_data_table_id
  32 {
  33     VBIOS_DATA_TBL_ID__UTILITY_PIPELINE,
  34     VBIOS_DATA_TBL_ID__MULTIMEDIA_INF,
  35     VBIOS_DATA_TBL_ID__FIRMWARE_INF,
  36     VBIOS_DATA_TBL_ID__LCD_INF,
  37     VBIOS_DATA_TBL_ID__SMU_INF,
  38     VBIOS_DATA_TBL_ID__VRAM_USAGE_BY_FIRMWARE,
  39     VBIOS_DATA_TBL_ID__GPIO_PIN_LUT,
  40     VBIOS_DATA_TBL_ID__GFX_INF,
  41     VBIOS_DATA_TBL_ID__POWER_PLAY_INF,
  42     VBIOS_DATA_TBL_ID__DISPLAY_OBJECT_INF,
  43     VBIOS_DATA_TBL_ID__INDIRECT_IO_ACCESS,
  44     VBIOS_DATA_TBL_ID__UMC_INF,
  45     VBIOS_DATA_TBL_ID__DCE_INF,
  46     VBIOS_DATA_TBL_ID__VRAM_INF,
  47     VBIOS_DATA_TBL_ID__INTEGRATED_SYS_INF,
  48     VBIOS_DATA_TBL_ID__ASIC_PROFILING_INF,
  49     VBIOS_DATA_TBL_ID__VOLTAGE_OBJ_INF,
  50 
  51     VBIOS_DATA_TBL_ID__UNDEFINED,
  52 };
  53 
  54 enum atom_master_command_table_id
  55 {
  56     VBIOS_CMD_TBL_ID__ASIC_INIT,
  57     VBIOS_CMD_TBL_ID__DIGX_ENCODER_CONTROL,
  58     VBIOS_CMD_TBL_ID__SET_ENGINE_CLOCK,
  59     VBIOS_CMD_TBL_ID__SET_MEMORY_CLOCK,
  60     VBIOS_CMD_TBL_ID__SET_PIXEL_CLOCK,
  61     VBIOS_CMD_TBL_ID__ENABLE_DISP_POWER_GATING,
  62     VBIOS_CMD_TBL_ID__BLANK_CRTC,
  63     VBIOS_CMD_TBL_ID__ENABLE_CRTC,
  64     VBIOS_CMD_TBL_ID__GET_SMU_CLOCK_INFO,
  65     VBIOS_CMD_TBL_ID__SELECT_CRTC_SOURCE,
  66     VBIOS_CMD_TBL_ID__SET_DCE_CLOCK,
  67     VBIOS_CMD_TBL_ID__GET_MEMORY_CLOCK,
  68     VBIOS_CMD_TBL_ID__GET_ENGINE_CLOCK,
  69     VBIOS_CMD_TBL_ID__SET_CRTC_USING_DTD_TIMING,
  70     VBIOS_CMD_TBL_ID__EXTENAL_ENCODER_CONTROL,
  71     VBIOS_CMD_TBL_ID__PROCESS_I2C_CHANNEL_TRANSACTION,
  72     VBIOS_CMD_TBL_ID__COMPUTE_GPU_CLOCK_PARAM,
  73     VBIOS_CMD_TBL_ID__DYNAMIC_MEMORY_SETTINGS,
  74     VBIOS_CMD_TBL_ID__MEMORY_TRAINING,
  75     VBIOS_CMD_TBL_ID__SET_VOLTAGE,
  76     VBIOS_CMD_TBL_ID__DIG1_TRANSMITTER_CONTROL,
  77     VBIOS_CMD_TBL_ID__PROCESS_AUX_CHANNEL_TRANSACTION,
  78     VBIOS_CMD_TBL_ID__GET_VOLTAGE_INF,
  79 
  80     VBIOS_CMD_TBL_ID__UNDEFINED,
  81 };
  82 
  83 
  84 
  85 #endif  /* _ATOMFIRMWAREID_H_  */
  86 /* ### EOF ### */

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