root/drivers/gpu/drm/amd/display/dc/dm_helpers.h

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   1 /*
   2  * Copyright 2012-15 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25 
  26 /**
  27  * This file defines helper functions provided by the Display Manager to
  28  * Display Core.
  29  */
  30 #ifndef __DM_HELPERS__
  31 #define __DM_HELPERS__
  32 
  33 #include "dc_types.h"
  34 #include "dc.h"
  35 
  36 struct dp_mst_stream_allocation_table;
  37 
  38 enum dc_edid_status dm_helpers_parse_edid_caps(
  39         struct dc_context *ctx,
  40         const struct dc_edid *edid,
  41         struct dc_edid_caps *edid_caps);
  42 
  43 
  44 /*
  45  * Update DP branch info
  46  */
  47 void dm_helpers_dp_update_branch_info(
  48                 struct dc_context *ctx,
  49                 const struct dc_link *link);
  50 
  51 /*
  52  * Writes payload allocation table in immediate downstream device.
  53  */
  54 bool dm_helpers_dp_mst_write_payload_allocation_table(
  55                 struct dc_context *ctx,
  56                 const struct dc_stream_state *stream,
  57                 struct dp_mst_stream_allocation_table *proposed_table,
  58                 bool enable);
  59 
  60 /*
  61  * poll pending down reply
  62  */
  63 void dm_helpers_dp_mst_poll_pending_down_reply(
  64         struct dc_context *ctx,
  65         const struct dc_link *link);
  66 
  67 /*
  68  * Clear payload allocation table before enable MST DP link.
  69  */
  70 void dm_helpers_dp_mst_clear_payload_allocation_table(
  71         struct dc_context *ctx,
  72         const struct dc_link *link);
  73 
  74 /*
  75  * Polls for ACT (allocation change trigger) handled and
  76  */
  77 bool dm_helpers_dp_mst_poll_for_allocation_change_trigger(
  78                 struct dc_context *ctx,
  79                 const struct dc_stream_state *stream);
  80 /*
  81  * Sends ALLOCATE_PAYLOAD message.
  82  */
  83 bool dm_helpers_dp_mst_send_payload_allocation(
  84                 struct dc_context *ctx,
  85                 const struct dc_stream_state *stream,
  86                 bool enable);
  87 
  88 bool dm_helpers_dp_mst_start_top_mgr(
  89                 struct dc_context *ctx,
  90                 const struct dc_link *link,
  91                 bool boot);
  92 
  93 void dm_helpers_dp_mst_stop_top_mgr(
  94                 struct dc_context *ctx,
  95                 const struct dc_link *link);
  96 /**
  97  * OS specific aux read callback.
  98  */
  99 bool dm_helpers_dp_read_dpcd(
 100                 struct dc_context *ctx,
 101                 const struct dc_link *link,
 102                 uint32_t address,
 103                 uint8_t *data,
 104                 uint32_t size);
 105 
 106 /**
 107  * OS specific aux write callback.
 108  */
 109 bool dm_helpers_dp_write_dpcd(
 110                 struct dc_context *ctx,
 111                 const struct dc_link *link,
 112                 uint32_t address,
 113                 const uint8_t *data,
 114                 uint32_t size);
 115 
 116 bool dm_helpers_submit_i2c(
 117                 struct dc_context *ctx,
 118                 const struct dc_link *link,
 119                 struct i2c_command *cmd);
 120 
 121 #ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
 122 bool dm_helpers_dp_write_dsc_enable(
 123                 struct dc_context *ctx,
 124                 const struct dc_stream_state *stream,
 125                 bool enable
 126 );
 127 #endif
 128 bool dm_helpers_is_dp_sink_present(
 129                 struct dc_link *link);
 130 
 131 enum dc_edid_status dm_helpers_read_local_edid(
 132                 struct dc_context *ctx,
 133                 struct dc_link *link,
 134                 struct dc_sink *sink);
 135 
 136 void dm_set_dcn_clocks(
 137                 struct dc_context *ctx,
 138                 struct dc_clocks *clks);
 139 
 140 #endif /* __DM_HELPERS__ */

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