root/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/dcn20_clk_mgr.h

/* [<][>][^][v][top][bottom][index][help] */

INCLUDED FROM

   1 /*
   2  * Copyright 2018 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25 
  26 #ifndef __DCN20_CLK_MGR_H__
  27 #define __DCN20_CLK_MGR_H__
  28 
  29 void dcn2_update_clocks(struct clk_mgr *dccg,
  30                         struct dc_state *context,
  31                         bool safe_to_lower);
  32 
  33 void dcn2_update_clocks_fpga(struct clk_mgr *clk_mgr,
  34                         struct dc_state *context,
  35                         bool safe_to_lower);
  36 void dcn20_update_clocks_update_dpp_dto(struct clk_mgr_internal *clk_mgr,
  37                 struct dc_state *context);
  38 
  39 void dcn2_init_clocks(struct clk_mgr *clk_mgr);
  40 
  41 void dcn20_clk_mgr_construct(struct dc_context *ctx,
  42                 struct clk_mgr_internal *clk_mgr,
  43                 struct pp_smu_funcs *pp_smu,
  44                 struct dccg *dccg);
  45 
  46 uint32_t dentist_get_did_from_divider(int divider);
  47 
  48 void dcn2_get_clock(struct clk_mgr *clk_mgr,
  49                 struct dc_state *context,
  50                         enum dc_clock_type clock_type,
  51                         struct dc_clock_config *clock_cfg);
  52 
  53 #endif //__DCN20_CLK_MGR_H__
/* [<][>][^][v][top][bottom][index][help] */