root/drivers/gpu/drm/amd/display/dc/inc/dc_link_ddc.h

INCLUDED FROM

   1 /*
   2  * Copyright 2012-15 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25 
  26 #ifndef __DAL_DDC_SERVICE_H__
  27 #define __DAL_DDC_SERVICE_H__
  28 
  29 #include "include/ddc_service_types.h"
  30 #include "include/i2caux_interface.h"
  31 
  32 #define EDID_SEGMENT_SIZE 256
  33 
  34 /* Address range from 0x00 to 0x1F.*/
  35 #define DP_ADAPTOR_TYPE2_SIZE 0x20
  36 #define DP_ADAPTOR_TYPE2_REG_ID 0x10
  37 #define DP_ADAPTOR_TYPE2_REG_MAX_TMDS_CLK 0x1D
  38 /* Identifies adaptor as Dual-mode adaptor */
  39 #define DP_ADAPTOR_TYPE2_ID 0xA0
  40 /* MHz*/
  41 #define DP_ADAPTOR_TYPE2_MAX_TMDS_CLK 600
  42 /* MHz*/
  43 #define DP_ADAPTOR_TYPE2_MIN_TMDS_CLK 25
  44 /* kHZ*/
  45 #define DP_ADAPTOR_DVI_MAX_TMDS_CLK 165000
  46 /* kHZ*/
  47 #define DP_ADAPTOR_HDMI_SAFE_MAX_TMDS_CLK 165000
  48 
  49 #define DDC_I2C_COMMAND_ENGINE I2C_COMMAND_ENGINE_SW
  50 
  51 struct ddc_service;
  52 struct graphics_object_id;
  53 enum ddc_result;
  54 struct av_sync_data;
  55 struct dp_receiver_id_info;
  56 
  57 struct i2c_payloads;
  58 struct aux_payloads;
  59 
  60 void dal_ddc_i2c_payloads_add(
  61                 struct i2c_payloads *payloads,
  62                 uint32_t address,
  63                 uint32_t len,
  64                 uint8_t *data,
  65                 bool write);
  66 
  67 struct ddc_service_init_data {
  68         struct graphics_object_id id;
  69         struct dc_context *ctx;
  70         struct dc_link *link;
  71 };
  72 
  73 struct ddc_service *dal_ddc_service_create(
  74                 struct ddc_service_init_data *ddc_init_data);
  75 
  76 void dal_ddc_service_destroy(struct ddc_service **ddc);
  77 
  78 enum ddc_service_type dal_ddc_service_get_type(struct ddc_service *ddc);
  79 
  80 void dal_ddc_service_set_transaction_type(
  81                 struct ddc_service *ddc,
  82                 enum ddc_transaction_type type);
  83 
  84 bool dal_ddc_service_is_in_aux_transaction_mode(struct ddc_service *ddc);
  85 
  86 void dal_ddc_service_i2c_query_dp_dual_mode_adaptor(
  87                 struct ddc_service *ddc,
  88                 struct display_sink_capability *sink_cap);
  89 
  90 bool dal_ddc_service_query_ddc_data(
  91                 struct ddc_service *ddc,
  92                 uint32_t address,
  93                 uint8_t *write_buf,
  94                 uint32_t write_size,
  95                 uint8_t *read_buf,
  96                 uint32_t read_size);
  97 
  98 int dc_link_aux_transfer_raw(struct ddc_service *ddc,
  99                 struct aux_payload *payload,
 100                 enum aux_channel_operation_result *operation_result);
 101 
 102 bool dc_link_aux_transfer_with_retries(struct ddc_service *ddc,
 103                 struct aux_payload *payload);
 104 
 105 void dal_ddc_service_write_scdc_data(
 106                 struct ddc_service *ddc_service,
 107                 uint32_t pix_clk,
 108                 bool lte_340_scramble);
 109 
 110 void dal_ddc_service_read_scdc_data(
 111                 struct ddc_service *ddc_service);
 112 
 113 void ddc_service_set_dongle_type(struct ddc_service *ddc,
 114                 enum display_dongle_type dongle_type);
 115 
 116 void dal_ddc_service_set_ddc_pin(
 117                 struct ddc_service *ddc_service,
 118                 struct ddc *ddc);
 119 
 120 struct ddc *dal_ddc_service_get_ddc_pin(struct ddc_service *ddc_service);
 121 
 122 uint32_t get_defer_delay(struct ddc_service *ddc);
 123 
 124 #endif /* __DAL_DDC_SERVICE_H__ */
 125