root/drivers/gpu/drm/amd/display/dc/inc/hw/dccg.h

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INCLUDED FROM


   1 /*
   2  * Copyright 2018 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25 
  26 #ifndef __DAL_DCCG_H__
  27 #define __DAL_DCCG_H__
  28 
  29 #include "dc_types.h"
  30 
  31 struct dccg {
  32         struct dc_context *ctx;
  33         const struct dccg_funcs *funcs;
  34 
  35         int ref_dppclk;
  36 };
  37 
  38 struct dccg_funcs {
  39         void (*update_dpp_dto)(struct dccg *dccg,
  40                         int dpp_inst,
  41                         int req_dppclk,
  42                         bool reduce_divider_only);
  43         void (*get_dccg_ref_freq)(struct dccg *dccg,
  44                         unsigned int xtalin_freq_inKhz,
  45                         unsigned int *dccg_ref_freq_inKhz);
  46         void (*dccg_init)(struct dccg *dccg);
  47 };
  48 
  49 #endif //__DAL_DCCG_H__

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