root/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h

INCLUDED FROM

   1 /*
   2  * Copyright 2012-15 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: AMD
  23  *
  24  */
  25 #ifndef __DAL_MEM_INPUT_H__
  26 #define __DAL_MEM_INPUT_H__
  27 
  28 #include "dc.h"
  29 #include "include/grph_object_id.h"
  30 
  31 #include "dml/display_mode_structs.h"
  32 
  33 struct dchub_init_data;
  34 struct cstate_pstate_watermarks_st {
  35         uint32_t cstate_exit_ns;
  36         uint32_t cstate_enter_plus_exit_ns;
  37         uint32_t pstate_change_ns;
  38 };
  39 
  40 struct dcn_watermarks {
  41         uint32_t pte_meta_urgent_ns;
  42         uint32_t urgent_ns;
  43 #if defined(CONFIG_DRM_AMD_DC_DCN2_1)
  44         uint32_t frac_urg_bw_nom;
  45         uint32_t frac_urg_bw_flip;
  46 #endif
  47         struct cstate_pstate_watermarks_st cstate_pstate;
  48 };
  49 
  50 struct dcn_watermark_set {
  51         struct dcn_watermarks a;
  52         struct dcn_watermarks b;
  53         struct dcn_watermarks c;
  54         struct dcn_watermarks d;
  55 };
  56 
  57 struct dce_watermarks {
  58         int a_mark;
  59         int b_mark;
  60         int c_mark;
  61         int d_mark;
  62 };
  63 
  64 struct stutter_modes {
  65         bool enhanced;
  66         bool quad_dmif_buffer;
  67         bool watermark_nb_pstate;
  68 };
  69 
  70 struct mem_input {
  71         const struct mem_input_funcs *funcs;
  72         struct dc_context *ctx;
  73         struct dc_plane_address request_address;
  74         struct dc_plane_address current_address;
  75         int inst;
  76         struct stutter_modes stutter_mode;
  77 };
  78 
  79 struct vm_system_aperture_param {
  80         PHYSICAL_ADDRESS_LOC sys_default;
  81         PHYSICAL_ADDRESS_LOC sys_low;
  82         PHYSICAL_ADDRESS_LOC sys_high;
  83 };
  84 
  85 struct vm_context0_param {
  86         PHYSICAL_ADDRESS_LOC pte_base;
  87         PHYSICAL_ADDRESS_LOC pte_start;
  88         PHYSICAL_ADDRESS_LOC pte_end;
  89         PHYSICAL_ADDRESS_LOC fault_default;
  90 };
  91 
  92 struct mem_input_funcs {
  93         void (*mem_input_setup)(
  94                         struct mem_input *mem_input,
  95                         struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
  96                         struct _vcs_dpi_display_ttu_regs_st *ttu_regs,
  97                         struct _vcs_dpi_display_rq_regs_st *rq_regs,
  98                         struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest);
  99 
 100         void (*dcc_control)(struct mem_input *mem_input, bool enable,
 101                         bool independent_64b_blks);
 102         void (*mem_program_viewport)(
 103                         struct mem_input *mem_input,
 104                         const struct rect *viewport,
 105                         const struct rect *viewport_c);
 106 
 107         void (*mem_input_program_display_marks)(
 108                 struct mem_input *mem_input,
 109                 struct dce_watermarks nbp,
 110                 struct dce_watermarks stutter,
 111                 struct dce_watermarks stutter_enter,
 112                 struct dce_watermarks urgent,
 113                 uint32_t total_dest_line_time_ns);
 114 
 115         void (*mem_input_program_chroma_display_marks)(
 116                         struct mem_input *mem_input,
 117                         struct dce_watermarks nbp,
 118                         struct dce_watermarks stutter,
 119                         struct dce_watermarks urgent,
 120                         uint32_t total_dest_line_time_ns);
 121 
 122         void (*allocate_mem_input)(
 123                 struct mem_input *mem_input,
 124                 uint32_t h_total,/* for current target */
 125                 uint32_t v_total,/* for current target */
 126                 uint32_t pix_clk_khz,/* for current target */
 127                 uint32_t total_streams_num);
 128 
 129         void (*free_mem_input)(
 130                 struct mem_input *mem_input,
 131                 uint32_t paths_num);
 132 
 133         bool (*mem_input_program_surface_flip_and_addr)(
 134                 struct mem_input *mem_input,
 135                 const struct dc_plane_address *address,
 136                 bool flip_immediate);
 137 
 138         void (*mem_input_program_pte_vm)(
 139                 struct mem_input *mem_input,
 140                 enum surface_pixel_format format,
 141                 union dc_tiling_info *tiling_info,
 142                 enum dc_rotation_angle rotation);
 143 
 144         void (*mem_input_set_vm_system_aperture_settings)(
 145                         struct mem_input *mem_input,
 146                         struct vm_system_aperture_param *apt);
 147 
 148         void (*mem_input_set_vm_context0_settings)(
 149                         struct mem_input *mem_input,
 150                         const struct vm_context0_param *vm0);
 151 
 152         void (*mem_input_program_surface_config)(
 153                 struct mem_input *mem_input,
 154                 enum surface_pixel_format format,
 155                 union dc_tiling_info *tiling_info,
 156                 struct plane_size *plane_size,
 157                 enum dc_rotation_angle rotation,
 158                 struct dc_plane_dcc_param *dcc,
 159                 bool horizontal_mirror);
 160 
 161         bool (*mem_input_is_flip_pending)(struct mem_input *mem_input);
 162 
 163         void (*mem_input_update_dchub)(struct mem_input *mem_input,
 164                                 struct dchub_init_data *dh_data);
 165 
 166         void (*set_blank)(struct mem_input *mi, bool blank);
 167         void (*set_hubp_blank_en)(struct mem_input *mi, bool blank);
 168 
 169         void (*set_cursor_attributes)(
 170                         struct mem_input *mem_input,
 171                         const struct dc_cursor_attributes *attr);
 172 
 173         void (*set_cursor_position)(
 174                         struct mem_input *mem_input,
 175                         const struct dc_cursor_position *pos,
 176                         const struct dc_cursor_mi_param *param);
 177 
 178 };
 179 
 180 #endif