This source file includes following definitions.
- dal_hw_translate_init
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26 #include "dm_services.h"
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31 #include "include/gpio_types.h"
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37 #include "hw_translate.h"
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43 #include "dce80/hw_translate_dce80.h"
44 #include "dce110/hw_translate_dce110.h"
45 #include "dce120/hw_translate_dce120.h"
46 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
47 #include "dcn10/hw_translate_dcn10.h"
48 #endif
49 #if defined(CONFIG_DRM_AMD_DC_DCN2_0)
50 #include "dcn20/hw_translate_dcn20.h"
51 #endif
52 #if defined(CONFIG_DRM_AMD_DC_DCN2_1)
53 #include "dcn21/hw_translate_dcn21.h"
54 #endif
55
56 #include "diagnostics/hw_translate_diag.h"
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62 bool dal_hw_translate_init(
63 struct hw_translate *translate,
64 enum dce_version dce_version,
65 enum dce_environment dce_environment)
66 {
67 if (IS_FPGA_MAXIMUS_DC(dce_environment)) {
68 dal_hw_translate_diag_fpga_init(translate);
69 return true;
70 }
71
72 switch (dce_version) {
73 case DCE_VERSION_8_0:
74 case DCE_VERSION_8_1:
75 case DCE_VERSION_8_3:
76 dal_hw_translate_dce80_init(translate);
77 return true;
78 case DCE_VERSION_10_0:
79 case DCE_VERSION_11_0:
80 case DCE_VERSION_11_2:
81 case DCE_VERSION_11_22:
82 dal_hw_translate_dce110_init(translate);
83 return true;
84 case DCE_VERSION_12_0:
85 case DCE_VERSION_12_1:
86 dal_hw_translate_dce120_init(translate);
87 return true;
88 #if defined(CONFIG_DRM_AMD_DC_DCN1_0)
89 case DCN_VERSION_1_0:
90 case DCN_VERSION_1_01:
91 dal_hw_translate_dcn10_init(translate);
92 return true;
93 #endif
94
95 #if defined(CONFIG_DRM_AMD_DC_DCN2_0)
96 case DCN_VERSION_2_0:
97 dal_hw_translate_dcn20_init(translate);
98 return true;
99 #endif
100 #if defined(CONFIG_DRM_AMD_DC_DCN2_1)
101 case DCN_VERSION_2_1:
102 dal_hw_translate_dcn21_init(translate);
103 return true;
104 #endif
105
106 default:
107 BREAK_TO_DEBUGGER();
108 return false;
109 }
110 }