root/drivers/gpu/drm/amd/powerplay/smumgr/smumgr.c

DEFINITIONS

1. smum_thermal_avfs_enable
2. smum_thermal_setup_fan_table
3. smum_update_sclk_threshold
4. smum_update_smc_table
5. smum_get_offsetof
6. smum_process_firmware_header
7. smum_get_argument
8. smum_get_mac_definition
9. smum_download_powerplay_table
10. smum_upload_powerplay_table
11. smum_send_msg_to_smc
12. smum_send_msg_to_smc_with_parameter
13. smum_init_smc_table
14. smum_populate_all_graphic_levels
15. smum_populate_all_memory_levels
16. smum_initialize_mc_reg_table
17. smum_is_dpm_running
18. smum_is_hw_avfs_present
19. smum_update_dpm_settings
20. smum_smc_table_manager

   1 /*
   2  * Copyright 2015 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  */
  23 
  24 #include <linux/delay.h>
  25 #include <linux/kernel.h>
  26 #include <linux/module.h>
  27 #include <linux/slab.h>
  28 #include <linux/types.h>
  29 #include <drm/amdgpu_drm.h>
  30 #include "smumgr.h"
  31 
  32 MODULE_FIRMWARE("amdgpu/bonaire_smc.bin");
  33 MODULE_FIRMWARE("amdgpu/bonaire_k_smc.bin");
  34 MODULE_FIRMWARE("amdgpu/hawaii_smc.bin");
  35 MODULE_FIRMWARE("amdgpu/hawaii_k_smc.bin");
  36 MODULE_FIRMWARE("amdgpu/topaz_smc.bin");
  37 MODULE_FIRMWARE("amdgpu/topaz_k_smc.bin");
  38 MODULE_FIRMWARE("amdgpu/tonga_smc.bin");
  39 MODULE_FIRMWARE("amdgpu/tonga_k_smc.bin");
  40 MODULE_FIRMWARE("amdgpu/fiji_smc.bin");
  41 MODULE_FIRMWARE("amdgpu/polaris10_smc.bin");
  42 MODULE_FIRMWARE("amdgpu/polaris10_smc_sk.bin");
  43 MODULE_FIRMWARE("amdgpu/polaris10_k_smc.bin");
  44 MODULE_FIRMWARE("amdgpu/polaris10_k2_smc.bin");
  45 MODULE_FIRMWARE("amdgpu/polaris11_smc.bin");
  46 MODULE_FIRMWARE("amdgpu/polaris11_smc_sk.bin");
  47 MODULE_FIRMWARE("amdgpu/polaris11_k_smc.bin");
  48 MODULE_FIRMWARE("amdgpu/polaris11_k2_smc.bin");
  49 MODULE_FIRMWARE("amdgpu/polaris12_smc.bin");
  50 MODULE_FIRMWARE("amdgpu/polaris12_k_smc.bin");
  51 MODULE_FIRMWARE("amdgpu/vegam_smc.bin");
  52 MODULE_FIRMWARE("amdgpu/vega10_smc.bin");
  53 MODULE_FIRMWARE("amdgpu/vega10_acg_smc.bin");
  54 MODULE_FIRMWARE("amdgpu/vega12_smc.bin");
  55 MODULE_FIRMWARE("amdgpu/vega20_smc.bin");
  56 
  57 int smum_thermal_avfs_enable(struct pp_hwmgr *hwmgr)
  58 {
  59         if (NULL != hwmgr->smumgr_funcs->thermal_avfs_enable)
  60                 return hwmgr->smumgr_funcs->thermal_avfs_enable(hwmgr);
  61 
  62         return 0;
  63 }
  64 
  65 int smum_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
  66 {
  67         if (NULL != hwmgr->smumgr_funcs->thermal_setup_fan_table)
  68                 return hwmgr->smumgr_funcs->thermal_setup_fan_table(hwmgr);
  69 
  70         return 0;
  71 }
  72 
  73 int smum_update_sclk_threshold(struct pp_hwmgr *hwmgr)
  74 {
  75 
  76         if (NULL != hwmgr->smumgr_funcs->update_sclk_threshold)
  77                 return hwmgr->smumgr_funcs->update_sclk_threshold(hwmgr);
  78 
  79         return 0;
  80 }
  81 
  82 int smum_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type)
  83 {
  84 
  85         if (NULL != hwmgr->smumgr_funcs->update_smc_table)
  86                 return hwmgr->smumgr_funcs->update_smc_table(hwmgr, type);
  87 
  88         return 0;
  89 }
  90 
  91 uint32_t smum_get_offsetof(struct pp_hwmgr *hwmgr, uint32_t type, uint32_t member)
  92 {
  93         if (NULL != hwmgr->smumgr_funcs->get_offsetof)
  94                 return hwmgr->smumgr_funcs->get_offsetof(type, member);
  95 
  96         return 0;
  97 }
  98 
  99 int smum_process_firmware_header(struct pp_hwmgr *hwmgr)
 100 {
 101         if (NULL != hwmgr->smumgr_funcs->process_firmware_header)
 102                 return hwmgr->smumgr_funcs->process_firmware_header(hwmgr);
 103         return 0;
 104 }
 105 
 106 uint32_t smum_get_argument(struct pp_hwmgr *hwmgr)
 107 {
 108         if (NULL != hwmgr->smumgr_funcs->get_argument)
 109                 return hwmgr->smumgr_funcs->get_argument(hwmgr);
 110 
 111         return 0;
 112 }
 113 
 114 uint32_t smum_get_mac_definition(struct pp_hwmgr *hwmgr, uint32_t value)
 115 {
 116         if (NULL != hwmgr->smumgr_funcs->get_mac_definition)
 117                 return hwmgr->smumgr_funcs->get_mac_definition(value);
 118 
 119         return 0;
 120 }
 121 
 122 int smum_download_powerplay_table(struct pp_hwmgr *hwmgr, void **table)
 123 {
 124         if (NULL != hwmgr->smumgr_funcs->download_pptable_settings)
 125                 return hwmgr->smumgr_funcs->download_pptable_settings(hwmgr,
 126                                                                         table);
 127         return 0;
 128 }
 129 
 130 int smum_upload_powerplay_table(struct pp_hwmgr *hwmgr)
 131 {
 132         if (NULL != hwmgr->smumgr_funcs->upload_pptable_settings)
 133                 return hwmgr->smumgr_funcs->upload_pptable_settings(hwmgr);
 134 
 135         return 0;
 136 }
 137 
 138 int smum_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg)
 139 {
 140         if (hwmgr == NULL || hwmgr->smumgr_funcs->send_msg_to_smc == NULL)
 141                 return -EINVAL;
 142 
 143         return hwmgr->smumgr_funcs->send_msg_to_smc(hwmgr, msg);
 144 }
 145 
 146 int smum_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr,
 147                                         uint16_t msg, uint32_t parameter)
 148 {
 149         if (hwmgr == NULL ||
 150                 hwmgr->smumgr_funcs->send_msg_to_smc_with_parameter == NULL)
 151                 return -EINVAL;
 152         return hwmgr->smumgr_funcs->send_msg_to_smc_with_parameter(
 153                                                 hwmgr, msg, parameter);
 154 }
 155 
 156 int smum_init_smc_table(struct pp_hwmgr *hwmgr)
 157 {
 158         if (NULL != hwmgr->smumgr_funcs->init_smc_table)
 159                 return hwmgr->smumgr_funcs->init_smc_table(hwmgr);
 160 
 161         return 0;
 162 }
 163 
 164 int smum_populate_all_graphic_levels(struct pp_hwmgr *hwmgr)
 165 {
 166         if (NULL != hwmgr->smumgr_funcs->populate_all_graphic_levels)
 167                 return hwmgr->smumgr_funcs->populate_all_graphic_levels(hwmgr);
 168 
 169         return 0;
 170 }
 171 
 172 int smum_populate_all_memory_levels(struct pp_hwmgr *hwmgr)
 173 {
 174         if (NULL != hwmgr->smumgr_funcs->populate_all_memory_levels)
 175                 return hwmgr->smumgr_funcs->populate_all_memory_levels(hwmgr);
 176 
 177         return 0;
 178 }
 179 
 180 /*this interface is needed by island ci/vi */
 181 int smum_initialize_mc_reg_table(struct pp_hwmgr *hwmgr)
 182 {
 183         if (NULL != hwmgr->smumgr_funcs->initialize_mc_reg_table)
 184                 return hwmgr->smumgr_funcs->initialize_mc_reg_table(hwmgr);
 185 
 186         return 0;
 187 }
 188 
 189 bool smum_is_dpm_running(struct pp_hwmgr *hwmgr)
 190 {
 191         if (NULL != hwmgr->smumgr_funcs->is_dpm_running)
 192                 return hwmgr->smumgr_funcs->is_dpm_running(hwmgr);
 193 
 194         return true;
 195 }
 196 
 197 bool smum_is_hw_avfs_present(struct pp_hwmgr *hwmgr)
 198 {
 199         if (hwmgr->smumgr_funcs->is_hw_avfs_present)
 200                 return hwmgr->smumgr_funcs->is_hw_avfs_present(hwmgr);
 201 
 202         return false;
 203 }
 204 
 205 int smum_update_dpm_settings(struct pp_hwmgr *hwmgr, void *profile_setting)
 206 {
 207         if (hwmgr->smumgr_funcs->update_dpm_settings)
 208                 return hwmgr->smumgr_funcs->update_dpm_settings(hwmgr, profile_setting);
 209 
 210         return -EINVAL;
 211 }
 212 
 213 int smum_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table, uint16_t table_id, bool rw)
 214 {
 215         if (hwmgr->smumgr_funcs->smc_table_manager)
 216                 return hwmgr->smumgr_funcs->smc_table_manager(hwmgr, table, table_id, rw);
 217 
 218         return -EINVAL;
 219 }