This source file includes following definitions.
- vega12_get_current_rpm
- vega12_fan_ctrl_get_fan_speed_info
- vega12_fan_ctrl_get_fan_speed_rpm
- vega12_enable_fan_control_feature
- vega12_disable_fan_control_feature
- vega12_fan_ctrl_start_smc_fan_control
- vega12_fan_ctrl_stop_smc_fan_control
- vega12_fan_ctrl_reset_fan_speed_to_default
- vega12_thermal_get_temperature
- vega12_thermal_set_temperature_range
- vega12_thermal_enable_alert
- vega12_thermal_disable_alert
- vega12_thermal_stop_thermal_controller
- vega12_thermal_setup_fan_table
- vega12_thermal_start_smc_fan_control
- vega12_start_thermal_controller
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24 #include "vega12_thermal.h"
25 #include "vega12_hwmgr.h"
26 #include "vega12_smumgr.h"
27 #include "vega12_ppsmc.h"
28 #include "vega12_inc.h"
29 #include "soc15_common.h"
30 #include "pp_debug.h"
31
32 static int vega12_get_current_rpm(struct pp_hwmgr *hwmgr, uint32_t *current_rpm)
33 {
34 PP_ASSERT_WITH_CODE(!smum_send_msg_to_smc(hwmgr,
35 PPSMC_MSG_GetCurrentRpm),
36 "Attempt to get current RPM from SMC Failed!",
37 return -EINVAL);
38 *current_rpm = smum_get_argument(hwmgr);
39
40 return 0;
41 }
42
43 int vega12_fan_ctrl_get_fan_speed_info(struct pp_hwmgr *hwmgr,
44 struct phm_fan_speed_info *fan_speed_info)
45 {
46 memset(fan_speed_info, 0, sizeof(*fan_speed_info));
47 fan_speed_info->supports_percent_read = false;
48 fan_speed_info->supports_percent_write = false;
49 fan_speed_info->supports_rpm_read = true;
50 fan_speed_info->supports_rpm_write = true;
51
52 return 0;
53 }
54
55 int vega12_fan_ctrl_get_fan_speed_rpm(struct pp_hwmgr *hwmgr, uint32_t *speed)
56 {
57 *speed = 0;
58
59 return vega12_get_current_rpm(hwmgr, speed);
60 }
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67
68
69 static int vega12_enable_fan_control_feature(struct pp_hwmgr *hwmgr)
70 {
71 #if 0
72 struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
73
74 if (data->smu_features[GNLD_FAN_CONTROL].supported) {
75 PP_ASSERT_WITH_CODE(!vega12_enable_smc_features(
76 hwmgr, true,
77 data->smu_features[GNLD_FAN_CONTROL].
78 smu_feature_bitmap),
79 "Attempt to Enable FAN CONTROL feature Failed!",
80 return -1);
81 data->smu_features[GNLD_FAN_CONTROL].enabled = true;
82 }
83 #endif
84 return 0;
85 }
86
87 static int vega12_disable_fan_control_feature(struct pp_hwmgr *hwmgr)
88 {
89 #if 0
90 struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
91
92 if (data->smu_features[GNLD_FAN_CONTROL].supported) {
93 PP_ASSERT_WITH_CODE(!vega12_enable_smc_features(
94 hwmgr, false,
95 data->smu_features[GNLD_FAN_CONTROL].
96 smu_feature_bitmap),
97 "Attempt to Enable FAN CONTROL feature Failed!",
98 return -1);
99 data->smu_features[GNLD_FAN_CONTROL].enabled = false;
100 }
101 #endif
102 return 0;
103 }
104
105 int vega12_fan_ctrl_start_smc_fan_control(struct pp_hwmgr *hwmgr)
106 {
107 struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
108
109 if (data->smu_features[GNLD_FAN_CONTROL].supported)
110 PP_ASSERT_WITH_CODE(
111 !vega12_enable_fan_control_feature(hwmgr),
112 "Attempt to Enable SMC FAN CONTROL Feature Failed!",
113 return -1);
114
115 return 0;
116 }
117
118
119 int vega12_fan_ctrl_stop_smc_fan_control(struct pp_hwmgr *hwmgr)
120 {
121 struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
122
123 if (data->smu_features[GNLD_FAN_CONTROL].supported)
124 PP_ASSERT_WITH_CODE(!vega12_disable_fan_control_feature(hwmgr),
125 "Attempt to Disable SMC FAN CONTROL Feature Failed!",
126 return -1);
127
128 return 0;
129 }
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135
136 int vega12_fan_ctrl_reset_fan_speed_to_default(struct pp_hwmgr *hwmgr)
137 {
138 return vega12_fan_ctrl_start_smc_fan_control(hwmgr);
139 }
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145
146 int vega12_thermal_get_temperature(struct pp_hwmgr *hwmgr)
147 {
148 struct amdgpu_device *adev = hwmgr->adev;
149 int temp = 0;
150
151 temp = RREG32_SOC15(THM, 0, mmCG_MULT_THERMAL_STATUS);
152
153 temp = (temp & CG_MULT_THERMAL_STATUS__CTF_TEMP_MASK) >>
154 CG_MULT_THERMAL_STATUS__CTF_TEMP__SHIFT;
155
156 temp = temp & 0x1ff;
157
158 temp *= PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
159 return temp;
160 }
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169
170 static int vega12_thermal_set_temperature_range(struct pp_hwmgr *hwmgr,
171 struct PP_TemperatureRange *range)
172 {
173 struct amdgpu_device *adev = hwmgr->adev;
174 int low = VEGA12_THERMAL_MINIMUM_ALERT_TEMP *
175 PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
176 int high = VEGA12_THERMAL_MAXIMUM_ALERT_TEMP *
177 PP_TEMPERATURE_UNITS_PER_CENTIGRADES;
178 uint32_t val;
179
180 if (low < range->min)
181 low = range->min;
182 if (high > range->max)
183 high = range->max;
184
185 if (low > high)
186 return -EINVAL;
187
188 val = RREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL);
189
190 val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, MAX_IH_CREDIT, 5);
191 val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, THERM_IH_HW_ENA, 1);
192 val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTH, (high / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
193 val = REG_SET_FIELD(val, THM_THERMAL_INT_CTRL, DIG_THERM_INTL, (low / PP_TEMPERATURE_UNITS_PER_CENTIGRADES));
194 val = val & (~THM_THERMAL_INT_CTRL__THERM_TRIGGER_MASK_MASK);
195
196 WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_CTRL, val);
197
198 return 0;
199 }
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205
206 static int vega12_thermal_enable_alert(struct pp_hwmgr *hwmgr)
207 {
208 struct amdgpu_device *adev = hwmgr->adev;
209 uint32_t val = 0;
210
211 val |= (1 << THM_THERMAL_INT_ENA__THERM_INTH_CLR__SHIFT);
212 val |= (1 << THM_THERMAL_INT_ENA__THERM_INTL_CLR__SHIFT);
213 val |= (1 << THM_THERMAL_INT_ENA__THERM_TRIGGER_CLR__SHIFT);
214
215 WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, val);
216
217 return 0;
218 }
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223
224 int vega12_thermal_disable_alert(struct pp_hwmgr *hwmgr)
225 {
226 struct amdgpu_device *adev = hwmgr->adev;
227
228 WREG32_SOC15(THM, 0, mmTHM_THERMAL_INT_ENA, 0);
229
230 return 0;
231 }
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237
238 int vega12_thermal_stop_thermal_controller(struct pp_hwmgr *hwmgr)
239 {
240 int result = vega12_thermal_disable_alert(hwmgr);
241
242 return result;
243 }
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254 int vega12_thermal_setup_fan_table(struct pp_hwmgr *hwmgr)
255 {
256 int ret;
257 struct vega12_hwmgr *data = (struct vega12_hwmgr *)(hwmgr->backend);
258 PPTable_t *table = &(data->smc_state_table.pp_table);
259
260 ret = smum_send_msg_to_smc_with_parameter(hwmgr,
261 PPSMC_MSG_SetFanTemperatureTarget,
262 (uint32_t)table->FanTargetTemperature);
263
264 return ret;
265 }
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275
276 int vega12_thermal_start_smc_fan_control(struct pp_hwmgr *hwmgr)
277 {
278
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281
282
283 if (PP_CAP(PHM_PlatformCaps_MicrocodeFanControl))
284 vega12_fan_ctrl_start_smc_fan_control(hwmgr);
285
286 return 0;
287 }
288
289
290 int vega12_start_thermal_controller(struct pp_hwmgr *hwmgr,
291 struct PP_TemperatureRange *range)
292 {
293 int ret = 0;
294
295 if (range == NULL)
296 return -EINVAL;
297
298 ret = vega12_thermal_set_temperature_range(hwmgr, range);
299 if (ret)
300 return -EINVAL;
301
302 vega12_thermal_enable_alert(hwmgr);
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308 ret = vega12_thermal_setup_fan_table(hwmgr);
309 if (ret)
310 return -EINVAL;
311
312 vega12_thermal_start_smc_fan_control(hwmgr);
313
314 return 0;
315 };