1 /*
2 * Copyright 2018 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22 #ifndef SMU_11_0_PPTABLE_H
23 #define SMU_11_0_PPTABLE_H
24
25
26 #define SMU_11_0_TABLE_FORMAT_REVISION 12
27
28 //// POWERPLAYTABLE::ulPlatformCaps
29 #define SMU_11_0_PP_PLATFORM_CAP_POWERPLAY 0x1
30 #define SMU_11_0_PP_PLATFORM_CAP_SBIOSPOWERSOURCE 0x2
31 #define SMU_11_0_PP_PLATFORM_CAP_HARDWAREDC 0x4
32 #define SMU_11_0_PP_PLATFORM_CAP_BACO 0x8
33 #define SMU_11_0_PP_PLATFORM_CAP_MACO 0x10
34 #define SMU_11_0_PP_PLATFORM_CAP_SHADOWPSTATE 0x20
35
36 // SMU_11_0_PP_THERMALCONTROLLER - Thermal Controller Type
37 #define SMU_11_0_PP_THERMALCONTROLLER_NONE 0
38
39 #define SMU_11_0_PP_OVERDRIVE_VERSION 0x0800
40 #define SMU_11_0_PP_POWERSAVINGCLOCK_VERSION 0x0100
41
42 enum SMU_11_0_ODFEATURE_ID {
43 SMU_11_0_ODFEATURE_GFXCLK_LIMITS = 1 << 0, //GFXCLK Limit feature
44 SMU_11_0_ODFEATURE_GFXCLK_CURVE = 1 << 1, //GFXCLK Curve feature
45 SMU_11_0_ODFEATURE_UCLK_MAX = 1 << 2, //UCLK Limit feature
46 SMU_11_0_ODFEATURE_POWER_LIMIT = 1 << 3, //Power Limit feature
47 SMU_11_0_ODFEATURE_FAN_ACOUSTIC_LIMIT = 1 << 4, //Fan Acoustic RPM feature
48 SMU_11_0_ODFEATURE_FAN_SPEED_MIN = 1 << 5, //Minimum Fan Speed feature
49 SMU_11_0_ODFEATURE_TEMPERATURE_FAN = 1 << 6, //Fan Target Temperature Limit feature
50 SMU_11_0_ODFEATURE_TEMPERATURE_SYSTEM = 1 << 7, //Operating Temperature Limit feature
51 SMU_11_0_ODFEATURE_MEMORY_TIMING_TUNE = 1 << 8, //AC Timing Tuning feature
52 SMU_11_0_ODFEATURE_FAN_ZERO_RPM_CONTROL = 1 << 9, //Zero RPM feature
53 SMU_11_0_ODFEATURE_AUTO_UV_ENGINE = 1 << 10, //Auto Under Volt GFXCLK feature
54 SMU_11_0_ODFEATURE_AUTO_OC_ENGINE = 1 << 11, //Auto Over Clock GFXCLK feature
55 SMU_11_0_ODFEATURE_AUTO_OC_MEMORY = 1 << 12, //Auto Over Clock MCLK feature
56 SMU_11_0_ODFEATURE_FAN_CURVE = 1 << 13, //VICTOR TODO
57 SMU_11_0_ODFEATURE_COUNT = 14,
58 };
59 #define SMU_11_0_MAX_ODFEATURE 32 //Maximum Number of OD Features
60
61 enum SMU_11_0_ODSETTING_ID {
62 SMU_11_0_ODSETTING_GFXCLKFMAX = 0,
63 SMU_11_0_ODSETTING_GFXCLKFMIN,
64 SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P1,
65 SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P1,
66 SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P2,
67 SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P2,
68 SMU_11_0_ODSETTING_VDDGFXCURVEFREQ_P3,
69 SMU_11_0_ODSETTING_VDDGFXCURVEVOLTAGE_P3,
70 SMU_11_0_ODSETTING_UCLKFMAX,
71 SMU_11_0_ODSETTING_POWERPERCENTAGE,
72 SMU_11_0_ODSETTING_FANRPMMIN,
73 SMU_11_0_ODSETTING_FANRPMACOUSTICLIMIT,
74 SMU_11_0_ODSETTING_FANTARGETTEMPERATURE,
75 SMU_11_0_ODSETTING_OPERATINGTEMPMAX,
76 SMU_11_0_ODSETTING_ACTIMING,
77 SMU_11_0_ODSETTING_FAN_ZERO_RPM_CONTROL,
78 SMU_11_0_ODSETTING_AUTOUVENGINE,
79 SMU_11_0_ODSETTING_AUTOOCENGINE,
80 SMU_11_0_ODSETTING_AUTOOCMEMORY,
81 SMU_11_0_ODSETTING_COUNT,
82 };
83 #define SMU_11_0_MAX_ODSETTING 32 //Maximum Number of ODSettings
84
85 struct smu_11_0_overdrive_table
86 {
87 uint8_t revision; //Revision = SMU_11_0_PP_OVERDRIVE_VERSION
88 uint8_t reserve[3]; //Zero filled field reserved for future use
89 uint32_t feature_count; //Total number of supported features
90 uint32_t setting_count; //Total number of supported settings
91 uint8_t cap[SMU_11_0_MAX_ODFEATURE]; //OD feature support flags
92 uint32_t max[SMU_11_0_MAX_ODSETTING]; //default maximum settings
93 uint32_t min[SMU_11_0_MAX_ODSETTING]; //default minimum settings
94 } __attribute__((packed));
95
96 enum SMU_11_0_PPCLOCK_ID {
97 SMU_11_0_PPCLOCK_GFXCLK = 0,
98 SMU_11_0_PPCLOCK_VCLK,
99 SMU_11_0_PPCLOCK_DCLK,
100 SMU_11_0_PPCLOCK_ECLK,
101 SMU_11_0_PPCLOCK_SOCCLK,
102 SMU_11_0_PPCLOCK_UCLK,
103 SMU_11_0_PPCLOCK_DCEFCLK,
104 SMU_11_0_PPCLOCK_DISPCLK,
105 SMU_11_0_PPCLOCK_PIXCLK,
106 SMU_11_0_PPCLOCK_PHYCLK,
107 SMU_11_0_PPCLOCK_COUNT,
108 };
109 #define SMU_11_0_MAX_PPCLOCK 16 //Maximum Number of PP Clocks
110
111 struct smu_11_0_power_saving_clock_table
112 {
113 uint8_t revision; //Revision = SMU_11_0_PP_POWERSAVINGCLOCK_VERSION
114 uint8_t reserve[3]; //Zero filled field reserved for future use
115 uint32_t count; //power_saving_clock_count = SMU_11_0_PPCLOCK_COUNT
116 uint32_t max[SMU_11_0_MAX_PPCLOCK]; //PowerSavingClock Mode Clock Maximum array In MHz
117 uint32_t min[SMU_11_0_MAX_PPCLOCK]; //PowerSavingClock Mode Clock Minimum array In MHz
118 } __attribute__((packed));
119
120 struct smu_11_0_powerplay_table
121 {
122 struct atom_common_table_header header;
123 uint8_t table_revision;
124 uint16_t table_size; //Driver portion table size. The offset to smc_pptable including header size
125 uint32_t golden_pp_id;
126 uint32_t golden_revision;
127 uint16_t format_id;
128 uint32_t platform_caps; //POWERPLAYABLE::ulPlatformCaps
129
130 uint8_t thermal_controller_type; //one of SMU_11_0_PP_THERMALCONTROLLER
131
132 uint16_t small_power_limit1;
133 uint16_t small_power_limit2;
134 uint16_t boost_power_limit;
135 uint16_t od_turbo_power_limit; //Power limit setting for Turbo mode in Performance UI Tuning.
136 uint16_t od_power_save_power_limit; //Power limit setting for PowerSave/Optimal mode in Performance UI Tuning.
137 uint16_t software_shutdown_temp;
138
139 uint16_t reserve[6]; //Zero filled field reserved for future use
140
141 struct smu_11_0_power_saving_clock_table power_saving_clock;
142 struct smu_11_0_overdrive_table overdrive_table;
143
144 PPTable_t smc_pptable; //PPTable_t in smu11_driver_if.h
145 } __attribute__((packed));
146
147 #endif