root/drivers/gpu/drm/amd/powerplay/arcturus_ppt.h

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   1 /*
   2  * Copyright 2019 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  */
  23 #ifndef __ARCTURUS_PPT_H__
  24 #define __ARCTURUS_PPT_H__
  25 
  26 #define ARCTURUS_UMD_PSTATE_GFXCLK_LEVEL         0x3
  27 #define ARCTURUS_UMD_PSTATE_SOCCLK_LEVEL         0x3
  28 #define ARCTURUS_UMD_PSTATE_MCLK_LEVEL           0x2
  29 
  30 #define MAX_DPM_NUMBER 16
  31 #define MAX_PCIE_CONF 2
  32 
  33 struct arcturus_dpm_level {
  34         bool            enabled;
  35         uint32_t        value;
  36         uint32_t        param1;
  37 };
  38 
  39 struct arcturus_dpm_state {
  40         uint32_t  soft_min_level;
  41         uint32_t  soft_max_level;
  42         uint32_t  hard_min_level;
  43         uint32_t  hard_max_level;
  44 };
  45 
  46 struct arcturus_single_dpm_table {
  47         uint32_t                count;
  48         struct arcturus_dpm_state dpm_state;
  49         struct arcturus_dpm_level dpm_levels[MAX_DPM_NUMBER];
  50 };
  51 
  52 struct arcturus_pcie_table {
  53         uint16_t count;
  54         uint8_t  pcie_gen[MAX_PCIE_CONF];
  55         uint8_t  pcie_lane[MAX_PCIE_CONF];
  56         uint32_t lclk[MAX_PCIE_CONF];
  57 };
  58 
  59 struct arcturus_dpm_table {
  60         struct arcturus_single_dpm_table  soc_table;
  61         struct arcturus_single_dpm_table  gfx_table;
  62         struct arcturus_single_dpm_table  mem_table;
  63         struct arcturus_single_dpm_table  eclk_table;
  64         struct arcturus_single_dpm_table  vclk_table;
  65         struct arcturus_single_dpm_table  dclk_table;
  66         struct arcturus_single_dpm_table  fclk_table;
  67         struct arcturus_pcie_table        pcie_table;
  68 };
  69 
  70 extern void arcturus_set_ppt_funcs(struct smu_context *smu);
  71 
  72 #endif

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