root/drivers/gpu/drm/tegra/mipi-phy.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: GPL-2.0-only */
   2 /*
   3  * Copyright (C) 2013 NVIDIA Corporation
   4  */
   5 
   6 #ifndef DRM_TEGRA_MIPI_PHY_H
   7 #define DRM_TEGRA_MIPI_PHY_H
   8 
   9 /*
  10  * D-PHY timing parameters
  11  *
  12  * A detailed description of these parameters can be found in the  MIPI
  13  * Alliance Specification for D-PHY, Section 5.9 "Global Operation Timing
  14  * Parameters".
  15  *
  16  * All parameters are specified in nanoseconds.
  17  */
  18 struct mipi_dphy_timing {
  19         unsigned int clkmiss;
  20         unsigned int clkpost;
  21         unsigned int clkpre;
  22         unsigned int clkprepare;
  23         unsigned int clksettle;
  24         unsigned int clktermen;
  25         unsigned int clktrail;
  26         unsigned int clkzero;
  27         unsigned int dtermen;
  28         unsigned int eot;
  29         unsigned int hsexit;
  30         unsigned int hsprepare;
  31         unsigned int hszero;
  32         unsigned int hssettle;
  33         unsigned int hsskip;
  34         unsigned int hstrail;
  35         unsigned int init;
  36         unsigned int lpx;
  37         unsigned int taget;
  38         unsigned int tago;
  39         unsigned int tasure;
  40         unsigned int wakeup;
  41 };
  42 
  43 int mipi_dphy_timing_get_default(struct mipi_dphy_timing *timing,
  44                                  unsigned long period);
  45 int mipi_dphy_timing_validate(struct mipi_dphy_timing *timing,
  46                               unsigned long period);
  47 
  48 #endif