root/drivers/gpu/drm/mga/mga_irq.c

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DEFINITIONS

This source file includes following definitions.
  1. mga_get_vblank_counter
  2. mga_driver_irq_handler
  3. mga_enable_vblank
  4. mga_disable_vblank
  5. mga_driver_fence_wait
  6. mga_driver_irq_preinstall
  7. mga_driver_irq_postinstall
  8. mga_driver_irq_uninstall

   1 /* mga_irq.c -- IRQ handling for radeon -*- linux-c -*-
   2  */
   3 /*
   4  * Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
   5  *
   6  * The Weather Channel (TM) funded Tungsten Graphics to develop the
   7  * initial release of the Radeon 8500 driver under the XFree86 license.
   8  * This notice must be preserved.
   9  *
  10  * Permission is hereby granted, free of charge, to any person obtaining a
  11  * copy of this software and associated documentation files (the "Software"),
  12  * to deal in the Software without restriction, including without limitation
  13  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  14  * and/or sell copies of the Software, and to permit persons to whom the
  15  * Software is furnished to do so, subject to the following conditions:
  16  *
  17  * The above copyright notice and this permission notice (including the next
  18  * paragraph) shall be included in all copies or substantial portions of the
  19  * Software.
  20  *
  21  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  22  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  23  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  24  * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  25  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  26  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  27  * DEALINGS IN THE SOFTWARE.
  28  *
  29  * Authors:
  30  *    Keith Whitwell <keith@tungstengraphics.com>
  31  *    Eric Anholt <anholt@FreeBSD.org>
  32  */
  33 
  34 #include "mga_drv.h"
  35 
  36 u32 mga_get_vblank_counter(struct drm_device *dev, unsigned int pipe)
  37 {
  38         const drm_mga_private_t *const dev_priv =
  39                 (drm_mga_private_t *) dev->dev_private;
  40 
  41         if (pipe != 0)
  42                 return 0;
  43 
  44         return atomic_read(&dev_priv->vbl_received);
  45 }
  46 
  47 
  48 irqreturn_t mga_driver_irq_handler(int irq, void *arg)
  49 {
  50         struct drm_device *dev = (struct drm_device *) arg;
  51         drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
  52         int status;
  53         int handled = 0;
  54 
  55         status = MGA_READ(MGA_STATUS);
  56 
  57         /* VBLANK interrupt */
  58         if (status & MGA_VLINEPEN) {
  59                 MGA_WRITE(MGA_ICLEAR, MGA_VLINEICLR);
  60                 atomic_inc(&dev_priv->vbl_received);
  61                 drm_handle_vblank(dev, 0);
  62                 handled = 1;
  63         }
  64 
  65         /* SOFTRAP interrupt */
  66         if (status & MGA_SOFTRAPEN) {
  67                 const u32 prim_start = MGA_READ(MGA_PRIMADDRESS);
  68                 const u32 prim_end = MGA_READ(MGA_PRIMEND);
  69 
  70 
  71                 MGA_WRITE(MGA_ICLEAR, MGA_SOFTRAPICLR);
  72 
  73                 /* In addition to clearing the interrupt-pending bit, we
  74                  * have to write to MGA_PRIMEND to re-start the DMA operation.
  75                  */
  76                 if ((prim_start & ~0x03) != (prim_end & ~0x03))
  77                         MGA_WRITE(MGA_PRIMEND, prim_end);
  78 
  79                 atomic_inc(&dev_priv->last_fence_retired);
  80                 wake_up(&dev_priv->fence_queue);
  81                 handled = 1;
  82         }
  83 
  84         if (handled)
  85                 return IRQ_HANDLED;
  86         return IRQ_NONE;
  87 }
  88 
  89 int mga_enable_vblank(struct drm_device *dev, unsigned int pipe)
  90 {
  91         drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
  92 
  93         if (pipe != 0) {
  94                 DRM_ERROR("tried to enable vblank on non-existent crtc %u\n",
  95                           pipe);
  96                 return 0;
  97         }
  98 
  99         MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN);
 100         return 0;
 101 }
 102 
 103 
 104 void mga_disable_vblank(struct drm_device *dev, unsigned int pipe)
 105 {
 106         if (pipe != 0) {
 107                 DRM_ERROR("tried to disable vblank on non-existent crtc %u\n",
 108                           pipe);
 109         }
 110 
 111         /* Do *NOT* disable the vertical refresh interrupt.  MGA doesn't have
 112          * a nice hardware counter that tracks the number of refreshes when
 113          * the interrupt is disabled, and the kernel doesn't know the refresh
 114          * rate to calculate an estimate.
 115          */
 116         /* MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN); */
 117 }
 118 
 119 void mga_driver_fence_wait(struct drm_device *dev, unsigned int *sequence)
 120 {
 121         drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
 122         unsigned int cur_fence;
 123 
 124         /* Assume that the user has missed the current sequence number
 125          * by about a day rather than she wants to wait for years
 126          * using fences.
 127          */
 128         wait_event_timeout(dev_priv->fence_queue,
 129                     (((cur_fence = atomic_read(&dev_priv->last_fence_retired))
 130                       - *sequence) <= (1 << 23)),
 131                     msecs_to_jiffies(3000));
 132 
 133         *sequence = cur_fence;
 134 }
 135 
 136 void mga_driver_irq_preinstall(struct drm_device *dev)
 137 {
 138         drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
 139 
 140         /* Disable *all* interrupts */
 141         MGA_WRITE(MGA_IEN, 0);
 142         /* Clear bits if they're already high */
 143         MGA_WRITE(MGA_ICLEAR, ~0);
 144 }
 145 
 146 int mga_driver_irq_postinstall(struct drm_device *dev)
 147 {
 148         drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
 149 
 150         init_waitqueue_head(&dev_priv->fence_queue);
 151 
 152         /* Turn on soft trap interrupt.  Vertical blank interrupts are enabled
 153          * in mga_enable_vblank.
 154          */
 155         MGA_WRITE(MGA_IEN, MGA_SOFTRAPEN);
 156         return 0;
 157 }
 158 
 159 void mga_driver_irq_uninstall(struct drm_device *dev)
 160 {
 161         drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
 162         if (!dev_priv)
 163                 return;
 164 
 165         /* Disable *all* interrupts */
 166         MGA_WRITE(MGA_IEN, 0);
 167 
 168         dev->irq_enabled = false;
 169 }

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