root/drivers/gpu/drm/nouveau/nvkm/engine/disp/wimmgv100.c

DEFINITIONS

1. gv100_disp_wimm_intr
2. gv100_disp_wimm_new_
3. gv100_disp_wimm_new

   1 /*
   2  * Copyright 2018 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  */
  22 #include "channv50.h"
  23 
  24 #include <core/client.h>
  25 
  26 #include <nvif/clc37b.h>
  27 #include <nvif/unpack.h>
  28 
  29 static void
  30 gv100_disp_wimm_intr(struct nv50_disp_chan *chan, bool en)
  31 {
  32         struct nvkm_device *device = chan->disp->base.engine.subdev.device;
  33         const u32 mask = 0x00000001 << chan->head;
  34         const u32 data = en ? mask : 0;
  35         nvkm_mask(device, 0x611da8, mask, data);
  36 }
  37 
  38 const struct nv50_disp_chan_func
  39 gv100_disp_wimm = {
  40         .init = gv100_disp_dmac_init,
  41         .fini = gv100_disp_dmac_fini,
  42         .intr = gv100_disp_wimm_intr,
  43         .user = gv100_disp_chan_user,
  44 };
  45 
  46 static int
  47 gv100_disp_wimm_new_(const struct nv50_disp_chan_func *func,
  48                      const struct nv50_disp_chan_mthd *mthd,
  49                      struct nv50_disp *disp, int chid,
  50                      const struct nvkm_oclass *oclass, void *argv, u32 argc,
  51                      struct nvkm_object **pobject)
  52 {
  53         union {
  54                 struct nvc37b_window_imm_channel_dma_v0 v0;
  55         } *args = argv;
  56         struct nvkm_object *parent = oclass->parent;
  57         int wndw, ret = -ENOSYS;
  58         u64 push;
  59 
  60         nvif_ioctl(parent, "create window imm channel dma size %d\n", argc);
  61         if (!(ret = nvif_unpack(ret, &argv, &argc, args->v0, 0, 0, false))) {
  62                 nvif_ioctl(parent, "create window imm channel dma vers %d "
  63                                    "pushbuf %016llx index %d\n",
  64                            args->v0.version, args->v0.pushbuf, args->v0.index);
  65                 if (!(disp->wndw.mask & BIT(args->v0.index)))
  66                         return -EINVAL;
  67                 push = args->v0.pushbuf;
  68                 wndw = args->v0.index;
  69         } else
  70                 return ret;
  71 
  72         return nv50_disp_dmac_new_(func, mthd, disp, chid + wndw,
  73                                    wndw, push, oclass, pobject);
  74 }
  75 
  76 int
  77 gv100_disp_wimm_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
  78                     struct nv50_disp *disp, struct nvkm_object **pobject)
  79 {
  80         return gv100_disp_wimm_new_(&gv100_disp_wimm, NULL, disp, 33,
  81                                     oclass, argv, argc, pobject);
  82 }