root/drivers/gpu/drm/nouveau/nvkm/engine/disp/headnv50.c

DEFINITIONS

1. nv50_head_vblank_put
2. nv50_head_vblank_get
3. nv50_head_rgclk
4. nv50_head_rgpos
5. nv50_head_state
6. nv50_head_new
7. nv50_head_cnt

   1 /*
   2  * Copyright 2017 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs <bskeggs@redhat.com>
  23  */
  24 #include "head.h"
  25 
  26 static void
  27 nv50_head_vblank_put(struct nvkm_head *head)
  28 {
  29         struct nvkm_device *device = head->disp->engine.subdev.device;
  30         nvkm_mask(device, 0x61002c, (4 << head->id), 0);
  31 }
  32 
  33 static void
  34 nv50_head_vblank_get(struct nvkm_head *head)
  35 {
  36         struct nvkm_device *device = head->disp->engine.subdev.device;
  37         nvkm_mask(device, 0x61002c, (4 << head->id), (4 << head->id));
  38 }
  39 
  40 static void
  41 nv50_head_rgclk(struct nvkm_head *head, int div)
  42 {
  43         struct nvkm_device *device = head->disp->engine.subdev.device;
  44         nvkm_mask(device, 0x614200 + (head->id * 0x800), 0x0000000f, div);
  45 }
  46 
  47 void
  48 nv50_head_rgpos(struct nvkm_head *head, u16 *hline, u16 *vline)
  49 {
  50         struct nvkm_device *device = head->disp->engine.subdev.device;
  51         const u32 hoff = head->id * 0x800;
  52         /* vline read locks hline. */
  53         *vline = nvkm_rd32(device, 0x616340 + hoff) & 0x0000ffff;
  54         *hline = nvkm_rd32(device, 0x616344 + hoff) & 0x0000ffff;
  55 }
  56 
  57 static void
  58 nv50_head_state(struct nvkm_head *head, struct nvkm_head_state *state)
  59 {
  60         struct nvkm_device *device = head->disp->engine.subdev.device;
  61         const u32 hoff = head->id * 0x540 + (state == &head->arm) * 4;
  62         u32 data;
  63 
  64         data = nvkm_rd32(device, 0x610ae8 + hoff);
  65         state->vblanke = (data & 0xffff0000) >> 16;
  66         state->hblanke = (data & 0x0000ffff);
  67         data = nvkm_rd32(device, 0x610af0 + hoff);
  68         state->vblanks = (data & 0xffff0000) >> 16;
  69         state->hblanks = (data & 0x0000ffff);
  70         data = nvkm_rd32(device, 0x610af8 + hoff);
  71         state->vtotal = (data & 0xffff0000) >> 16;
  72         state->htotal = (data & 0x0000ffff);
  73         data = nvkm_rd32(device, 0x610b00 + hoff);
  74         state->vsynce = (data & 0xffff0000) >> 16;
  75         state->hsynce = (data & 0x0000ffff);
  76         state->hz = (nvkm_rd32(device, 0x610ad0 + hoff) & 0x003fffff) * 1000;
  77 }
  78 
  79 static const struct nvkm_head_func
  80 nv50_head = {
  81         .state = nv50_head_state,
  82         .rgpos = nv50_head_rgpos,
  83         .rgclk = nv50_head_rgclk,
  84         .vblank_get = nv50_head_vblank_get,
  85         .vblank_put = nv50_head_vblank_put,
  86 };
  87 
  88 int
  89 nv50_head_new(struct nvkm_disp *disp, int id)
  90 {
  91         return nvkm_head_new_(&nv50_head, disp, id);
  92 }
  93 
  94 int
  95 nv50_head_cnt(struct nvkm_disp *disp, unsigned long *pmask)
  96 {
  97         *pmask = 3;
  98         return 2;
  99 }