root/drivers/gpu/drm/nouveau/nvkm/engine/disp/coreg94.c

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DEFINITIONS

This source file includes following definitions.
  1. g94_disp_core_new

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24 #include "channv50.h"
  25 
  26 static const struct nv50_disp_mthd_list
  27 g94_disp_core_mthd_sor = {
  28         .mthd = 0x0040,
  29         .addr = 0x000008,
  30         .data = {
  31                 { 0x0600, 0x610794 },
  32                 {}
  33         }
  34 };
  35 
  36 const struct nv50_disp_chan_mthd
  37 g94_disp_core_mthd = {
  38         .name = "Core",
  39         .addr = 0x000000,
  40         .prev = 0x000004,
  41         .data = {
  42                 { "Global", 1, &nv50_disp_core_mthd_base },
  43                 {    "DAC", 3, &g84_disp_core_mthd_dac },
  44                 {    "SOR", 4, &g94_disp_core_mthd_sor },
  45                 {   "PIOR", 3, &nv50_disp_core_mthd_pior },
  46                 {   "HEAD", 2, &g84_disp_core_mthd_head },
  47                 {}
  48         }
  49 };
  50 
  51 int
  52 g94_disp_core_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
  53                   struct nv50_disp *disp, struct nvkm_object **pobject)
  54 {
  55         return nv50_disp_core_new_(&nv50_disp_core_func, &g94_disp_core_mthd,
  56                                    disp, 0, oclass, argv, argc, pobject);
  57 }

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