This source file includes following definitions.
- gf119_head_vblank_put
- gf119_head_vblank_get
- gf119_head_rgclk
- gf119_head_state
- gf119_head_new
- gf119_head_cnt
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  24 #include "head.h"
  25 
  26 static void
  27 gf119_head_vblank_put(struct nvkm_head *head)
  28 {
  29         struct nvkm_device *device = head->disp->engine.subdev.device;
  30         const u32 hoff = head->id * 0x800;
  31         nvkm_mask(device, 0x6100c0 + hoff, 0x00000001, 0x00000000);
  32 }
  33 
  34 static void
  35 gf119_head_vblank_get(struct nvkm_head *head)
  36 {
  37         struct nvkm_device *device = head->disp->engine.subdev.device;
  38         const u32 hoff = head->id * 0x800;
  39         nvkm_mask(device, 0x6100c0 + hoff, 0x00000001, 0x00000001);
  40 }
  41 
  42 void
  43 gf119_head_rgclk(struct nvkm_head *head, int div)
  44 {
  45         struct nvkm_device *device = head->disp->engine.subdev.device;
  46         nvkm_mask(device, 0x612200 + (head->id * 0x800), 0x0000000f, div);
  47 }
  48 
  49 static void
  50 gf119_head_state(struct nvkm_head *head, struct nvkm_head_state *state)
  51 {
  52         struct nvkm_device *device = head->disp->engine.subdev.device;
  53         const u32 hoff = (state == &head->asy) * 0x20000 + head->id * 0x300;
  54         u32 data;
  55 
  56         data = nvkm_rd32(device, 0x640414 + hoff);
  57         state->vtotal = (data & 0xffff0000) >> 16;
  58         state->htotal = (data & 0x0000ffff);
  59         data = nvkm_rd32(device, 0x640418 + hoff);
  60         state->vsynce = (data & 0xffff0000) >> 16;
  61         state->hsynce = (data & 0x0000ffff);
  62         data = nvkm_rd32(device, 0x64041c + hoff);
  63         state->vblanke = (data & 0xffff0000) >> 16;
  64         state->hblanke = (data & 0x0000ffff);
  65         data = nvkm_rd32(device, 0x640420 + hoff);
  66         state->vblanks = (data & 0xffff0000) >> 16;
  67         state->hblanks = (data & 0x0000ffff);
  68         state->hz = nvkm_rd32(device, 0x640450 + hoff);
  69 
  70         data = nvkm_rd32(device, 0x640404 + hoff);
  71         switch ((data & 0x000003c0) >> 6) {
  72         case 6: state->or.depth = 30; break;
  73         case 5: state->or.depth = 24; break;
  74         case 2: state->or.depth = 18; break;
  75         case 0: state->or.depth = 18; break; 
  76         default:
  77                 state->or.depth = 18;
  78                 WARN_ON(1);
  79                 break;
  80         }
  81 }
  82 
  83 static const struct nvkm_head_func
  84 gf119_head = {
  85         .state = gf119_head_state,
  86         .rgpos = nv50_head_rgpos,
  87         .rgclk = gf119_head_rgclk,
  88         .vblank_get = gf119_head_vblank_get,
  89         .vblank_put = gf119_head_vblank_put,
  90 };
  91 
  92 int
  93 gf119_head_new(struct nvkm_disp *disp, int id)
  94 {
  95         return nvkm_head_new_(&gf119_head, disp, id);
  96 }
  97 
  98 int
  99 gf119_head_cnt(struct nvkm_disp *disp, unsigned long *pmask)
 100 {
 101         struct nvkm_device *device = disp->engine.subdev.device;
 102         *pmask = nvkm_rd32(device, 0x612004) & 0x0000000f;
 103         return nvkm_rd32(device, 0x022448);
 104 }