root/drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgf119.c

DEFINITIONS

1. gf119_disp_dmac_bind
2. gf119_disp_dmac_fini
3. gf119_disp_dmac_init

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24 #include "channv50.h"
  25 
  26 #include <core/ramht.h>
  27 #include <subdev/timer.h>
  28 
  29 int
  30 gf119_disp_dmac_bind(struct nv50_disp_chan *chan,
  31                      struct nvkm_object *object, u32 handle)
  32 {
  33         return nvkm_ramht_insert(chan->disp->ramht, object,
  34                                  chan->chid.user, -9, handle,
  35                                  chan->chid.user << 27 | 0x00000001);
  36 }
  37 
  38 void
  39 gf119_disp_dmac_fini(struct nv50_disp_chan *chan)
  40 {
  41         struct nvkm_subdev *subdev = &chan->disp->base.engine.subdev;
  42         struct nvkm_device *device = subdev->device;
  43         int ctrl = chan->chid.ctrl;
  44         int user = chan->chid.user;
  45 
  46         /* deactivate channel */
  47         nvkm_mask(device, 0x610490 + (ctrl * 0x0010), 0x00001010, 0x00001000);
  48         nvkm_mask(device, 0x610490 + (ctrl * 0x0010), 0x00000003, 0x00000000);
  49         if (nvkm_msec(device, 2000,
  50                 if (!(nvkm_rd32(device, 0x610490 + (ctrl * 0x10)) & 0x001e0000))
  51                         break;
  52         ) < 0) {
  53                 nvkm_error(subdev, "ch %d fini: %08x\n", user,
  54                            nvkm_rd32(device, 0x610490 + (ctrl * 0x10)));
  55         }
  56 }
  57 
  58 static int
  59 gf119_disp_dmac_init(struct nv50_disp_chan *chan)
  60 {
  61         struct nvkm_subdev *subdev = &chan->disp->base.engine.subdev;
  62         struct nvkm_device *device = subdev->device;
  63         int ctrl = chan->chid.ctrl;
  64         int user = chan->chid.user;
  65 
  66         /* initialise channel for dma command submission */
  67         nvkm_wr32(device, 0x610494 + (ctrl * 0x0010), chan->push);
  68         nvkm_wr32(device, 0x610498 + (ctrl * 0x0010), 0x00010000);
  69         nvkm_wr32(device, 0x61049c + (ctrl * 0x0010), 0x00000001);
  70         nvkm_mask(device, 0x610490 + (ctrl * 0x0010), 0x00000010, 0x00000010);
  71         nvkm_wr32(device, 0x640000 + (ctrl * 0x1000), 0x00000000);
  72         nvkm_wr32(device, 0x610490 + (ctrl * 0x0010), 0x00000013);
  73 
  74         /* wait for it to go inactive */
  75         if (nvkm_msec(device, 2000,
  76                 if (!(nvkm_rd32(device, 0x610490 + (ctrl * 0x10)) & 0x80000000))
  77                         break;
  78         ) < 0) {
  79                 nvkm_error(subdev, "ch %d init: %08x\n", user,
  80                            nvkm_rd32(device, 0x610490 + (ctrl * 0x10)));
  81                 return -EBUSY;
  82         }
  83 
  84         return 0;
  85 }
  86 
  87 const struct nv50_disp_chan_func
  88 gf119_disp_dmac_func = {
  89         .init = gf119_disp_dmac_init,
  90         .fini = gf119_disp_dmac_fini,
  91         .intr = gf119_disp_chan_intr,
  92         .user = nv50_disp_chan_user,
  93         .bind = gf119_disp_dmac_bind,
  94 };