This source file includes following definitions.
- gp102_disp_core_init
- gp102_disp_core_new
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24 #include "channv50.h"
25
26 #include <subdev/timer.h>
27
28 static int
29 gp102_disp_core_init(struct nv50_disp_chan *chan)
30 {
31 struct nvkm_subdev *subdev = &chan->disp->base.engine.subdev;
32 struct nvkm_device *device = subdev->device;
33
34
35 nvkm_wr32(device, 0x611494, chan->push);
36 nvkm_wr32(device, 0x611498, 0x00010000);
37 nvkm_wr32(device, 0x61149c, 0x00000001);
38 nvkm_mask(device, 0x610490, 0x00000010, 0x00000010);
39 nvkm_wr32(device, 0x640000, 0x00000000);
40 nvkm_wr32(device, 0x610490, 0x01000013);
41
42
43 if (nvkm_msec(device, 2000,
44 if (!(nvkm_rd32(device, 0x610490) & 0x80000000))
45 break;
46 ) < 0) {
47 nvkm_error(subdev, "core init: %08x\n",
48 nvkm_rd32(device, 0x610490));
49 return -EBUSY;
50 }
51
52 return 0;
53 }
54
55 static const struct nv50_disp_chan_func
56 gp102_disp_core_func = {
57 .init = gp102_disp_core_init,
58 .fini = gf119_disp_core_fini,
59 .intr = gf119_disp_chan_intr,
60 .user = nv50_disp_chan_user,
61 .bind = gf119_disp_dmac_bind,
62 };
63
64 int
65 gp102_disp_core_new(const struct nvkm_oclass *oclass, void *argv, u32 argc,
66 struct nv50_disp *disp, struct nvkm_object **pobject)
67 {
68 return nv50_disp_core_new_(&gp102_disp_core_func, &gk104_disp_core_mthd,
69 disp, 0, oclass, argv, argc, pobject);
70 }