root/drivers/gpu/drm/nouveau/nvkm/engine/disp/nv50.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: MIT */
   2 #ifndef __NV50_DISP_H__
   3 #define __NV50_DISP_H__
   4 #define nv50_disp(p) container_of((p), struct nv50_disp, base)
   5 #include "priv.h"
   6 struct nvkm_head;
   7 
   8 #include <core/enum.h>
   9 
  10 struct nv50_disp {
  11         const struct nv50_disp_func *func;
  12         struct nvkm_disp base;
  13 
  14         struct workqueue_struct *wq;
  15         struct work_struct supervisor;
  16         u32 super;
  17 
  18         struct nvkm_event uevent;
  19 
  20         struct {
  21                 unsigned long mask;
  22                 int nr;
  23         } wndw, head, dac;
  24 
  25         struct {
  26                 unsigned long mask;
  27                 int nr;
  28                 u32 lvdsconf;
  29         } sor;
  30 
  31         struct {
  32                 unsigned long mask;
  33                 int nr;
  34                 u8 type[3];
  35         } pior;
  36 
  37         struct nvkm_gpuobj *inst;
  38         struct nvkm_ramht *ramht;
  39 
  40         struct nv50_disp_chan *chan[81];
  41 };
  42 
  43 void nv50_disp_super_1(struct nv50_disp *);
  44 void nv50_disp_super_1_0(struct nv50_disp *, struct nvkm_head *);
  45 void nv50_disp_super_2_0(struct nv50_disp *, struct nvkm_head *);
  46 void nv50_disp_super_2_1(struct nv50_disp *, struct nvkm_head *);
  47 void nv50_disp_super_2_2(struct nv50_disp *, struct nvkm_head *);
  48 void nv50_disp_super_3_0(struct nv50_disp *, struct nvkm_head *);
  49 
  50 int nv50_disp_new_(const struct nv50_disp_func *, struct nvkm_device *,
  51                    int index, struct nvkm_disp **);
  52 
  53 struct nv50_disp_func {
  54         int (*init)(struct nv50_disp *);
  55         void (*fini)(struct nv50_disp *);
  56         void (*intr)(struct nv50_disp *);
  57         void (*intr_error)(struct nv50_disp *, int chid);
  58 
  59         const struct nvkm_event_func *uevent;
  60         void (*super)(struct work_struct *);
  61 
  62         const struct nvkm_disp_oclass *root;
  63 
  64         struct {
  65                 int (*cnt)(struct nvkm_disp *, unsigned long *mask);
  66                 int (*new)(struct nvkm_disp *, int id);
  67         } wndw, head, dac, sor, pior;
  68 
  69         u16 ramht_size;
  70 };
  71 
  72 int nv50_disp_init(struct nv50_disp *);
  73 void nv50_disp_fini(struct nv50_disp *);
  74 void nv50_disp_intr(struct nv50_disp *);
  75 void nv50_disp_super(struct work_struct *);
  76 extern const struct nvkm_enum nv50_disp_intr_error_type[];
  77 
  78 int gf119_disp_init(struct nv50_disp *);
  79 void gf119_disp_fini(struct nv50_disp *);
  80 void gf119_disp_intr(struct nv50_disp *);
  81 void gf119_disp_super(struct work_struct *);
  82 void gf119_disp_intr_error(struct nv50_disp *, int);
  83 
  84 void gv100_disp_fini(struct nv50_disp *);
  85 void gv100_disp_intr(struct nv50_disp *);
  86 void gv100_disp_super(struct work_struct *);
  87 int gv100_disp_wndw_cnt(struct nvkm_disp *, unsigned long *);
  88 
  89 void nv50_disp_dptmds_war_2(struct nv50_disp *, struct dcb_output *);
  90 void nv50_disp_dptmds_war_3(struct nv50_disp *, struct dcb_output *);
  91 void nv50_disp_update_sppll1(struct nv50_disp *);
  92 
  93 extern const struct nvkm_event_func nv50_disp_chan_uevent;
  94 int  nv50_disp_chan_uevent_ctor(struct nvkm_object *, void *, u32,
  95                                 struct nvkm_notify *);
  96 void nv50_disp_chan_uevent_send(struct nv50_disp *, int);
  97 
  98 extern const struct nvkm_event_func gf119_disp_chan_uevent;
  99 extern const struct nvkm_event_func gv100_disp_chan_uevent;
 100 #endif