root/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c

/* [<][>][^][v][top][bottom][index][help] */

DEFINITIONS

This source file includes following definitions.
  1. gf100_grctx_mmio_data
  2. gf100_grctx_mmio_item
  3. gf100_grctx_generate_r419cb8
  4. gf100_grctx_generate_bundle
  5. gf100_grctx_generate_pagepool
  6. gf100_grctx_generate_attrib
  7. gf100_grctx_generate_unkn
  8. gf100_grctx_generate_r4060a8
  9. gf100_grctx_generate_rop_mapping
  10. gf100_grctx_generate_max_ways_evict
  11. gf100_grctx_generate_alpha_beta_tables
  12. gf100_grctx_generate_tpc_nr
  13. gf100_grctx_generate_sm_id
  14. gf100_grctx_generate_floorsweep
  15. gf100_grctx_generate_main
  16. gf100_grctx_generate

   1 /*
   2  * Copyright 2010 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24 #include "ctxgf100.h"
  25 
  26 #include <subdev/fb.h>
  27 #include <subdev/mc.h>
  28 #include <subdev/timer.h>
  29 
  30 /*******************************************************************************
  31  * PGRAPH context register lists
  32  ******************************************************************************/
  33 
  34 static const struct gf100_gr_init
  35 gf100_grctx_init_icmd_0[] = {
  36         { 0x001000,   1, 0x01, 0x00000004 },
  37         { 0x0000a9,   1, 0x01, 0x0000ffff },
  38         { 0x000038,   1, 0x01, 0x0fac6881 },
  39         { 0x00003d,   1, 0x01, 0x00000001 },
  40         { 0x0000e8,   8, 0x01, 0x00000400 },
  41         { 0x000078,   8, 0x01, 0x00000300 },
  42         { 0x000050,   1, 0x01, 0x00000011 },
  43         { 0x000058,   8, 0x01, 0x00000008 },
  44         { 0x000208,   8, 0x01, 0x00000001 },
  45         { 0x000081,   1, 0x01, 0x00000001 },
  46         { 0x000085,   1, 0x01, 0x00000004 },
  47         { 0x000088,   1, 0x01, 0x00000400 },
  48         { 0x000090,   1, 0x01, 0x00000300 },
  49         { 0x000098,   1, 0x01, 0x00001001 },
  50         { 0x0000e3,   1, 0x01, 0x00000001 },
  51         { 0x0000da,   1, 0x01, 0x00000001 },
  52         { 0x0000f8,   1, 0x01, 0x00000003 },
  53         { 0x0000fa,   1, 0x01, 0x00000001 },
  54         { 0x00009f,   4, 0x01, 0x0000ffff },
  55         { 0x0000b1,   1, 0x01, 0x00000001 },
  56         { 0x0000b2,  40, 0x01, 0x00000000 },
  57         { 0x000210,   8, 0x01, 0x00000040 },
  58         { 0x000218,   8, 0x01, 0x0000c080 },
  59         { 0x0000ad,   1, 0x01, 0x0000013e },
  60         { 0x0000e1,   1, 0x01, 0x00000010 },
  61         { 0x000290,  16, 0x01, 0x00000000 },
  62         { 0x0003b0,  16, 0x01, 0x00000000 },
  63         { 0x0002a0,  16, 0x01, 0x00000000 },
  64         { 0x000420,  16, 0x01, 0x00000000 },
  65         { 0x0002b0,  16, 0x01, 0x00000000 },
  66         { 0x000430,  16, 0x01, 0x00000000 },
  67         { 0x0002c0,  16, 0x01, 0x00000000 },
  68         { 0x0004d0,  16, 0x01, 0x00000000 },
  69         { 0x000720,  16, 0x01, 0x00000000 },
  70         { 0x0008c0,  16, 0x01, 0x00000000 },
  71         { 0x000890,  16, 0x01, 0x00000000 },
  72         { 0x0008e0,  16, 0x01, 0x00000000 },
  73         { 0x0008a0,  16, 0x01, 0x00000000 },
  74         { 0x0008f0,  16, 0x01, 0x00000000 },
  75         { 0x00094c,   1, 0x01, 0x000000ff },
  76         { 0x00094d,   1, 0x01, 0xffffffff },
  77         { 0x00094e,   1, 0x01, 0x00000002 },
  78         { 0x0002ec,   1, 0x01, 0x00000001 },
  79         { 0x000303,   1, 0x01, 0x00000001 },
  80         { 0x0002e6,   1, 0x01, 0x00000001 },
  81         { 0x000466,   1, 0x01, 0x00000052 },
  82         { 0x000301,   1, 0x01, 0x3f800000 },
  83         { 0x000304,   1, 0x01, 0x30201000 },
  84         { 0x000305,   1, 0x01, 0x70605040 },
  85         { 0x000306,   1, 0x01, 0xb8a89888 },
  86         { 0x000307,   1, 0x01, 0xf8e8d8c8 },
  87         { 0x00030a,   1, 0x01, 0x00ffff00 },
  88         { 0x00030b,   1, 0x01, 0x0000001a },
  89         { 0x00030c,   1, 0x01, 0x00000001 },
  90         { 0x000318,   1, 0x01, 0x00000001 },
  91         { 0x000340,   1, 0x01, 0x00000000 },
  92         { 0x000375,   1, 0x01, 0x00000001 },
  93         { 0x000351,   1, 0x01, 0x00000100 },
  94         { 0x00037d,   1, 0x01, 0x00000006 },
  95         { 0x0003a0,   1, 0x01, 0x00000002 },
  96         { 0x0003aa,   1, 0x01, 0x00000001 },
  97         { 0x0003a9,   1, 0x01, 0x00000001 },
  98         { 0x000380,   1, 0x01, 0x00000001 },
  99         { 0x000360,   1, 0x01, 0x00000040 },
 100         { 0x000366,   2, 0x01, 0x00000000 },
 101         { 0x000368,   1, 0x01, 0x00001fff },
 102         { 0x000370,   2, 0x01, 0x00000000 },
 103         { 0x000372,   1, 0x01, 0x003fffff },
 104         { 0x00037a,   1, 0x01, 0x00000012 },
 105         { 0x0005e0,   5, 0x01, 0x00000022 },
 106         { 0x000619,   1, 0x01, 0x00000003 },
 107         { 0x000811,   1, 0x01, 0x00000003 },
 108         { 0x000812,   1, 0x01, 0x00000004 },
 109         { 0x000813,   1, 0x01, 0x00000006 },
 110         { 0x000814,   1, 0x01, 0x00000008 },
 111         { 0x000815,   1, 0x01, 0x0000000b },
 112         { 0x000800,   6, 0x01, 0x00000001 },
 113         { 0x000632,   1, 0x01, 0x00000001 },
 114         { 0x000633,   1, 0x01, 0x00000002 },
 115         { 0x000634,   1, 0x01, 0x00000003 },
 116         { 0x000635,   1, 0x01, 0x00000004 },
 117         { 0x000654,   1, 0x01, 0x3f800000 },
 118         { 0x000657,   1, 0x01, 0x3f800000 },
 119         { 0x000655,   2, 0x01, 0x3f800000 },
 120         { 0x0006cd,   1, 0x01, 0x3f800000 },
 121         { 0x0007f5,   1, 0x01, 0x3f800000 },
 122         { 0x0007dc,   1, 0x01, 0x39291909 },
 123         { 0x0007dd,   1, 0x01, 0x79695949 },
 124         { 0x0007de,   1, 0x01, 0xb9a99989 },
 125         { 0x0007df,   1, 0x01, 0xf9e9d9c9 },
 126         { 0x0007e8,   1, 0x01, 0x00003210 },
 127         { 0x0007e9,   1, 0x01, 0x00007654 },
 128         { 0x0007ea,   1, 0x01, 0x00000098 },
 129         { 0x0007ec,   1, 0x01, 0x39291909 },
 130         { 0x0007ed,   1, 0x01, 0x79695949 },
 131         { 0x0007ee,   1, 0x01, 0xb9a99989 },
 132         { 0x0007ef,   1, 0x01, 0xf9e9d9c9 },
 133         { 0x0007f0,   1, 0x01, 0x00003210 },
 134         { 0x0007f1,   1, 0x01, 0x00007654 },
 135         { 0x0007f2,   1, 0x01, 0x00000098 },
 136         { 0x0005a5,   1, 0x01, 0x00000001 },
 137         { 0x000980, 128, 0x01, 0x00000000 },
 138         { 0x000468,   1, 0x01, 0x00000004 },
 139         { 0x00046c,   1, 0x01, 0x00000001 },
 140         { 0x000470,  96, 0x01, 0x00000000 },
 141         { 0x000510,  16, 0x01, 0x3f800000 },
 142         { 0x000520,   1, 0x01, 0x000002b6 },
 143         { 0x000529,   1, 0x01, 0x00000001 },
 144         { 0x000530,  16, 0x01, 0xffff0000 },
 145         { 0x000585,   1, 0x01, 0x0000003f },
 146         { 0x000576,   1, 0x01, 0x00000003 },
 147         { 0x000586,   1, 0x01, 0x00000040 },
 148         { 0x000582,   2, 0x01, 0x00000080 },
 149         { 0x0005c2,   1, 0x01, 0x00000001 },
 150         { 0x000638,   2, 0x01, 0x00000001 },
 151         { 0x00063a,   1, 0x01, 0x00000002 },
 152         { 0x00063b,   2, 0x01, 0x00000001 },
 153         { 0x00063d,   1, 0x01, 0x00000002 },
 154         { 0x00063e,   1, 0x01, 0x00000001 },
 155         { 0x0008b8,   8, 0x01, 0x00000001 },
 156         { 0x000900,   8, 0x01, 0x00000001 },
 157         { 0x000908,   8, 0x01, 0x00000002 },
 158         { 0x000910,  16, 0x01, 0x00000001 },
 159         { 0x000920,   8, 0x01, 0x00000002 },
 160         { 0x000928,   8, 0x01, 0x00000001 },
 161         { 0x000648,   9, 0x01, 0x00000001 },
 162         { 0x000658,   1, 0x01, 0x0000000f },
 163         { 0x0007ff,   1, 0x01, 0x0000000a },
 164         { 0x00066a,   1, 0x01, 0x40000000 },
 165         { 0x00066b,   1, 0x01, 0x10000000 },
 166         { 0x00066c,   2, 0x01, 0xffff0000 },
 167         { 0x0007af,   2, 0x01, 0x00000008 },
 168         { 0x0007f6,   1, 0x01, 0x00000001 },
 169         { 0x0006b2,   1, 0x01, 0x00000055 },
 170         { 0x0007ad,   1, 0x01, 0x00000003 },
 171         { 0x000937,   1, 0x01, 0x00000001 },
 172         { 0x000971,   1, 0x01, 0x00000008 },
 173         { 0x000972,   1, 0x01, 0x00000040 },
 174         { 0x000973,   1, 0x01, 0x0000012c },
 175         { 0x00097c,   1, 0x01, 0x00000040 },
 176         { 0x000979,   1, 0x01, 0x00000003 },
 177         { 0x000975,   1, 0x01, 0x00000020 },
 178         { 0x000976,   1, 0x01, 0x00000001 },
 179         { 0x000977,   1, 0x01, 0x00000020 },
 180         { 0x000978,   1, 0x01, 0x00000001 },
 181         { 0x000957,   1, 0x01, 0x00000003 },
 182         { 0x00095e,   1, 0x01, 0x20164010 },
 183         { 0x00095f,   1, 0x01, 0x00000020 },
 184         { 0x000683,   1, 0x01, 0x00000006 },
 185         { 0x000685,   1, 0x01, 0x003fffff },
 186         { 0x000687,   1, 0x01, 0x00000c48 },
 187         { 0x0006a0,   1, 0x01, 0x00000005 },
 188         { 0x000840,   1, 0x01, 0x00300008 },
 189         { 0x000841,   1, 0x01, 0x04000080 },
 190         { 0x000842,   1, 0x01, 0x00300008 },
 191         { 0x000843,   1, 0x01, 0x04000080 },
 192         { 0x000818,   8, 0x01, 0x00000000 },
 193         { 0x000848,  16, 0x01, 0x00000000 },
 194         { 0x000738,   1, 0x01, 0x00000000 },
 195         { 0x0006aa,   1, 0x01, 0x00000001 },
 196         { 0x0006ab,   1, 0x01, 0x00000002 },
 197         { 0x0006ac,   1, 0x01, 0x00000080 },
 198         { 0x0006ad,   2, 0x01, 0x00000100 },
 199         { 0x0006b1,   1, 0x01, 0x00000011 },
 200         { 0x0006bb,   1, 0x01, 0x000000cf },
 201         { 0x0006ce,   1, 0x01, 0x2a712488 },
 202         { 0x000739,   1, 0x01, 0x4085c000 },
 203         { 0x00073a,   1, 0x01, 0x00000080 },
 204         { 0x000786,   1, 0x01, 0x80000100 },
 205         { 0x00073c,   1, 0x01, 0x00010100 },
 206         { 0x00073d,   1, 0x01, 0x02800000 },
 207         { 0x000787,   1, 0x01, 0x000000cf },
 208         { 0x00078c,   1, 0x01, 0x00000008 },
 209         { 0x000792,   1, 0x01, 0x00000001 },
 210         { 0x000794,   3, 0x01, 0x00000001 },
 211         { 0x000797,   1, 0x01, 0x000000cf },
 212         { 0x000836,   1, 0x01, 0x00000001 },
 213         { 0x00079a,   1, 0x01, 0x00000002 },
 214         { 0x000833,   1, 0x01, 0x04444480 },
 215         { 0x0007a1,   1, 0x01, 0x00000001 },
 216         { 0x0007a3,   3, 0x01, 0x00000001 },
 217         { 0x000831,   1, 0x01, 0x00000004 },
 218         { 0x00080c,   1, 0x01, 0x00000002 },
 219         { 0x00080d,   2, 0x01, 0x00000100 },
 220         { 0x00080f,   1, 0x01, 0x00000001 },
 221         { 0x000823,   1, 0x01, 0x00000002 },
 222         { 0x000824,   2, 0x01, 0x00000100 },
 223         { 0x000826,   1, 0x01, 0x00000001 },
 224         { 0x00095d,   1, 0x01, 0x00000001 },
 225         { 0x00082b,   1, 0x01, 0x00000004 },
 226         { 0x000942,   1, 0x01, 0x00010001 },
 227         { 0x000943,   1, 0x01, 0x00000001 },
 228         { 0x000944,   1, 0x01, 0x00000022 },
 229         { 0x0007c5,   1, 0x01, 0x00010001 },
 230         { 0x000834,   1, 0x01, 0x00000001 },
 231         { 0x0007c7,   1, 0x01, 0x00000001 },
 232         { 0x00c1b0,   8, 0x01, 0x0000000f },
 233         { 0x00c1b8,   1, 0x01, 0x0fac6881 },
 234         { 0x00c1b9,   1, 0x01, 0x00fac688 },
 235         { 0x01e100,   1, 0x01, 0x00000001 },
 236         { 0x001000,   1, 0x01, 0x00000002 },
 237         { 0x0006aa,   1, 0x01, 0x00000001 },
 238         { 0x0006ad,   2, 0x01, 0x00000100 },
 239         { 0x0006b1,   1, 0x01, 0x00000011 },
 240         { 0x00078c,   1, 0x01, 0x00000008 },
 241         { 0x000792,   1, 0x01, 0x00000001 },
 242         { 0x000794,   3, 0x01, 0x00000001 },
 243         { 0x000797,   1, 0x01, 0x000000cf },
 244         { 0x00079a,   1, 0x01, 0x00000002 },
 245         { 0x000833,   1, 0x01, 0x04444480 },
 246         { 0x0007a1,   1, 0x01, 0x00000001 },
 247         { 0x0007a3,   3, 0x01, 0x00000001 },
 248         { 0x000831,   1, 0x01, 0x00000004 },
 249         { 0x01e100,   1, 0x01, 0x00000001 },
 250         { 0x001000,   1, 0x01, 0x00000014 },
 251         { 0x000351,   1, 0x01, 0x00000100 },
 252         { 0x000957,   1, 0x01, 0x00000003 },
 253         { 0x00095d,   1, 0x01, 0x00000001 },
 254         { 0x00082b,   1, 0x01, 0x00000004 },
 255         { 0x000942,   1, 0x01, 0x00010001 },
 256         { 0x000943,   1, 0x01, 0x00000001 },
 257         { 0x0007c5,   1, 0x01, 0x00010001 },
 258         { 0x000834,   1, 0x01, 0x00000001 },
 259         { 0x0007c7,   1, 0x01, 0x00000001 },
 260         { 0x01e100,   1, 0x01, 0x00000001 },
 261         { 0x001000,   1, 0x01, 0x00000001 },
 262         { 0x00080c,   1, 0x01, 0x00000002 },
 263         { 0x00080d,   2, 0x01, 0x00000100 },
 264         { 0x00080f,   1, 0x01, 0x00000001 },
 265         { 0x000823,   1, 0x01, 0x00000002 },
 266         { 0x000824,   2, 0x01, 0x00000100 },
 267         { 0x000826,   1, 0x01, 0x00000001 },
 268         { 0x01e100,   1, 0x01, 0x00000001 },
 269         {}
 270 };
 271 
 272 const struct gf100_gr_pack
 273 gf100_grctx_pack_icmd[] = {
 274         { gf100_grctx_init_icmd_0 },
 275         {}
 276 };
 277 
 278 static const struct gf100_gr_init
 279 gf100_grctx_init_9097_0[] = {
 280         { 0x000800,   8, 0x40, 0x00000000 },
 281         { 0x000804,   8, 0x40, 0x00000000 },
 282         { 0x000808,   8, 0x40, 0x00000400 },
 283         { 0x00080c,   8, 0x40, 0x00000300 },
 284         { 0x000810,   1, 0x04, 0x000000cf },
 285         { 0x000850,   7, 0x40, 0x00000000 },
 286         { 0x000814,   8, 0x40, 0x00000040 },
 287         { 0x000818,   8, 0x40, 0x00000001 },
 288         { 0x00081c,   8, 0x40, 0x00000000 },
 289         { 0x000820,   8, 0x40, 0x00000000 },
 290         { 0x002700,   8, 0x20, 0x00000000 },
 291         { 0x002704,   8, 0x20, 0x00000000 },
 292         { 0x002708,   8, 0x20, 0x00000000 },
 293         { 0x00270c,   8, 0x20, 0x00000000 },
 294         { 0x002710,   8, 0x20, 0x00014000 },
 295         { 0x002714,   8, 0x20, 0x00000040 },
 296         { 0x001c00,  16, 0x10, 0x00000000 },
 297         { 0x001c04,  16, 0x10, 0x00000000 },
 298         { 0x001c08,  16, 0x10, 0x00000000 },
 299         { 0x001c0c,  16, 0x10, 0x00000000 },
 300         { 0x001d00,  16, 0x10, 0x00000000 },
 301         { 0x001d04,  16, 0x10, 0x00000000 },
 302         { 0x001d08,  16, 0x10, 0x00000000 },
 303         { 0x001d0c,  16, 0x10, 0x00000000 },
 304         { 0x001f00,  16, 0x08, 0x00000000 },
 305         { 0x001f04,  16, 0x08, 0x00000000 },
 306         { 0x001f80,  16, 0x08, 0x00000000 },
 307         { 0x001f84,  16, 0x08, 0x00000000 },
 308         { 0x002200,   5, 0x10, 0x00000022 },
 309         { 0x002000,   1, 0x04, 0x00000000 },
 310         { 0x002040,   1, 0x04, 0x00000011 },
 311         { 0x002080,   1, 0x04, 0x00000020 },
 312         { 0x0020c0,   1, 0x04, 0x00000030 },
 313         { 0x002100,   1, 0x04, 0x00000040 },
 314         { 0x002140,   1, 0x04, 0x00000051 },
 315         { 0x00200c,   6, 0x40, 0x00000001 },
 316         { 0x002010,   1, 0x04, 0x00000000 },
 317         { 0x002050,   1, 0x04, 0x00000000 },
 318         { 0x002090,   1, 0x04, 0x00000001 },
 319         { 0x0020d0,   1, 0x04, 0x00000002 },
 320         { 0x002110,   1, 0x04, 0x00000003 },
 321         { 0x002150,   1, 0x04, 0x00000004 },
 322         { 0x000380,   4, 0x20, 0x00000000 },
 323         { 0x000384,   4, 0x20, 0x00000000 },
 324         { 0x000388,   4, 0x20, 0x00000000 },
 325         { 0x00038c,   4, 0x20, 0x00000000 },
 326         { 0x000700,   4, 0x10, 0x00000000 },
 327         { 0x000704,   4, 0x10, 0x00000000 },
 328         { 0x000708,   4, 0x10, 0x00000000 },
 329         { 0x002800, 128, 0x04, 0x00000000 },
 330         { 0x000a00,  16, 0x20, 0x00000000 },
 331         { 0x000a04,  16, 0x20, 0x00000000 },
 332         { 0x000a08,  16, 0x20, 0x00000000 },
 333         { 0x000a0c,  16, 0x20, 0x00000000 },
 334         { 0x000a10,  16, 0x20, 0x00000000 },
 335         { 0x000a14,  16, 0x20, 0x00000000 },
 336         { 0x000c00,  16, 0x10, 0x00000000 },
 337         { 0x000c04,  16, 0x10, 0x00000000 },
 338         { 0x000c08,  16, 0x10, 0x00000000 },
 339         { 0x000c0c,  16, 0x10, 0x3f800000 },
 340         { 0x000d00,   8, 0x08, 0xffff0000 },
 341         { 0x000d04,   8, 0x08, 0xffff0000 },
 342         { 0x000e00,  16, 0x10, 0x00000000 },
 343         { 0x000e04,  16, 0x10, 0xffff0000 },
 344         { 0x000e08,  16, 0x10, 0xffff0000 },
 345         { 0x000d40,   4, 0x08, 0x00000000 },
 346         { 0x000d44,   4, 0x08, 0x00000000 },
 347         { 0x001e00,   8, 0x20, 0x00000001 },
 348         { 0x001e04,   8, 0x20, 0x00000001 },
 349         { 0x001e08,   8, 0x20, 0x00000002 },
 350         { 0x001e0c,   8, 0x20, 0x00000001 },
 351         { 0x001e10,   8, 0x20, 0x00000001 },
 352         { 0x001e14,   8, 0x20, 0x00000002 },
 353         { 0x001e18,   8, 0x20, 0x00000001 },
 354         { 0x003400, 128, 0x04, 0x00000000 },
 355         { 0x00030c,   1, 0x04, 0x00000001 },
 356         { 0x001944,   1, 0x04, 0x00000000 },
 357         { 0x001514,   1, 0x04, 0x00000000 },
 358         { 0x000d68,   1, 0x04, 0x0000ffff },
 359         { 0x00121c,   1, 0x04, 0x0fac6881 },
 360         { 0x000fac,   1, 0x04, 0x00000001 },
 361         { 0x001538,   1, 0x04, 0x00000001 },
 362         { 0x000fe0,   2, 0x04, 0x00000000 },
 363         { 0x000fe8,   1, 0x04, 0x00000014 },
 364         { 0x000fec,   1, 0x04, 0x00000040 },
 365         { 0x000ff0,   1, 0x04, 0x00000000 },
 366         { 0x00179c,   1, 0x04, 0x00000000 },
 367         { 0x001228,   1, 0x04, 0x00000400 },
 368         { 0x00122c,   1, 0x04, 0x00000300 },
 369         { 0x001230,   1, 0x04, 0x00010001 },
 370         { 0x0007f8,   1, 0x04, 0x00000000 },
 371         { 0x0015b4,   1, 0x04, 0x00000001 },
 372         { 0x0015cc,   1, 0x04, 0x00000000 },
 373         { 0x001534,   1, 0x04, 0x00000000 },
 374         { 0x000fb0,   1, 0x04, 0x00000000 },
 375         { 0x0015d0,   1, 0x04, 0x00000000 },
 376         { 0x00153c,   1, 0x04, 0x00000000 },
 377         { 0x0016b4,   1, 0x04, 0x00000003 },
 378         { 0x000fbc,   4, 0x04, 0x0000ffff },
 379         { 0x000df8,   2, 0x04, 0x00000000 },
 380         { 0x001948,   1, 0x04, 0x00000000 },
 381         { 0x001970,   1, 0x04, 0x00000001 },
 382         { 0x00161c,   1, 0x04, 0x000009f0 },
 383         { 0x000dcc,   1, 0x04, 0x00000010 },
 384         { 0x00163c,   1, 0x04, 0x00000000 },
 385         { 0x0015e4,   1, 0x04, 0x00000000 },
 386         { 0x001160,  32, 0x04, 0x25e00040 },
 387         { 0x001880,  32, 0x04, 0x00000000 },
 388         { 0x000f84,   2, 0x04, 0x00000000 },
 389         { 0x0017c8,   2, 0x04, 0x00000000 },
 390         { 0x0017d0,   1, 0x04, 0x000000ff },
 391         { 0x0017d4,   1, 0x04, 0xffffffff },
 392         { 0x0017d8,   1, 0x04, 0x00000002 },
 393         { 0x0017dc,   1, 0x04, 0x00000000 },
 394         { 0x0015f4,   2, 0x04, 0x00000000 },
 395         { 0x001434,   2, 0x04, 0x00000000 },
 396         { 0x000d74,   1, 0x04, 0x00000000 },
 397         { 0x000dec,   1, 0x04, 0x00000001 },
 398         { 0x0013a4,   1, 0x04, 0x00000000 },
 399         { 0x001318,   1, 0x04, 0x00000001 },
 400         { 0x001644,   1, 0x04, 0x00000000 },
 401         { 0x000748,   1, 0x04, 0x00000000 },
 402         { 0x000de8,   1, 0x04, 0x00000000 },
 403         { 0x001648,   1, 0x04, 0x00000000 },
 404         { 0x0012a4,   1, 0x04, 0x00000000 },
 405         { 0x001120,   4, 0x04, 0x00000000 },
 406         { 0x001118,   1, 0x04, 0x00000000 },
 407         { 0x00164c,   1, 0x04, 0x00000000 },
 408         { 0x001658,   1, 0x04, 0x00000000 },
 409         { 0x001910,   1, 0x04, 0x00000290 },
 410         { 0x001518,   1, 0x04, 0x00000000 },
 411         { 0x00165c,   1, 0x04, 0x00000001 },
 412         { 0x001520,   1, 0x04, 0x00000000 },
 413         { 0x001604,   1, 0x04, 0x00000000 },
 414         { 0x001570,   1, 0x04, 0x00000000 },
 415         { 0x0013b0,   2, 0x04, 0x3f800000 },
 416         { 0x00020c,   1, 0x04, 0x00000000 },
 417         { 0x001670,   1, 0x04, 0x30201000 },
 418         { 0x001674,   1, 0x04, 0x70605040 },
 419         { 0x001678,   1, 0x04, 0xb8a89888 },
 420         { 0x00167c,   1, 0x04, 0xf8e8d8c8 },
 421         { 0x00166c,   1, 0x04, 0x00000000 },
 422         { 0x001680,   1, 0x04, 0x00ffff00 },
 423         { 0x0012d0,   1, 0x04, 0x00000003 },
 424         { 0x0012d4,   1, 0x04, 0x00000002 },
 425         { 0x001684,   2, 0x04, 0x00000000 },
 426         { 0x000dac,   2, 0x04, 0x00001b02 },
 427         { 0x000db4,   1, 0x04, 0x00000000 },
 428         { 0x00168c,   1, 0x04, 0x00000000 },
 429         { 0x0015bc,   1, 0x04, 0x00000000 },
 430         { 0x00156c,   1, 0x04, 0x00000000 },
 431         { 0x00187c,   1, 0x04, 0x00000000 },
 432         { 0x001110,   1, 0x04, 0x00000001 },
 433         { 0x000dc0,   3, 0x04, 0x00000000 },
 434         { 0x001234,   1, 0x04, 0x00000000 },
 435         { 0x001690,   1, 0x04, 0x00000000 },
 436         { 0x0012ac,   1, 0x04, 0x00000001 },
 437         { 0x0002c4,   1, 0x04, 0x00000000 },
 438         { 0x000790,   5, 0x04, 0x00000000 },
 439         { 0x00077c,   1, 0x04, 0x00000000 },
 440         { 0x001000,   1, 0x04, 0x00000010 },
 441         { 0x0010fc,   1, 0x04, 0x00000000 },
 442         { 0x001290,   1, 0x04, 0x00000000 },
 443         { 0x000218,   1, 0x04, 0x00000010 },
 444         { 0x0012d8,   1, 0x04, 0x00000000 },
 445         { 0x0012dc,   1, 0x04, 0x00000010 },
 446         { 0x000d94,   1, 0x04, 0x00000001 },
 447         { 0x00155c,   2, 0x04, 0x00000000 },
 448         { 0x001564,   1, 0x04, 0x00001fff },
 449         { 0x001574,   2, 0x04, 0x00000000 },
 450         { 0x00157c,   1, 0x04, 0x003fffff },
 451         { 0x001354,   1, 0x04, 0x00000000 },
 452         { 0x001664,   1, 0x04, 0x00000000 },
 453         { 0x001610,   1, 0x04, 0x00000012 },
 454         { 0x001608,   2, 0x04, 0x00000000 },
 455         { 0x00162c,   1, 0x04, 0x00000003 },
 456         { 0x000210,   1, 0x04, 0x00000000 },
 457         { 0x000320,   1, 0x04, 0x00000000 },
 458         { 0x000324,   6, 0x04, 0x3f800000 },
 459         { 0x000750,   1, 0x04, 0x00000000 },
 460         { 0x000760,   1, 0x04, 0x39291909 },
 461         { 0x000764,   1, 0x04, 0x79695949 },
 462         { 0x000768,   1, 0x04, 0xb9a99989 },
 463         { 0x00076c,   1, 0x04, 0xf9e9d9c9 },
 464         { 0x000770,   1, 0x04, 0x30201000 },
 465         { 0x000774,   1, 0x04, 0x70605040 },
 466         { 0x000778,   1, 0x04, 0x00009080 },
 467         { 0x000780,   1, 0x04, 0x39291909 },
 468         { 0x000784,   1, 0x04, 0x79695949 },
 469         { 0x000788,   1, 0x04, 0xb9a99989 },
 470         { 0x00078c,   1, 0x04, 0xf9e9d9c9 },
 471         { 0x0007d0,   1, 0x04, 0x30201000 },
 472         { 0x0007d4,   1, 0x04, 0x70605040 },
 473         { 0x0007d8,   1, 0x04, 0x00009080 },
 474         { 0x00037c,   1, 0x04, 0x00000001 },
 475         { 0x000740,   2, 0x04, 0x00000000 },
 476         { 0x002600,   1, 0x04, 0x00000000 },
 477         { 0x001918,   1, 0x04, 0x00000000 },
 478         { 0x00191c,   1, 0x04, 0x00000900 },
 479         { 0x001920,   1, 0x04, 0x00000405 },
 480         { 0x001308,   1, 0x04, 0x00000001 },
 481         { 0x001924,   1, 0x04, 0x00000000 },
 482         { 0x0013ac,   1, 0x04, 0x00000000 },
 483         { 0x00192c,   1, 0x04, 0x00000001 },
 484         { 0x00193c,   1, 0x04, 0x00002c1c },
 485         { 0x000d7c,   1, 0x04, 0x00000000 },
 486         { 0x000f8c,   1, 0x04, 0x00000000 },
 487         { 0x0002c0,   1, 0x04, 0x00000001 },
 488         { 0x001510,   1, 0x04, 0x00000000 },
 489         { 0x001940,   1, 0x04, 0x00000000 },
 490         { 0x000ff4,   2, 0x04, 0x00000000 },
 491         { 0x00194c,   2, 0x04, 0x00000000 },
 492         { 0x001968,   1, 0x04, 0x00000000 },
 493         { 0x001590,   1, 0x04, 0x0000003f },
 494         { 0x0007e8,   4, 0x04, 0x00000000 },
 495         { 0x00196c,   1, 0x04, 0x00000011 },
 496         { 0x00197c,   1, 0x04, 0x00000000 },
 497         { 0x000fcc,   2, 0x04, 0x00000000 },
 498         { 0x0002d8,   1, 0x04, 0x00000040 },
 499         { 0x001980,   1, 0x04, 0x00000080 },
 500         { 0x001504,   1, 0x04, 0x00000080 },
 501         { 0x001984,   1, 0x04, 0x00000000 },
 502         { 0x000300,   1, 0x04, 0x00000001 },
 503         { 0x0013a8,   1, 0x04, 0x00000000 },
 504         { 0x0012ec,   1, 0x04, 0x00000000 },
 505         { 0x001310,   1, 0x04, 0x00000000 },
 506         { 0x001314,   1, 0x04, 0x00000001 },
 507         { 0x001380,   1, 0x04, 0x00000000 },
 508         { 0x001384,   4, 0x04, 0x00000001 },
 509         { 0x001394,   1, 0x04, 0x00000000 },
 510         { 0x00139c,   1, 0x04, 0x00000000 },
 511         { 0x001398,   1, 0x04, 0x00000000 },
 512         { 0x001594,   1, 0x04, 0x00000000 },
 513         { 0x001598,   4, 0x04, 0x00000001 },
 514         { 0x000f54,   3, 0x04, 0x00000000 },
 515         { 0x0019bc,   1, 0x04, 0x00000000 },
 516         { 0x000f9c,   2, 0x04, 0x00000000 },
 517         { 0x0012cc,   1, 0x04, 0x00000000 },
 518         { 0x0012e8,   1, 0x04, 0x00000000 },
 519         { 0x00130c,   1, 0x04, 0x00000001 },
 520         { 0x001360,   8, 0x04, 0x00000000 },
 521         { 0x00133c,   2, 0x04, 0x00000001 },
 522         { 0x001344,   1, 0x04, 0x00000002 },
 523         { 0x001348,   2, 0x04, 0x00000001 },
 524         { 0x001350,   1, 0x04, 0x00000002 },
 525         { 0x001358,   1, 0x04, 0x00000001 },
 526         { 0x0012e4,   1, 0x04, 0x00000000 },
 527         { 0x00131c,   4, 0x04, 0x00000000 },
 528         { 0x0019c0,   1, 0x04, 0x00000000 },
 529         { 0x001140,   1, 0x04, 0x00000000 },
 530         { 0x0019c4,   1, 0x04, 0x00000000 },
 531         { 0x0019c8,   1, 0x04, 0x00001500 },
 532         { 0x00135c,   1, 0x04, 0x00000000 },
 533         { 0x000f90,   1, 0x04, 0x00000000 },
 534         { 0x0019e0,   8, 0x04, 0x00000001 },
 535         { 0x0019cc,   1, 0x04, 0x00000001 },
 536         { 0x0015b8,   1, 0x04, 0x00000000 },
 537         { 0x001a00,   1, 0x04, 0x00001111 },
 538         { 0x001a04,   7, 0x04, 0x00000000 },
 539         { 0x000d6c,   2, 0x04, 0xffff0000 },
 540         { 0x0010f8,   1, 0x04, 0x00001010 },
 541         { 0x000d80,   5, 0x04, 0x00000000 },
 542         { 0x000da0,   1, 0x04, 0x00000000 },
 543         { 0x001508,   1, 0x04, 0x80000000 },
 544         { 0x00150c,   1, 0x04, 0x40000000 },
 545         { 0x001668,   1, 0x04, 0x00000000 },
 546         { 0x000318,   2, 0x04, 0x00000008 },
 547         { 0x000d9c,   1, 0x04, 0x00000001 },
 548         { 0x0007dc,   1, 0x04, 0x00000000 },
 549         { 0x00074c,   1, 0x04, 0x00000055 },
 550         { 0x001420,   1, 0x04, 0x00000003 },
 551         { 0x0017bc,   2, 0x04, 0x00000000 },
 552         { 0x0017c4,   1, 0x04, 0x00000001 },
 553         { 0x001008,   1, 0x04, 0x00000008 },
 554         { 0x00100c,   1, 0x04, 0x00000040 },
 555         { 0x001010,   1, 0x04, 0x0000012c },
 556         { 0x000d60,   1, 0x04, 0x00000040 },
 557         { 0x00075c,   1, 0x04, 0x00000003 },
 558         { 0x001018,   1, 0x04, 0x00000020 },
 559         { 0x00101c,   1, 0x04, 0x00000001 },
 560         { 0x001020,   1, 0x04, 0x00000020 },
 561         { 0x001024,   1, 0x04, 0x00000001 },
 562         { 0x001444,   3, 0x04, 0x00000000 },
 563         { 0x000360,   1, 0x04, 0x20164010 },
 564         { 0x000364,   1, 0x04, 0x00000020 },
 565         { 0x000368,   1, 0x04, 0x00000000 },
 566         { 0x000de4,   1, 0x04, 0x00000000 },
 567         { 0x000204,   1, 0x04, 0x00000006 },
 568         { 0x000208,   1, 0x04, 0x00000000 },
 569         { 0x0002cc,   1, 0x04, 0x003fffff },
 570         { 0x0002d0,   1, 0x04, 0x00000c48 },
 571         { 0x001220,   1, 0x04, 0x00000005 },
 572         { 0x000fdc,   1, 0x04, 0x00000000 },
 573         { 0x000f98,   1, 0x04, 0x00300008 },
 574         { 0x001284,   1, 0x04, 0x04000080 },
 575         { 0x001450,   1, 0x04, 0x00300008 },
 576         { 0x001454,   1, 0x04, 0x04000080 },
 577         { 0x000214,   1, 0x04, 0x00000000 },
 578         {}
 579 };
 580 
 581 const struct gf100_gr_init
 582 gf100_grctx_init_902d_0[] = {
 583         { 0x000200,   1, 0x04, 0x000000cf },
 584         { 0x000204,   1, 0x04, 0x00000001 },
 585         { 0x000208,   1, 0x04, 0x00000020 },
 586         { 0x00020c,   1, 0x04, 0x00000001 },
 587         { 0x000210,   1, 0x04, 0x00000000 },
 588         { 0x000214,   1, 0x04, 0x00000080 },
 589         { 0x000218,   2, 0x04, 0x00000100 },
 590         { 0x000220,   2, 0x04, 0x00000000 },
 591         { 0x000230,   1, 0x04, 0x000000cf },
 592         { 0x000234,   1, 0x04, 0x00000001 },
 593         { 0x000238,   1, 0x04, 0x00000020 },
 594         { 0x00023c,   1, 0x04, 0x00000001 },
 595         { 0x000244,   1, 0x04, 0x00000080 },
 596         { 0x000248,   2, 0x04, 0x00000100 },
 597         {}
 598 };
 599 
 600 const struct gf100_gr_init
 601 gf100_grctx_init_9039_0[] = {
 602         { 0x00030c,   3, 0x04, 0x00000000 },
 603         { 0x000320,   1, 0x04, 0x00000000 },
 604         { 0x000238,   2, 0x04, 0x00000000 },
 605         { 0x000318,   2, 0x04, 0x00000000 },
 606         {}
 607 };
 608 
 609 const struct gf100_gr_init
 610 gf100_grctx_init_90c0_0[] = {
 611         { 0x00270c,   8, 0x20, 0x00000000 },
 612         { 0x00030c,   1, 0x04, 0x00000001 },
 613         { 0x001944,   1, 0x04, 0x00000000 },
 614         { 0x000758,   1, 0x04, 0x00000100 },
 615         { 0x0002c4,   1, 0x04, 0x00000000 },
 616         { 0x000790,   5, 0x04, 0x00000000 },
 617         { 0x00077c,   1, 0x04, 0x00000000 },
 618         { 0x000204,   3, 0x04, 0x00000000 },
 619         { 0x000214,   1, 0x04, 0x00000000 },
 620         { 0x00024c,   1, 0x04, 0x00000000 },
 621         { 0x000d94,   1, 0x04, 0x00000001 },
 622         { 0x001608,   2, 0x04, 0x00000000 },
 623         { 0x001664,   1, 0x04, 0x00000000 },
 624         {}
 625 };
 626 
 627 const struct gf100_gr_pack
 628 gf100_grctx_pack_mthd[] = {
 629         { gf100_grctx_init_9097_0, 0x9097 },
 630         { gf100_grctx_init_902d_0, 0x902d },
 631         { gf100_grctx_init_9039_0, 0x9039 },
 632         { gf100_grctx_init_90c0_0, 0x90c0 },
 633         {}
 634 };
 635 
 636 const struct gf100_gr_init
 637 gf100_grctx_init_main_0[] = {
 638         { 0x400204,   2, 0x04, 0x00000000 },
 639         {}
 640 };
 641 
 642 const struct gf100_gr_init
 643 gf100_grctx_init_fe_0[] = {
 644         { 0x404004,  11, 0x04, 0x00000000 },
 645         { 0x404044,   1, 0x04, 0x00000000 },
 646         { 0x404094,  13, 0x04, 0x00000000 },
 647         { 0x4040c8,   1, 0x04, 0xf0000087 },
 648         { 0x4040d0,   6, 0x04, 0x00000000 },
 649         { 0x4040e8,   1, 0x04, 0x00001000 },
 650         { 0x4040f8,   1, 0x04, 0x00000000 },
 651         { 0x404130,   2, 0x04, 0x00000000 },
 652         { 0x404138,   1, 0x04, 0x20000040 },
 653         { 0x404150,   1, 0x04, 0x0000002e },
 654         { 0x404154,   1, 0x04, 0x00000400 },
 655         { 0x404158,   1, 0x04, 0x00000200 },
 656         { 0x404164,   1, 0x04, 0x00000055 },
 657         { 0x404168,   1, 0x04, 0x00000000 },
 658         { 0x404174,   3, 0x04, 0x00000000 },
 659         { 0x404200,   8, 0x04, 0x00000000 },
 660         {}
 661 };
 662 
 663 const struct gf100_gr_init
 664 gf100_grctx_init_pri_0[] = {
 665         { 0x404404,  14, 0x04, 0x00000000 },
 666         { 0x404460,   2, 0x04, 0x00000000 },
 667         { 0x404468,   1, 0x04, 0x00ffffff },
 668         { 0x40446c,   1, 0x04, 0x00000000 },
 669         { 0x404480,   1, 0x04, 0x00000001 },
 670         { 0x404498,   1, 0x04, 0x00000001 },
 671         {}
 672 };
 673 
 674 const struct gf100_gr_init
 675 gf100_grctx_init_memfmt_0[] = {
 676         { 0x404604,   1, 0x04, 0x00000015 },
 677         { 0x404608,   1, 0x04, 0x00000000 },
 678         { 0x40460c,   1, 0x04, 0x00002e00 },
 679         { 0x404610,   1, 0x04, 0x00000100 },
 680         { 0x404618,   8, 0x04, 0x00000000 },
 681         { 0x404638,   1, 0x04, 0x00000004 },
 682         { 0x40463c,   8, 0x04, 0x00000000 },
 683         { 0x40465c,   1, 0x04, 0x007f0100 },
 684         { 0x404660,   7, 0x04, 0x00000000 },
 685         { 0x40467c,   1, 0x04, 0x00000002 },
 686         { 0x404680,   8, 0x04, 0x00000000 },
 687         { 0x4046a0,   1, 0x04, 0x007f0080 },
 688         { 0x4046a4,  18, 0x04, 0x00000000 },
 689         { 0x4046f0,   2, 0x04, 0x00000000 },
 690         { 0x404700,  13, 0x04, 0x00000000 },
 691         { 0x404734,   1, 0x04, 0x00000100 },
 692         { 0x404738,   8, 0x04, 0x00000000 },
 693         {}
 694 };
 695 
 696 static const struct gf100_gr_init
 697 gf100_grctx_init_ds_0[] = {
 698         { 0x405800,   1, 0x04, 0x078000bf },
 699         { 0x405830,   1, 0x04, 0x02180000 },
 700         { 0x405834,   2, 0x04, 0x00000000 },
 701         { 0x405854,   1, 0x04, 0x00000000 },
 702         { 0x405870,   4, 0x04, 0x00000001 },
 703         { 0x405a00,   2, 0x04, 0x00000000 },
 704         { 0x405a18,   1, 0x04, 0x00000000 },
 705         {}
 706 };
 707 
 708 static const struct gf100_gr_init
 709 gf100_grctx_init_pd_0[] = {
 710         { 0x406020,   1, 0x04, 0x000103c1 },
 711         { 0x406028,   4, 0x04, 0x00000001 },
 712         { 0x4064a8,   1, 0x04, 0x00000000 },
 713         { 0x4064ac,   1, 0x04, 0x00003fff },
 714         { 0x4064b4,   2, 0x04, 0x00000000 },
 715         {}
 716 };
 717 
 718 const struct gf100_gr_init
 719 gf100_grctx_init_rstr2d_0[] = {
 720         { 0x407804,   1, 0x04, 0x00000023 },
 721         { 0x40780c,   1, 0x04, 0x0a418820 },
 722         { 0x407810,   1, 0x04, 0x062080e6 },
 723         { 0x407814,   1, 0x04, 0x020398a4 },
 724         { 0x407818,   1, 0x04, 0x0e629062 },
 725         { 0x40781c,   1, 0x04, 0x0a418820 },
 726         { 0x407820,   1, 0x04, 0x000000e6 },
 727         { 0x4078bc,   1, 0x04, 0x00000103 },
 728         {}
 729 };
 730 
 731 const struct gf100_gr_init
 732 gf100_grctx_init_scc_0[] = {
 733         { 0x408000,   2, 0x04, 0x00000000 },
 734         { 0x408008,   1, 0x04, 0x00000018 },
 735         { 0x40800c,   2, 0x04, 0x00000000 },
 736         { 0x408014,   1, 0x04, 0x00000069 },
 737         { 0x408018,   1, 0x04, 0xe100e100 },
 738         { 0x408064,   1, 0x04, 0x00000000 },
 739         {}
 740 };
 741 
 742 static const struct gf100_gr_init
 743 gf100_grctx_init_be_0[] = {
 744         { 0x408800,   1, 0x04, 0x02802a3c },
 745         { 0x408804,   1, 0x04, 0x00000040 },
 746         { 0x408808,   1, 0x04, 0x0003e00d },
 747         { 0x408900,   1, 0x04, 0x3080b801 },
 748         { 0x408904,   1, 0x04, 0x02000001 },
 749         { 0x408908,   1, 0x04, 0x00c80929 },
 750         { 0x408980,   1, 0x04, 0x0000011d },
 751         {}
 752 };
 753 
 754 const struct gf100_gr_pack
 755 gf100_grctx_pack_hub[] = {
 756         { gf100_grctx_init_main_0 },
 757         { gf100_grctx_init_fe_0 },
 758         { gf100_grctx_init_pri_0 },
 759         { gf100_grctx_init_memfmt_0 },
 760         { gf100_grctx_init_ds_0 },
 761         { gf100_grctx_init_pd_0 },
 762         { gf100_grctx_init_rstr2d_0 },
 763         { gf100_grctx_init_scc_0 },
 764         { gf100_grctx_init_be_0 },
 765         {}
 766 };
 767 
 768 const struct gf100_gr_init
 769 gf100_grctx_init_gpc_unk_0[] = {
 770         { 0x418380,   1, 0x04, 0x00000016 },
 771         {}
 772 };
 773 
 774 const struct gf100_gr_init
 775 gf100_grctx_init_prop_0[] = {
 776         { 0x418400,   1, 0x04, 0x38004e00 },
 777         { 0x418404,   1, 0x04, 0x71e0ffff },
 778         { 0x418408,   1, 0x04, 0x00000000 },
 779         { 0x41840c,   1, 0x04, 0x00001008 },
 780         { 0x418410,   1, 0x04, 0x0fff0fff },
 781         { 0x418414,   1, 0x04, 0x00200fff },
 782         { 0x418450,   6, 0x04, 0x00000000 },
 783         { 0x418468,   1, 0x04, 0x00000001 },
 784         { 0x41846c,   2, 0x04, 0x00000000 },
 785         {}
 786 };
 787 
 788 const struct gf100_gr_init
 789 gf100_grctx_init_gpc_unk_1[] = {
 790         { 0x418600,   1, 0x04, 0x0000001f },
 791         { 0x418684,   1, 0x04, 0x0000000f },
 792         { 0x418700,   1, 0x04, 0x00000002 },
 793         { 0x418704,   1, 0x04, 0x00000080 },
 794         { 0x418708,   1, 0x04, 0x00000000 },
 795         { 0x41870c,   1, 0x04, 0x07c80000 },
 796         { 0x418710,   1, 0x04, 0x00000000 },
 797         {}
 798 };
 799 
 800 static const struct gf100_gr_init
 801 gf100_grctx_init_setup_0[] = {
 802         { 0x418800,   1, 0x04, 0x0006860a },
 803         { 0x418808,   3, 0x04, 0x00000000 },
 804         { 0x418828,   1, 0x04, 0x00008442 },
 805         { 0x418830,   1, 0x04, 0x00000001 },
 806         { 0x4188d8,   1, 0x04, 0x00000008 },
 807         { 0x4188e0,   1, 0x04, 0x01000000 },
 808         { 0x4188e8,   5, 0x04, 0x00000000 },
 809         { 0x4188fc,   1, 0x04, 0x00100000 },
 810         {}
 811 };
 812 
 813 const struct gf100_gr_init
 814 gf100_grctx_init_zcull_0[] = {
 815         { 0x41891c,   1, 0x04, 0x00ff00ff },
 816         { 0x418924,   1, 0x04, 0x00000000 },
 817         { 0x418928,   1, 0x04, 0x00ffff00 },
 818         { 0x41892c,   1, 0x04, 0x0000ff00 },
 819         {}
 820 };
 821 
 822 const struct gf100_gr_init
 823 gf100_grctx_init_crstr_0[] = {
 824         { 0x418b00,   1, 0x04, 0x00000000 },
 825         { 0x418b08,   1, 0x04, 0x0a418820 },
 826         { 0x418b0c,   1, 0x04, 0x062080e6 },
 827         { 0x418b10,   1, 0x04, 0x020398a4 },
 828         { 0x418b14,   1, 0x04, 0x0e629062 },
 829         { 0x418b18,   1, 0x04, 0x0a418820 },
 830         { 0x418b1c,   1, 0x04, 0x000000e6 },
 831         { 0x418bb8,   1, 0x04, 0x00000103 },
 832         {}
 833 };
 834 
 835 const struct gf100_gr_init
 836 gf100_grctx_init_gpm_0[] = {
 837         { 0x418c08,   1, 0x04, 0x00000001 },
 838         { 0x418c10,   8, 0x04, 0x00000000 },
 839         { 0x418c80,   1, 0x04, 0x20200004 },
 840         { 0x418c8c,   1, 0x04, 0x00000001 },
 841         {}
 842 };
 843 
 844 const struct gf100_gr_init
 845 gf100_grctx_init_gcc_0[] = {
 846         { 0x419000,   1, 0x04, 0x00000780 },
 847         { 0x419004,   2, 0x04, 0x00000000 },
 848         { 0x419014,   1, 0x04, 0x00000004 },
 849         {}
 850 };
 851 
 852 const struct gf100_gr_pack
 853 gf100_grctx_pack_gpc_0[] = {
 854         { gf100_grctx_init_gpc_unk_0 },
 855         { gf100_grctx_init_prop_0 },
 856         { gf100_grctx_init_gpc_unk_1 },
 857         { gf100_grctx_init_setup_0 },
 858         { gf100_grctx_init_zcull_0 },
 859         {}
 860 };
 861 
 862 const struct gf100_gr_pack
 863 gf100_grctx_pack_gpc_1[] = {
 864         { gf100_grctx_init_crstr_0 },
 865         { gf100_grctx_init_gpm_0 },
 866         { gf100_grctx_init_gcc_0 },
 867         {}
 868 };
 869 
 870 static const struct gf100_gr_init
 871 gf100_grctx_init_zcullr_0[] = {
 872         { 0x418a00,   3, 0x04, 0x00000000 },
 873         { 0x418a0c,   1, 0x04, 0x00010000 },
 874         { 0x418a10,   3, 0x04, 0x00000000 },
 875         { 0x418a20,   3, 0x04, 0x00000000 },
 876         { 0x418a2c,   1, 0x04, 0x00010000 },
 877         { 0x418a30,   3, 0x04, 0x00000000 },
 878         { 0x418a40,   3, 0x04, 0x00000000 },
 879         { 0x418a4c,   1, 0x04, 0x00010000 },
 880         { 0x418a50,   3, 0x04, 0x00000000 },
 881         { 0x418a60,   3, 0x04, 0x00000000 },
 882         { 0x418a6c,   1, 0x04, 0x00010000 },
 883         { 0x418a70,   3, 0x04, 0x00000000 },
 884         { 0x418a80,   3, 0x04, 0x00000000 },
 885         { 0x418a8c,   1, 0x04, 0x00010000 },
 886         { 0x418a90,   3, 0x04, 0x00000000 },
 887         { 0x418aa0,   3, 0x04, 0x00000000 },
 888         { 0x418aac,   1, 0x04, 0x00010000 },
 889         { 0x418ab0,   3, 0x04, 0x00000000 },
 890         { 0x418ac0,   3, 0x04, 0x00000000 },
 891         { 0x418acc,   1, 0x04, 0x00010000 },
 892         { 0x418ad0,   3, 0x04, 0x00000000 },
 893         { 0x418ae0,   3, 0x04, 0x00000000 },
 894         { 0x418aec,   1, 0x04, 0x00010000 },
 895         { 0x418af0,   3, 0x04, 0x00000000 },
 896         {}
 897 };
 898 
 899 const struct gf100_gr_pack
 900 gf100_grctx_pack_zcull[] = {
 901         { gf100_grctx_init_zcullr_0 },
 902         {}
 903 };
 904 
 905 const struct gf100_gr_init
 906 gf100_grctx_init_pe_0[] = {
 907         { 0x419818,   1, 0x04, 0x00000000 },
 908         { 0x41983c,   1, 0x04, 0x00038bc7 },
 909         { 0x419848,   1, 0x04, 0x00000000 },
 910         { 0x419864,   1, 0x04, 0x0000012a },
 911         { 0x419888,   1, 0x04, 0x00000000 },
 912         {}
 913 };
 914 
 915 static const struct gf100_gr_init
 916 gf100_grctx_init_tex_0[] = {
 917         { 0x419a00,   1, 0x04, 0x000001f0 },
 918         { 0x419a04,   1, 0x04, 0x00000001 },
 919         { 0x419a08,   1, 0x04, 0x00000023 },
 920         { 0x419a0c,   1, 0x04, 0x00020000 },
 921         { 0x419a10,   1, 0x04, 0x00000000 },
 922         { 0x419a14,   1, 0x04, 0x00000200 },
 923         {}
 924 };
 925 
 926 const struct gf100_gr_init
 927 gf100_grctx_init_wwdx_0[] = {
 928         { 0x419b00,   1, 0x04, 0x0a418820 },
 929         { 0x419b04,   1, 0x04, 0x062080e6 },
 930         { 0x419b08,   1, 0x04, 0x020398a4 },
 931         { 0x419b0c,   1, 0x04, 0x0e629062 },
 932         { 0x419b10,   1, 0x04, 0x0a418820 },
 933         { 0x419b14,   1, 0x04, 0x000000e6 },
 934         { 0x419bd0,   1, 0x04, 0x00900103 },
 935         { 0x419be0,   1, 0x04, 0x00000001 },
 936         { 0x419be4,   1, 0x04, 0x00000000 },
 937         {}
 938 };
 939 
 940 const struct gf100_gr_init
 941 gf100_grctx_init_mpc_0[] = {
 942         { 0x419c00,   1, 0x04, 0x00000002 },
 943         { 0x419c04,   1, 0x04, 0x00000006 },
 944         { 0x419c08,   1, 0x04, 0x00000002 },
 945         { 0x419c20,   1, 0x04, 0x00000000 },
 946         {}
 947 };
 948 
 949 static const struct gf100_gr_init
 950 gf100_grctx_init_l1c_0[] = {
 951         { 0x419cb0,   1, 0x04, 0x00060048 },
 952         { 0x419ce8,   1, 0x04, 0x00000000 },
 953         { 0x419cf4,   1, 0x04, 0x00000183 },
 954         {}
 955 };
 956 
 957 const struct gf100_gr_init
 958 gf100_grctx_init_tpccs_0[] = {
 959         { 0x419d20,   1, 0x04, 0x02180000 },
 960         { 0x419d24,   1, 0x04, 0x00001fff },
 961         {}
 962 };
 963 
 964 static const struct gf100_gr_init
 965 gf100_grctx_init_sm_0[] = {
 966         { 0x419e04,   3, 0x04, 0x00000000 },
 967         { 0x419e10,   1, 0x04, 0x00000002 },
 968         { 0x419e44,   1, 0x04, 0x001beff2 },
 969         { 0x419e48,   1, 0x04, 0x00000000 },
 970         { 0x419e4c,   1, 0x04, 0x0000000f },
 971         { 0x419e50,  17, 0x04, 0x00000000 },
 972         { 0x419e98,   1, 0x04, 0x00000000 },
 973         { 0x419f50,   2, 0x04, 0x00000000 },
 974         {}
 975 };
 976 
 977 const struct gf100_gr_pack
 978 gf100_grctx_pack_tpc[] = {
 979         { gf100_grctx_init_pe_0 },
 980         { gf100_grctx_init_tex_0 },
 981         { gf100_grctx_init_wwdx_0 },
 982         { gf100_grctx_init_mpc_0 },
 983         { gf100_grctx_init_l1c_0 },
 984         { gf100_grctx_init_tpccs_0 },
 985         { gf100_grctx_init_sm_0 },
 986         {}
 987 };
 988 
 989 /*******************************************************************************
 990  * PGRAPH context implementation
 991  ******************************************************************************/
 992 
 993 int
 994 gf100_grctx_mmio_data(struct gf100_grctx *info, u32 size, u32 align, bool priv)
 995 {
 996         if (info->data) {
 997                 info->buffer[info->buffer_nr] = round_up(info->addr, align);
 998                 info->addr = info->buffer[info->buffer_nr] + size;
 999                 info->data->size = size;
1000                 info->data->align = align;
1001                 info->data->priv = priv;
1002                 info->data++;
1003                 return info->buffer_nr++;
1004         }
1005         return -1;
1006 }
1007 
1008 void
1009 gf100_grctx_mmio_item(struct gf100_grctx *info, u32 addr, u32 data,
1010                       int shift, int buffer)
1011 {
1012         struct nvkm_device *device = info->gr->base.engine.subdev.device;
1013         if (info->data) {
1014                 if (shift >= 0) {
1015                         info->mmio->addr = addr;
1016                         info->mmio->data = data;
1017                         info->mmio->shift = shift;
1018                         info->mmio->buffer = buffer;
1019                         if (buffer >= 0)
1020                                 data |= info->buffer[buffer] >> shift;
1021                         info->mmio++;
1022                 } else
1023                         return;
1024         } else {
1025                 if (buffer >= 0)
1026                         return;
1027         }
1028 
1029         nvkm_wr32(device, addr, data);
1030 }
1031 
1032 void
1033 gf100_grctx_generate_r419cb8(struct gf100_gr *gr)
1034 {
1035         struct nvkm_device *device = gr->base.engine.subdev.device;
1036         nvkm_mask(device, 0x419cb8, 0x00007c00, 0x00000000);
1037 }
1038 
1039 void
1040 gf100_grctx_generate_bundle(struct gf100_grctx *info)
1041 {
1042         const struct gf100_grctx_func *grctx = info->gr->func->grctx;
1043         const int s = 8;
1044         const int b = mmio_vram(info, grctx->bundle_size, (1 << s), true);
1045         mmio_refn(info, 0x408004, 0x00000000, s, b);
1046         mmio_wr32(info, 0x408008, 0x80000000 | (grctx->bundle_size >> s));
1047         mmio_refn(info, 0x418808, 0x00000000, s, b);
1048         mmio_wr32(info, 0x41880c, 0x80000000 | (grctx->bundle_size >> s));
1049 }
1050 
1051 void
1052 gf100_grctx_generate_pagepool(struct gf100_grctx *info)
1053 {
1054         const struct gf100_grctx_func *grctx = info->gr->func->grctx;
1055         const int s = 8;
1056         const int b = mmio_vram(info, grctx->pagepool_size, (1 << s), true);
1057         mmio_refn(info, 0x40800c, 0x00000000, s, b);
1058         mmio_wr32(info, 0x408010, 0x80000000);
1059         mmio_refn(info, 0x419004, 0x00000000, s, b);
1060         mmio_wr32(info, 0x419008, 0x00000000);
1061 }
1062 
1063 void
1064 gf100_grctx_generate_attrib(struct gf100_grctx *info)
1065 {
1066         struct gf100_gr *gr = info->gr;
1067         const struct gf100_grctx_func *grctx = gr->func->grctx;
1068         const u32 attrib = grctx->attrib_nr;
1069         const u32   size = 0x20 * (grctx->attrib_nr_max + grctx->alpha_nr_max);
1070         const int s = 12;
1071         const int b = mmio_vram(info, size * gr->tpc_total, (1 << s), false);
1072         int gpc, tpc;
1073         u32 bo = 0;
1074 
1075         mmio_refn(info, 0x418810, 0x80000000, s, b);
1076         mmio_refn(info, 0x419848, 0x10000000, s, b);
1077         mmio_wr32(info, 0x405830, (attrib << 16));
1078 
1079         for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
1080                 for (tpc = 0; tpc < gr->tpc_nr[gpc]; tpc++) {
1081                         const u32 o = TPC_UNIT(gpc, tpc, 0x0520);
1082                         mmio_skip(info, o, (attrib << 16) | ++bo);
1083                         mmio_wr32(info, o, (attrib << 16) | --bo);
1084                         bo += grctx->attrib_nr_max;
1085                 }
1086         }
1087 }
1088 
1089 void
1090 gf100_grctx_generate_unkn(struct gf100_gr *gr)
1091 {
1092 }
1093 
1094 void
1095 gf100_grctx_generate_r4060a8(struct gf100_gr *gr)
1096 {
1097         struct nvkm_device *device = gr->base.engine.subdev.device;
1098         const u8 gpcmax = nvkm_rd32(device, 0x022430);
1099         const u8 tpcmax = nvkm_rd32(device, 0x022434) * gpcmax;
1100         int i, j, sm = 0;
1101         u32 data;
1102 
1103         for (i = 0; i < DIV_ROUND_UP(tpcmax, 4); i++) {
1104                 for (data = 0, j = 0; j < 4; j++) {
1105                         if (sm < gr->sm_nr)
1106                                 data |= gr->sm[sm++].gpc << (j * 8);
1107                         else
1108                                 data |= 0x1f << (j * 8);
1109                 }
1110                 nvkm_wr32(device, 0x4060a8 + (i * 4), data);
1111         }
1112 }
1113 
1114 void
1115 gf100_grctx_generate_rop_mapping(struct gf100_gr *gr)
1116 {
1117         struct nvkm_device *device = gr->base.engine.subdev.device;
1118         u32 data[6] = {}, data2[2] = {};
1119         u8  shift, ntpcv;
1120         int i;
1121 
1122         /* Pack tile map into register format. */
1123         for (i = 0; i < 32; i++)
1124                 data[i / 6] |= (gr->tile[i] & 0x07) << ((i % 6) * 5);
1125 
1126         /* Magic. */
1127         shift = 0;
1128         ntpcv = gr->tpc_total;
1129         while (!(ntpcv & (1 << 4))) {
1130                 ntpcv <<= 1;
1131                 shift++;
1132         }
1133 
1134         data2[0]  = (ntpcv << 16);
1135         data2[0] |= (shift << 21);
1136         data2[0] |= (((1 << (0 + 5)) % ntpcv) << 24);
1137         for (i = 1; i < 7; i++)
1138                 data2[1] |= ((1 << (i + 5)) % ntpcv) << ((i - 1) * 5);
1139 
1140         /* GPC_BROADCAST */
1141         nvkm_wr32(device, 0x418bb8, (gr->tpc_total << 8) |
1142                                      gr->screen_tile_row_offset);
1143         for (i = 0; i < 6; i++)
1144                 nvkm_wr32(device, 0x418b08 + (i * 4), data[i]);
1145 
1146         /* GPC_BROADCAST.TP_BROADCAST */
1147         nvkm_wr32(device, 0x419bd0, (gr->tpc_total << 8) |
1148                                      gr->screen_tile_row_offset | data2[0]);
1149         nvkm_wr32(device, 0x419be4, data2[1]);
1150         for (i = 0; i < 6; i++)
1151                 nvkm_wr32(device, 0x419b00 + (i * 4), data[i]);
1152 
1153         /* UNK78xx */
1154         nvkm_wr32(device, 0x4078bc, (gr->tpc_total << 8) |
1155                                      gr->screen_tile_row_offset);
1156         for (i = 0; i < 6; i++)
1157                 nvkm_wr32(device, 0x40780c + (i * 4), data[i]);
1158 }
1159 
1160 void
1161 gf100_grctx_generate_max_ways_evict(struct gf100_gr *gr)
1162 {
1163         struct nvkm_device *device = gr->base.engine.subdev.device;
1164         u32 fbps = nvkm_rd32(device, 0x121c74);
1165         if (fbps == 1)
1166                 nvkm_mask(device, 0x17e91c, 0x001f0000, 0x00090000);
1167 }
1168 
1169 static const u32
1170 gf100_grctx_alpha_beta_map[17][32] = {
1171         [1] = {
1172                 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1173                 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1174         },
1175         [2] = {
1176                 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1177                 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
1178         },
1179         //XXX: 3
1180         [4] = {
1181                 1, 1, 1, 1, 1, 1, 1, 1,
1182                 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
1183                 3, 3, 3, 3, 3, 3, 3, 3,
1184         },
1185         //XXX: 5
1186         //XXX: 6
1187         [7] = {
1188                 1, 1, 1, 1,
1189                 2, 2, 2, 2, 2, 2,
1190                 3, 3, 3, 3, 3, 3,
1191                 4, 4, 4, 4, 4, 4,
1192                 5, 5, 5, 5, 5, 5,
1193                 6, 6, 6, 6,
1194         },
1195         [8] = {
1196                 1, 1, 1,
1197                 2, 2, 2, 2, 2,
1198                 3, 3, 3, 3, 3,
1199                 4, 4, 4, 4, 4, 4,
1200                 5, 5, 5, 5, 5,
1201                 6, 6, 6, 6, 6,
1202                 7, 7, 7,
1203         },
1204         //XXX: 9
1205         //XXX: 10
1206         [11] = {
1207                 1, 1,
1208                 2, 2, 2, 2,
1209                 3, 3, 3,
1210                 4, 4, 4, 4,
1211                 5, 5, 5,
1212                 6, 6, 6,
1213                 7, 7, 7, 7,
1214                 8, 8, 8,
1215                 9, 9, 9, 9,
1216                 10, 10,
1217         },
1218         //XXX: 12
1219         //XXX: 13
1220         [14] = {
1221                 1, 1,
1222                 2, 2,
1223                 3, 3, 3,
1224                 4, 4, 4,
1225                 5, 5,
1226                 6, 6, 6,
1227                 7, 7,
1228                 8, 8, 8,
1229                 9, 9,
1230                 10, 10, 10,
1231                 11, 11, 11,
1232                 12, 12,
1233                 13, 13,
1234         },
1235         [15] = {
1236                 1, 1,
1237                 2, 2,
1238                 3, 3,
1239                 4, 4, 4,
1240                 5, 5,
1241                 6, 6, 6,
1242                 7, 7,
1243                 8, 8,
1244                 9, 9, 9,
1245                 10, 10,
1246                 11, 11, 11,
1247                 12, 12,
1248                 13, 13,
1249                 14, 14,
1250         },
1251         [16] = {
1252                 1, 1,
1253                 2, 2,
1254                 3, 3,
1255                 4, 4,
1256                 5, 5,
1257                 6, 6, 6,
1258                 7, 7,
1259                 8, 8,
1260                 9, 9,
1261                 10, 10, 10,
1262                 11, 11,
1263                 12, 12,
1264                 13, 13,
1265                 14, 14,
1266                 15, 15,
1267         },
1268 };
1269 
1270 void
1271 gf100_grctx_generate_alpha_beta_tables(struct gf100_gr *gr)
1272 {
1273         struct nvkm_subdev *subdev = &gr->base.engine.subdev;
1274         struct nvkm_device *device = subdev->device;
1275         int i, gpc;
1276 
1277         for (i = 0; i < 32; i++) {
1278                 u32 atarget = gf100_grctx_alpha_beta_map[gr->tpc_total][i];
1279                 u32 abits[GPC_MAX] = {}, amask = 0, bmask = 0;
1280 
1281                 if (!atarget) {
1282                         nvkm_warn(subdev, "missing alpha/beta mapping table\n");
1283                         atarget = max_t(u32, gr->tpc_total * i / 32, 1);
1284                 }
1285 
1286                 while (atarget) {
1287                         for (gpc = 0; atarget && gpc < gr->gpc_nr; gpc++) {
1288                                 if (abits[gpc] < gr->tpc_nr[gpc]) {
1289                                         abits[gpc]++;
1290                                         atarget--;
1291                                 }
1292                         }
1293                 }
1294 
1295                 for (gpc = 0; gpc < gr->gpc_nr; gpc++) {
1296                         u32 bbits = gr->tpc_nr[gpc] - abits[gpc];
1297                         amask |= ((1 << abits[gpc]) - 1) << (gpc * 8);
1298                         bmask |= ((1 << bbits) - 1) << abits[gpc] << (gpc * 8);
1299                 }
1300 
1301                 nvkm_wr32(device, 0x406800 + (i * 0x20), amask);
1302                 nvkm_wr32(device, 0x406c00 + (i * 0x20), bmask);
1303         }
1304 }
1305 
1306 void
1307 gf100_grctx_generate_tpc_nr(struct gf100_gr *gr, int gpc)
1308 {
1309         struct nvkm_device *device = gr->base.engine.subdev.device;
1310         nvkm_wr32(device, GPC_UNIT(gpc, 0x0c08), gr->tpc_nr[gpc]);
1311         nvkm_wr32(device, GPC_UNIT(gpc, 0x0c8c), gr->tpc_nr[gpc]);
1312 }
1313 
1314 void
1315 gf100_grctx_generate_sm_id(struct gf100_gr *gr, int gpc, int tpc, int sm)
1316 {
1317         struct nvkm_device *device = gr->base.engine.subdev.device;
1318         nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x698), sm);
1319         nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x4e8), sm);
1320         nvkm_wr32(device, GPC_UNIT(gpc, 0x0c10 + tpc * 4), sm);
1321         nvkm_wr32(device, TPC_UNIT(gpc, tpc, 0x088), sm);
1322 }
1323 
1324 void
1325 gf100_grctx_generate_floorsweep(struct gf100_gr *gr)
1326 {
1327         struct nvkm_device *device = gr->base.engine.subdev.device;
1328         const struct gf100_grctx_func *func = gr->func->grctx;
1329         int gpc, sm, i, j;
1330         u32 data;
1331 
1332         for (sm = 0; sm < gr->sm_nr; sm++) {
1333                 func->sm_id(gr, gr->sm[sm].gpc, gr->sm[sm].tpc, sm);
1334                 if (func->tpc_nr)
1335                         func->tpc_nr(gr, gr->sm[sm].gpc);
1336         }
1337 
1338         for (gpc = 0, i = 0; i < 4; i++) {
1339                 for (data = 0, j = 0; j < 8 && gpc < gr->gpc_nr; j++, gpc++)
1340                         data |= gr->tpc_nr[gpc] << (j * 4);
1341                 nvkm_wr32(device, 0x406028 + (i * 4), data);
1342                 nvkm_wr32(device, 0x405870 + (i * 4), data);
1343         }
1344 
1345         if (func->r4060a8)
1346                 func->r4060a8(gr);
1347 
1348         func->rop_mapping(gr);
1349 
1350         if (func->alpha_beta_tables)
1351                 func->alpha_beta_tables(gr);
1352         if (func->max_ways_evict)
1353                 func->max_ways_evict(gr);
1354         if (func->dist_skip_table)
1355                 func->dist_skip_table(gr);
1356         if (func->r406500)
1357                 func->r406500(gr);
1358         if (func->gpc_tpc_nr)
1359                 func->gpc_tpc_nr(gr);
1360         if (func->r419f78)
1361                 func->r419f78(gr);
1362         if (func->tpc_mask)
1363                 func->tpc_mask(gr);
1364         if (func->smid_config)
1365                 func->smid_config(gr);
1366 }
1367 
1368 void
1369 gf100_grctx_generate_main(struct gf100_gr *gr, struct gf100_grctx *info)
1370 {
1371         struct nvkm_device *device = gr->base.engine.subdev.device;
1372         const struct gf100_grctx_func *grctx = gr->func->grctx;
1373         u32 idle_timeout;
1374 
1375         nvkm_mc_unk260(device, 0);
1376 
1377         if (!gr->fuc_sw_ctx) {
1378                 gf100_gr_mmio(gr, grctx->hub);
1379                 gf100_gr_mmio(gr, grctx->gpc_0);
1380                 gf100_gr_mmio(gr, grctx->zcull);
1381                 gf100_gr_mmio(gr, grctx->gpc_1);
1382                 gf100_gr_mmio(gr, grctx->tpc);
1383                 gf100_gr_mmio(gr, grctx->ppc);
1384         } else {
1385                 gf100_gr_mmio(gr, gr->fuc_sw_ctx);
1386         }
1387 
1388         gf100_gr_wait_idle(gr);
1389 
1390         idle_timeout = nvkm_mask(device, 0x404154, 0xffffffff, 0x00000000);
1391 
1392         grctx->pagepool(info);
1393         grctx->bundle(info);
1394         grctx->attrib(info);
1395         if (grctx->patch_ltc)
1396                 grctx->patch_ltc(info);
1397         grctx->unkn(gr);
1398 
1399         gf100_grctx_generate_floorsweep(gr);
1400 
1401         gf100_gr_wait_idle(gr);
1402 
1403         if (grctx->r400088) grctx->r400088(gr, false);
1404         if (gr->fuc_bundle)
1405                 gf100_gr_icmd(gr, gr->fuc_bundle);
1406         else
1407                 gf100_gr_icmd(gr, grctx->icmd);
1408         if (grctx->sw_veid_bundle_init)
1409                 gf100_gr_icmd(gr, grctx->sw_veid_bundle_init);
1410         if (grctx->r400088) grctx->r400088(gr, true);
1411 
1412         nvkm_wr32(device, 0x404154, idle_timeout);
1413 
1414         if (gr->fuc_method)
1415                 gf100_gr_mthd(gr, gr->fuc_method);
1416         else
1417                 gf100_gr_mthd(gr, grctx->mthd);
1418         nvkm_mc_unk260(device, 1);
1419 
1420         if (grctx->r419cb8)
1421                 grctx->r419cb8(gr);
1422         if (grctx->r418800)
1423                 grctx->r418800(gr);
1424         if (grctx->r419eb0)
1425                 grctx->r419eb0(gr);
1426         if (grctx->r419e00)
1427                 grctx->r419e00(gr);
1428         if (grctx->r418e94)
1429                 grctx->r418e94(gr);
1430         if (grctx->r419a3c)
1431                 grctx->r419a3c(gr);
1432         if (grctx->r408840)
1433                 grctx->r408840(gr);
1434 }
1435 
1436 #define CB_RESERVED 0x80000
1437 
1438 int
1439 gf100_grctx_generate(struct gf100_gr *gr)
1440 {
1441         const struct gf100_grctx_func *grctx = gr->func->grctx;
1442         struct nvkm_subdev *subdev = &gr->base.engine.subdev;
1443         struct nvkm_device *device = subdev->device;
1444         struct nvkm_memory *inst = NULL;
1445         struct nvkm_memory *data = NULL;
1446         struct nvkm_vmm *vmm = NULL;
1447         struct nvkm_vma *ctx = NULL;
1448         struct gf100_grctx info;
1449         int ret, i;
1450         u64 addr;
1451 
1452         /* NV_PGRAPH_FE_PWR_MODE_FORCE_ON. */
1453         nvkm_wr32(device, 0x404170, 0x00000012);
1454         nvkm_msec(device, 2000,
1455                 if (!(nvkm_rd32(device, 0x404170) & 0x00000010))
1456                         break;
1457         );
1458 
1459         if (grctx->unkn88c)
1460                 grctx->unkn88c(gr, true);
1461 
1462         /* Reset FECS. */
1463         nvkm_wr32(device, 0x409614, 0x00000070);
1464         nvkm_usec(device, 10, NVKM_DELAY);
1465         nvkm_mask(device, 0x409614, 0x00000700, 0x00000700);
1466         nvkm_usec(device, 10, NVKM_DELAY);
1467         nvkm_rd32(device, 0x409614);
1468 
1469         if (grctx->unkn88c)
1470                 grctx->unkn88c(gr, false);
1471 
1472         /* NV_PGRAPH_FE_PWR_MODE_AUTO. */
1473         nvkm_wr32(device, 0x404170, 0x00000010);
1474 
1475         /* Init SCC RAM. */
1476         nvkm_wr32(device, 0x40802c, 0x00000001);
1477 
1478         /* Allocate memory to for a "channel", which we'll use to generate
1479          * the default context values.
1480          */
1481         ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST,
1482                               0x1000, 0x1000, true, &inst);
1483         if (ret)
1484                 goto done;
1485 
1486         ret = nvkm_vmm_new(device, 0, 0, NULL, 0, NULL, "grctx", &vmm);
1487         if (ret)
1488                 goto done;
1489 
1490         vmm->debug = subdev->debug;
1491 
1492         ret = nvkm_vmm_join(vmm, inst);
1493         if (ret)
1494                 goto done;
1495 
1496         ret = nvkm_memory_new(device, NVKM_MEM_TARGET_INST,
1497                               CB_RESERVED + gr->size, 0, true, &data);
1498         if (ret)
1499                 goto done;
1500 
1501         ret = nvkm_vmm_get(vmm, 0, nvkm_memory_size(data), &ctx);
1502         if (ret)
1503                 goto done;
1504 
1505         ret = nvkm_memory_map(data, 0, vmm, ctx, NULL, 0);
1506         if (ret)
1507                 goto done;
1508 
1509 
1510         /* Setup context pointer. */
1511         nvkm_kmap(inst);
1512         nvkm_wo32(inst, 0x0210, lower_32_bits(ctx->addr + CB_RESERVED) | 4);
1513         nvkm_wo32(inst, 0x0214, upper_32_bits(ctx->addr + CB_RESERVED));
1514         nvkm_done(inst);
1515 
1516         /* Setup default state for mmio list construction. */
1517         info.gr = gr;
1518         info.data = gr->mmio_data;
1519         info.mmio = gr->mmio_list;
1520         info.addr = ctx->addr;
1521         info.buffer_nr = 0;
1522 
1523         /* Make channel current. */
1524         addr = nvkm_memory_addr(inst) >> 12;
1525         if (gr->firmware) {
1526                 ret = gf100_gr_fecs_bind_pointer(gr, 0x80000000 | addr);
1527                 if (ret)
1528                         goto done;
1529 
1530                 nvkm_kmap(data);
1531                 nvkm_wo32(data, 0x1c, 1);
1532                 nvkm_wo32(data, 0x20, 0);
1533                 nvkm_wo32(data, 0x28, 0);
1534                 nvkm_wo32(data, 0x2c, 0);
1535                 nvkm_done(data);
1536         } else {
1537                 nvkm_wr32(device, 0x409840, 0x80000000);
1538                 nvkm_wr32(device, 0x409500, 0x80000000 | addr);
1539                 nvkm_wr32(device, 0x409504, 0x00000001);
1540                 nvkm_msec(device, 2000,
1541                         if (nvkm_rd32(device, 0x409800) & 0x80000000)
1542                                 break;
1543                 );
1544         }
1545 
1546         grctx->main(gr, &info);
1547 
1548         /* Trigger a context unload by unsetting the "next channel valid" bit
1549          * and faking a context switch interrupt.
1550          */
1551         nvkm_mask(device, 0x409b04, 0x80000000, 0x00000000);
1552         nvkm_wr32(device, 0x409000, 0x00000100);
1553         if (nvkm_msec(device, 2000,
1554                 if (!(nvkm_rd32(device, 0x409b00) & 0x80000000))
1555                         break;
1556         ) < 0) {
1557                 ret = -EBUSY;
1558                 goto done;
1559         }
1560 
1561         gr->data = kmalloc(gr->size, GFP_KERNEL);
1562         if (gr->data) {
1563                 nvkm_kmap(data);
1564                 for (i = 0; i < gr->size; i += 4)
1565                         gr->data[i / 4] = nvkm_ro32(data, CB_RESERVED + i);
1566                 nvkm_done(data);
1567                 ret = 0;
1568         } else {
1569                 ret = -ENOMEM;
1570         }
1571 
1572 done:
1573         nvkm_vmm_put(vmm, &ctx);
1574         nvkm_memory_unref(&data);
1575         nvkm_vmm_part(vmm, inst);
1576         nvkm_vmm_unref(&vmm);
1577         nvkm_memory_unref(&inst);
1578         return ret;
1579 }
1580 
1581 const struct gf100_grctx_func
1582 gf100_grctx = {
1583         .main  = gf100_grctx_generate_main,
1584         .unkn  = gf100_grctx_generate_unkn,
1585         .hub   = gf100_grctx_pack_hub,
1586         .gpc_0 = gf100_grctx_pack_gpc_0,
1587         .gpc_1 = gf100_grctx_pack_gpc_1,
1588         .zcull = gf100_grctx_pack_zcull,
1589         .tpc   = gf100_grctx_pack_tpc,
1590         .icmd  = gf100_grctx_pack_icmd,
1591         .mthd  = gf100_grctx_pack_mthd,
1592         .bundle = gf100_grctx_generate_bundle,
1593         .bundle_size = 0x1800,
1594         .pagepool = gf100_grctx_generate_pagepool,
1595         .pagepool_size = 0x8000,
1596         .attrib = gf100_grctx_generate_attrib,
1597         .attrib_nr_max = 0x324,
1598         .attrib_nr = 0x218,
1599         .sm_id = gf100_grctx_generate_sm_id,
1600         .tpc_nr = gf100_grctx_generate_tpc_nr,
1601         .r4060a8 = gf100_grctx_generate_r4060a8,
1602         .rop_mapping = gf100_grctx_generate_rop_mapping,
1603         .alpha_beta_tables = gf100_grctx_generate_alpha_beta_tables,
1604         .max_ways_evict = gf100_grctx_generate_max_ways_evict,
1605         .r419cb8 = gf100_grctx_generate_r419cb8,
1606 };

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