root/drivers/gpu/drm/nouveau/nvkm/engine/mpeg/nv50.c

DEFINITIONS

1. nv50_mpeg_cclass_bind
2. nv50_mpeg_intr
3. nv50_mpeg_init
4. nv50_mpeg_new

   1 /*
   2  * Copyright 2012 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24 #include "priv.h"
  25 
  26 #include <core/gpuobj.h>
  27 #include <core/object.h>
  28 #include <subdev/timer.h>
  29 
  30 #include <nvif/class.h>
  31 
  32 /*******************************************************************************
  33  * PMPEG context
  34  ******************************************************************************/
  35 
  36 static int
  37 nv50_mpeg_cclass_bind(struct nvkm_object *object, struct nvkm_gpuobj *parent,
  38                       int align, struct nvkm_gpuobj **pgpuobj)
  39 {
  40         int ret = nvkm_gpuobj_new(object->engine->subdev.device, 128 * 4,
  41                                   align, true, parent, pgpuobj);
  42         if (ret == 0) {
  43                 nvkm_kmap(*pgpuobj);
  44                 nvkm_wo32(*pgpuobj, 0x70, 0x00801ec1);
  45                 nvkm_wo32(*pgpuobj, 0x7c, 0x0000037c);
  46                 nvkm_done(*pgpuobj);
  47         }
  48         return ret;
  49 }
  50 
  51 const struct nvkm_object_func
  52 nv50_mpeg_cclass = {
  53         .bind = nv50_mpeg_cclass_bind,
  54 };
  55 
  56 /*******************************************************************************
  57  * PMPEG engine/subdev functions
  58  ******************************************************************************/
  59 
  60 void
  61 nv50_mpeg_intr(struct nvkm_engine *mpeg)
  62 {
  63         struct nvkm_subdev *subdev = &mpeg->subdev;
  64         struct nvkm_device *device = subdev->device;
  65         u32 stat = nvkm_rd32(device, 0x00b100);
  66         u32 type = nvkm_rd32(device, 0x00b230);
  67         u32 mthd = nvkm_rd32(device, 0x00b234);
  68         u32 data = nvkm_rd32(device, 0x00b238);
  69         u32 show = stat;
  70 
  71         if (stat & 0x01000000) {
  72                 /* happens on initial binding of the object */
  73                 if (type == 0x00000020 && mthd == 0x0000) {
  74                         nvkm_wr32(device, 0x00b308, 0x00000100);
  75                         show &= ~0x01000000;
  76                 }
  77         }
  78 
  79         if (show) {
  80                 nvkm_info(subdev, "%08x %08x %08x %08x\n",
  81                           stat, type, mthd, data);
  82         }
  83 
  84         nvkm_wr32(device, 0x00b100, stat);
  85         nvkm_wr32(device, 0x00b230, 0x00000001);
  86 }
  87 
  88 int
  89 nv50_mpeg_init(struct nvkm_engine *mpeg)
  90 {
  91         struct nvkm_subdev *subdev = &mpeg->subdev;
  92         struct nvkm_device *device = subdev->device;
  93 
  94         nvkm_wr32(device, 0x00b32c, 0x00000000);
  95         nvkm_wr32(device, 0x00b314, 0x00000100);
  96         nvkm_wr32(device, 0x00b0e0, 0x0000001a);
  97 
  98         nvkm_wr32(device, 0x00b220, 0x00000044);
  99         nvkm_wr32(device, 0x00b300, 0x00801ec1);
 100         nvkm_wr32(device, 0x00b390, 0x00000000);
 101         nvkm_wr32(device, 0x00b394, 0x00000000);
 102         nvkm_wr32(device, 0x00b398, 0x00000000);
 103         nvkm_mask(device, 0x00b32c, 0x00000001, 0x00000001);
 104 
 105         nvkm_wr32(device, 0x00b100, 0xffffffff);
 106         nvkm_wr32(device, 0x00b140, 0xffffffff);
 107 
 108         if (nvkm_msec(device, 2000,
 109                 if (!(nvkm_rd32(device, 0x00b200) & 0x00000001))
 110                         break;
 111         ) < 0) {
 112                 nvkm_error(subdev, "timeout %08x\n",
 113                            nvkm_rd32(device, 0x00b200));
 114                 return -EBUSY;
 115         }
 116 
 117         return 0;
 118 }
 119 
 120 static const struct nvkm_engine_func
 121 nv50_mpeg = {
 122         .init = nv50_mpeg_init,
 123         .intr = nv50_mpeg_intr,
 124         .cclass = &nv50_mpeg_cclass,
 125         .sclass = {
 126                 { -1, -1, NV31_MPEG, &nv31_mpeg_object },
 127                 {}
 128         }
 129 };
 130 
 131 int
 132 nv50_mpeg_new(struct nvkm_device *device, int index, struct nvkm_engine **pmpeg)
 133 {
 134         return nvkm_engine_new_(&nv50_mpeg, device, index, true, pmpeg);
 135 }