root/drivers/gpu/drm/nouveau/nvkm/engine/pm/g84.c

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DEFINITIONS

This source file includes following definitions.
  1. g84_pm_new
   1 /*
   2  * Copyright 2013 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24 #include "nv40.h"
  25 
  26 const struct nvkm_specsrc
  27 g84_vfetch_sources[] = {
  28         { 0x400c0c, (const struct nvkm_specmux[]) {
  29                         { 0x3, 0, "unk0" },
  30                         {}
  31                 }, "pgraph_vfetch_unk0c" },
  32         {}
  33 };
  34 
  35 static const struct nvkm_specsrc
  36 g84_prop_sources[] = {
  37         { 0x408e50, (const struct nvkm_specmux[]) {
  38                         { 0x1f, 0, "sel", true },
  39                         {}
  40                 }, "pgraph_tpc0_prop_pm_mux" },
  41         {}
  42 };
  43 
  44 static const struct nvkm_specsrc
  45 g84_crop_sources[] = {
  46         { 0x407008, (const struct nvkm_specmux[]) {
  47                         { 0xf, 0, "sel0", true },
  48                         { 0x7, 16, "sel1", true },
  49                         {}
  50                 }, "pgraph_rop0_crop_pm_mux" },
  51         {}
  52 };
  53 
  54 static const struct nvkm_specsrc
  55 g84_tex_sources[] = {
  56         { 0x408808, (const struct nvkm_specmux[]) {
  57                         { 0xfffff, 0, "unk0" },
  58                         {}
  59                 }, "pgraph_tpc0_tex_unk08" },
  60         {}
  61 };
  62 
  63 static const struct nvkm_specdom
  64 g84_pm[] = {
  65         { 0x20, (const struct nvkm_specsig[]) {
  66                         {}
  67                 }, &nv40_perfctr_func },
  68         { 0xf0, (const struct nvkm_specsig[]) {
  69                         { 0xbd, "pc01_gr_idle" },
  70                         { 0x5e, "pc01_strmout_00" },
  71                         { 0x5f, "pc01_strmout_01" },
  72                         { 0xd2, "pc01_trast_00" },
  73                         { 0xd3, "pc01_trast_01" },
  74                         { 0xd4, "pc01_trast_02" },
  75                         { 0xd5, "pc01_trast_03" },
  76                         { 0xd8, "pc01_trast_04" },
  77                         { 0xd9, "pc01_trast_05" },
  78                         { 0x5c, "pc01_vattr_00" },
  79                         { 0x5d, "pc01_vattr_01" },
  80                         { 0x66, "pc01_vfetch_00", g84_vfetch_sources },
  81                         { 0x67, "pc01_vfetch_01", g84_vfetch_sources },
  82                         { 0x68, "pc01_vfetch_02", g84_vfetch_sources },
  83                         { 0x69, "pc01_vfetch_03", g84_vfetch_sources },
  84                         { 0x6a, "pc01_vfetch_04", g84_vfetch_sources },
  85                         { 0x6b, "pc01_vfetch_05", g84_vfetch_sources },
  86                         { 0x6c, "pc01_vfetch_06", g84_vfetch_sources },
  87                         { 0x6d, "pc01_vfetch_07", g84_vfetch_sources },
  88                         { 0x6e, "pc01_vfetch_08", g84_vfetch_sources },
  89                         { 0x6f, "pc01_vfetch_09", g84_vfetch_sources },
  90                         { 0x70, "pc01_vfetch_0a", g84_vfetch_sources },
  91                         { 0x71, "pc01_vfetch_0b", g84_vfetch_sources },
  92                         { 0x72, "pc01_vfetch_0c", g84_vfetch_sources },
  93                         { 0x73, "pc01_vfetch_0d", g84_vfetch_sources },
  94                         { 0x74, "pc01_vfetch_0e", g84_vfetch_sources },
  95                         { 0x75, "pc01_vfetch_0f", g84_vfetch_sources },
  96                         { 0x76, "pc01_vfetch_10", g84_vfetch_sources },
  97                         { 0x77, "pc01_vfetch_11", g84_vfetch_sources },
  98                         { 0x78, "pc01_vfetch_12", g84_vfetch_sources },
  99                         { 0x79, "pc01_vfetch_13", g84_vfetch_sources },
 100                         { 0x7a, "pc01_vfetch_14", g84_vfetch_sources },
 101                         { 0x7b, "pc01_vfetch_15", g84_vfetch_sources },
 102                         { 0x7c, "pc01_vfetch_16", g84_vfetch_sources },
 103                         { 0x7d, "pc01_vfetch_17", g84_vfetch_sources },
 104                         { 0x7e, "pc01_vfetch_18", g84_vfetch_sources },
 105                         { 0x7f, "pc01_vfetch_19", g84_vfetch_sources },
 106                         { 0x07, "pc01_zcull_00", nv50_zcull_sources },
 107                         { 0x08, "pc01_zcull_01", nv50_zcull_sources },
 108                         { 0x09, "pc01_zcull_02", nv50_zcull_sources },
 109                         { 0x0a, "pc01_zcull_03", nv50_zcull_sources },
 110                         { 0x0b, "pc01_zcull_04", nv50_zcull_sources },
 111                         { 0x0c, "pc01_zcull_05", nv50_zcull_sources },
 112                         { 0xa4, "pc01_unk00" },
 113                         { 0xec, "pc01_trailer" },
 114                         {}
 115                 }, &nv40_perfctr_func },
 116         { 0xa0, (const struct nvkm_specsig[]) {
 117                         { 0x30, "pc02_crop_00", g84_crop_sources },
 118                         { 0x31, "pc02_crop_01", g84_crop_sources },
 119                         { 0x32, "pc02_crop_02", g84_crop_sources },
 120                         { 0x33, "pc02_crop_03", g84_crop_sources },
 121                         { 0x00, "pc02_prop_00", g84_prop_sources },
 122                         { 0x01, "pc02_prop_01", g84_prop_sources },
 123                         { 0x02, "pc02_prop_02", g84_prop_sources },
 124                         { 0x03, "pc02_prop_03", g84_prop_sources },
 125                         { 0x04, "pc02_prop_04", g84_prop_sources },
 126                         { 0x05, "pc02_prop_05", g84_prop_sources },
 127                         { 0x06, "pc02_prop_06", g84_prop_sources },
 128                         { 0x07, "pc02_prop_07", g84_prop_sources },
 129                         { 0x48, "pc02_tex_00", g84_tex_sources },
 130                         { 0x49, "pc02_tex_01", g84_tex_sources },
 131                         { 0x4a, "pc02_tex_02", g84_tex_sources },
 132                         { 0x4b, "pc02_tex_03", g84_tex_sources },
 133                         { 0x1a, "pc02_tex_04", g84_tex_sources },
 134                         { 0x1b, "pc02_tex_05", g84_tex_sources },
 135                         { 0x1c, "pc02_tex_06", g84_tex_sources },
 136                         { 0x44, "pc02_zrop_00", nv50_zrop_sources },
 137                         { 0x45, "pc02_zrop_01", nv50_zrop_sources },
 138                         { 0x46, "pc02_zrop_02", nv50_zrop_sources },
 139                         { 0x47, "pc02_zrop_03", nv50_zrop_sources },
 140                         { 0x8c, "pc02_trailer" },
 141                         {}
 142                 }, &nv40_perfctr_func },
 143         { 0x20, (const struct nvkm_specsig[]) {
 144                         {}
 145                 }, &nv40_perfctr_func },
 146         { 0x20, (const struct nvkm_specsig[]) {
 147                         {}
 148                 }, &nv40_perfctr_func },
 149         { 0x20, (const struct nvkm_specsig[]) {
 150                         {}
 151                 }, &nv40_perfctr_func },
 152         { 0x20, (const struct nvkm_specsig[]) {
 153                         {}
 154                 }, &nv40_perfctr_func },
 155         { 0x20, (const struct nvkm_specsig[]) {
 156                         {}
 157                 }, &nv40_perfctr_func },
 158         {}
 159 };
 160 
 161 int
 162 g84_pm_new(struct nvkm_device *device, int index, struct nvkm_pm **ppm)
 163 {
 164         return nv40_pm_new_(g84_pm, device, index, ppm);
 165 }
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