root/drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv04.h

/* [<][>][^][v][top][bottom][index][help] */

INCLUDED FROM

   1 /* SPDX-License-Identifier: MIT */
   2 #ifndef __NV04_FIFO_CHAN_H__
   3 #define __NV04_FIFO_CHAN_H__
   4 #define nv04_fifo_chan(p) container_of((p), struct nv04_fifo_chan, base)
   5 #include "chan.h"
   6 #include "nv04.h"
   7 
   8 struct nv04_fifo_chan {
   9         struct nvkm_fifo_chan base;
  10         struct nv04_fifo *fifo;
  11         u32 ramfc;
  12         struct nvkm_gpuobj *engn[NVKM_SUBDEV_NR];
  13 };
  14 
  15 extern const struct nvkm_fifo_chan_func nv04_fifo_dma_func;
  16 void *nv04_fifo_dma_dtor(struct nvkm_fifo_chan *);
  17 void nv04_fifo_dma_init(struct nvkm_fifo_chan *);
  18 void nv04_fifo_dma_fini(struct nvkm_fifo_chan *);
  19 void nv04_fifo_dma_object_dtor(struct nvkm_fifo_chan *, int);
  20 
  21 extern const struct nvkm_fifo_chan_oclass nv04_fifo_dma_oclass;
  22 extern const struct nvkm_fifo_chan_oclass nv10_fifo_dma_oclass;
  23 extern const struct nvkm_fifo_chan_oclass nv17_fifo_dma_oclass;
  24 extern const struct nvkm_fifo_chan_oclass nv40_fifo_dma_oclass;
  25 #endif
/* [<][>][^][v][top][bottom][index][help] */