root/drivers/gpu/drm/nouveau/nvkm/engine/fifo/channv50.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: MIT */
   2 #ifndef __NV50_FIFO_CHAN_H__
   3 #define __NV50_FIFO_CHAN_H__
   4 #define nv50_fifo_chan(p) container_of((p), struct nv50_fifo_chan, base)
   5 #include "chan.h"
   6 #include "nv50.h"
   7 
   8 struct nv50_fifo_chan {
   9         struct nv50_fifo *fifo;
  10         struct nvkm_fifo_chan base;
  11 
  12         struct nvkm_gpuobj *ramfc;
  13         struct nvkm_gpuobj *cache;
  14         struct nvkm_gpuobj *eng;
  15         struct nvkm_gpuobj *pgd;
  16         struct nvkm_ramht *ramht;
  17 
  18         struct nvkm_gpuobj *engn[NVKM_SUBDEV_NR];
  19 };
  20 
  21 int nv50_fifo_chan_ctor(struct nv50_fifo *, u64 vmm, u64 push,
  22                         const struct nvkm_oclass *, struct nv50_fifo_chan *);
  23 void *nv50_fifo_chan_dtor(struct nvkm_fifo_chan *);
  24 void nv50_fifo_chan_fini(struct nvkm_fifo_chan *);
  25 void nv50_fifo_chan_engine_dtor(struct nvkm_fifo_chan *, struct nvkm_engine *);
  26 void nv50_fifo_chan_object_dtor(struct nvkm_fifo_chan *, int);
  27 
  28 int g84_fifo_chan_ctor(struct nv50_fifo *, u64 vmm, u64 push,
  29                        const struct nvkm_oclass *, struct nv50_fifo_chan *);
  30 
  31 extern const struct nvkm_fifo_chan_oclass nv50_fifo_dma_oclass;
  32 extern const struct nvkm_fifo_chan_oclass nv50_fifo_gpfifo_oclass;
  33 extern const struct nvkm_fifo_chan_oclass g84_fifo_dma_oclass;
  34 extern const struct nvkm_fifo_chan_oclass g84_fifo_gpfifo_oclass;
  35 #endif