1 /*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24 #include "priv.h"
25 #include "regsnv04.h"
26
27 static void
28 nv41_timer_init(struct nvkm_timer *tmr)
29 {
30 struct nvkm_subdev *subdev = &tmr->subdev;
31 struct nvkm_device *device = subdev->device;
32 u32 f = device->crystal;
33 u32 m = 1, n, d;
34
35 /* aim for 31.25MHz, which gives us nanosecond timestamps */
36 d = 1000000 / 32;
37 n = f;
38
39 while (n < (d * 2)) {
40 n += (n / m);
41 m++;
42 }
43
44 /* reduce ratio to acceptable values */
45 while (((n % 5) == 0) && ((d % 5) == 0)) {
46 n /= 5;
47 d /= 5;
48 }
49
50 while (((n % 2) == 0) && ((d % 2) == 0)) {
51 n /= 2;
52 d /= 2;
53 }
54
55 while (n > 0xffff || d > 0xffff) {
56 n >>= 1;
57 d >>= 1;
58 }
59
60 nvkm_debug(subdev, "input frequency : %dHz\n", f);
61 nvkm_debug(subdev, "input multiplier: %d\n", m);
62 nvkm_debug(subdev, "numerator : %08x\n", n);
63 nvkm_debug(subdev, "denominator : %08x\n", d);
64 nvkm_debug(subdev, "timer frequency : %dHz\n", (f * m) * d / n);
65
66 nvkm_wr32(device, 0x009220, m - 1);
67 nvkm_wr32(device, NV04_PTIMER_NUMERATOR, n);
68 nvkm_wr32(device, NV04_PTIMER_DENOMINATOR, d);
69 }
70
71 static const struct nvkm_timer_func
72 nv41_timer = {
73 .init = nv41_timer_init,
74 .intr = nv04_timer_intr,
75 .read = nv04_timer_read,
76 .time = nv04_timer_time,
77 .alarm_init = nv04_timer_alarm_init,
78 .alarm_fini = nv04_timer_alarm_fini,
79 };
80
81 int
82 nv41_timer_new(struct nvkm_device *device, int index, struct nvkm_timer **ptmr)
83 {
84 return nvkm_timer_new_(&nv41_timer, device, index, ptmr);
85 }