root/drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0209.c

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DEFINITIONS

This source file includes following definitions.
  1. nvbios_M0209Te
  2. nvbios_M0209Ee
  3. nvbios_M0209Ep
  4. nvbios_M0209Se
  5. nvbios_M0209Sp

   1 /*
   2  * Copyright 2013 Red Hat Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Ben Skeggs
  23  */
  24 #include <subdev/bios.h>
  25 #include <subdev/bios/bit.h>
  26 #include <subdev/bios/M0209.h>
  27 
  28 u32
  29 nvbios_M0209Te(struct nvkm_bios *bios,
  30                u8 *ver, u8 *hdr, u8 *cnt, u8 *len, u8 *snr, u8 *ssz)
  31 {
  32         struct bit_entry bit_M;
  33         u32 data = 0x00000000;
  34 
  35         if (!bit_entry(bios, 'M', &bit_M)) {
  36                 if (bit_M.version == 2 && bit_M.length > 0x0c)
  37                         data = nvbios_rd32(bios, bit_M.offset + 0x09);
  38                 if (data) {
  39                         *ver = nvbios_rd08(bios, data + 0x00);
  40                         switch (*ver) {
  41                         case 0x10:
  42                                 *hdr = nvbios_rd08(bios, data + 0x01);
  43                                 *len = nvbios_rd08(bios, data + 0x02);
  44                                 *ssz = nvbios_rd08(bios, data + 0x03);
  45                                 *snr = 1;
  46                                 *cnt = nvbios_rd08(bios, data + 0x04);
  47                                 return data;
  48                         default:
  49                                 break;
  50                         }
  51                 }
  52         }
  53 
  54         return 0x00000000;
  55 }
  56 
  57 u32
  58 nvbios_M0209Ee(struct nvkm_bios *bios, int idx,
  59                u8 *ver, u8 *hdr, u8 *cnt, u8 *len)
  60 {
  61         u8  snr, ssz;
  62         u32 data = nvbios_M0209Te(bios, ver, hdr, cnt, len, &snr, &ssz);
  63         if (data && idx < *cnt) {
  64                 data = data + *hdr + idx * (*len + (snr * ssz));
  65                 *hdr = *len;
  66                 *cnt = snr;
  67                 *len = ssz;
  68                 return data;
  69         }
  70         return 0x00000000;
  71 }
  72 
  73 u32
  74 nvbios_M0209Ep(struct nvkm_bios *bios, int idx,
  75                u8 *ver, u8 *hdr, u8 *cnt, u8 *len, struct nvbios_M0209E *info)
  76 {
  77         u32 data = nvbios_M0209Ee(bios, idx, ver, hdr, cnt, len);
  78         memset(info, 0x00, sizeof(*info));
  79         switch (!!data * *ver) {
  80         case 0x10:
  81                 info->v00_40 = (nvbios_rd08(bios, data + 0x00) & 0x40) >> 6;
  82                 info->bits   =  nvbios_rd08(bios, data + 0x00) & 0x3f;
  83                 info->modulo =  nvbios_rd08(bios, data + 0x01);
  84                 info->v02_40 = (nvbios_rd08(bios, data + 0x02) & 0x40) >> 6;
  85                 info->v02_07 =  nvbios_rd08(bios, data + 0x02) & 0x07;
  86                 info->v03    =  nvbios_rd08(bios, data + 0x03);
  87                 return data;
  88         default:
  89                 break;
  90         }
  91         return 0x00000000;
  92 }
  93 
  94 u32
  95 nvbios_M0209Se(struct nvkm_bios *bios, int ent, int idx, u8 *ver, u8 *hdr)
  96 {
  97 
  98         u8  cnt, len;
  99         u32 data = nvbios_M0209Ee(bios, ent, ver, hdr, &cnt, &len);
 100         if (data && idx < cnt) {
 101                 data = data + *hdr + idx * len;
 102                 *hdr = len;
 103                 return data;
 104         }
 105         return 0x00000000;
 106 }
 107 
 108 u32
 109 nvbios_M0209Sp(struct nvkm_bios *bios, int ent, int idx, u8 *ver, u8 *hdr,
 110                struct nvbios_M0209S *info)
 111 {
 112         struct nvbios_M0209E M0209E;
 113         u8  cnt, len;
 114         u32 data = nvbios_M0209Ep(bios, ent, ver, hdr, &cnt, &len, &M0209E);
 115         if (data) {
 116                 u32 i, data = nvbios_M0209Se(bios, ent, idx, ver, hdr);
 117                 memset(info, 0x00, sizeof(*info));
 118                 switch (!!data * *ver) {
 119                 case 0x10:
 120                         for (i = 0; i < ARRAY_SIZE(info->data); i++) {
 121                                 u32 bits = (i % M0209E.modulo) * M0209E.bits;
 122                                 u32 mask = (1ULL << M0209E.bits) - 1;
 123                                 u16  off = bits / 8;
 124                                 u8   mod = bits % 8;
 125                                 info->data[i] = nvbios_rd32(bios, data + off);
 126                                 info->data[i] = info->data[i] >> mod;
 127                                 info->data[i] = info->data[i] & mask;
 128                         }
 129                         return data;
 130                 default:
 131                         break;
 132                 }
 133         }
 134         return 0x00000000;
 135 }

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