1 /*
2 * Copyright 2010 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24 #include "mem.h"
25 #include "vmm.h"
26
27 #include <nvif/class.h>
28
29 const u8 *
30 nv50_mmu_kind(struct nvkm_mmu *base, int *count)
31 {
32 /* 0x01: no bank swizzle
33 * 0x02: bank swizzled
34 * 0x7f: invalid
35 *
36 * 0x01/0x02 are values understood by the VRAM allocator,
37 * and are required to avoid mixing the two types within
38 * a certain range.
39 */
40 static const u8
41 kind[128] = {
42 0x01, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, /* 0x00 */
43 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
44 0x01, 0x01, 0x01, 0x01, 0x7f, 0x7f, 0x7f, 0x7f, /* 0x10 */
45 0x02, 0x02, 0x02, 0x02, 0x7f, 0x7f, 0x7f, 0x7f,
46 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x7f, /* 0x20 */
47 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x7f,
48 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, /* 0x30 */
49 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
50 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x02, /* 0x40 */
51 0x02, 0x02, 0x02, 0x02, 0x02, 0x02, 0x7f, 0x7f,
52 0x7f, 0x7f, 0x7f, 0x7f, 0x01, 0x01, 0x01, 0x7f, /* 0x50 */
53 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f, 0x7f,
54 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x7f, /* 0x60 */
55 0x01, 0x01, 0x01, 0x01, 0x02, 0x02, 0x02, 0x02,
56 0x01, 0x7f, 0x02, 0x7f, 0x01, 0x7f, 0x02, 0x7f, /* 0x70 */
57 0x01, 0x01, 0x02, 0x02, 0x01, 0x01, 0x7f, 0x7f
58 };
59 *count = ARRAY_SIZE(kind);
60 return kind;
61 }
62
63 static const struct nvkm_mmu_func
64 nv50_mmu = {
65 .dma_bits = 40,
66 .mmu = {{ -1, -1, NVIF_CLASS_MMU_NV50}},
67 .mem = {{ -1, 0, NVIF_CLASS_MEM_NV50}, nv50_mem_new, nv50_mem_map },
68 .vmm = {{ -1, -1, NVIF_CLASS_VMM_NV50}, nv50_vmm_new, false, 0x1400 },
69 .kind = nv50_mmu_kind,
70 };
71
72 int
73 nv50_mmu_new(struct nvkm_device *device, int index, struct nvkm_mmu **pmmu)
74 {
75 return nvkm_mmu_new_(&nv50_mmu, device, index, pmmu);
76 }