root/drivers/gpu/drm/nouveau/nvkm/subdev/bus/nv31.c

DEFINITIONS

1. nv31_bus_intr
2. nv31_bus_init
3. nv31_bus_new

   1 /*
   2  * Copyright 2012 Nouveau Community
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * Authors: Martin Peres <martin.peres@labri.fr>
  23  *          Ben Skeggs
  24  */
  25 #include "priv.h"
  26 
  27 #include <subdev/gpio.h>
  28 #include <subdev/therm.h>
  29 
  30 static void
  31 nv31_bus_intr(struct nvkm_bus *bus)
  32 {
  33         struct nvkm_subdev *subdev = &bus->subdev;
  34         struct nvkm_device *device = subdev->device;
  35         u32 stat = nvkm_rd32(device, 0x001100) & nvkm_rd32(device, 0x001140);
  36         u32 gpio = nvkm_rd32(device, 0x001104) & nvkm_rd32(device, 0x001144);
  37 
  38         if (gpio) {
  39                 struct nvkm_gpio *gpio = device->gpio;
  40                 if (gpio)
  41                         nvkm_subdev_intr(&gpio->subdev);
  42         }
  43 
  44         if (stat & 0x00000008) {  /* NV41- */
  45                 u32 addr = nvkm_rd32(device, 0x009084);
  46                 u32 data = nvkm_rd32(device, 0x009088);
  47 
  48                 nvkm_error(subdev, "MMIO %s of %08x FAULT at %06x\n",
  49                            (addr & 0x00000002) ? "write" : "read", data,
  50                            (addr & 0x00fffffc));
  51 
  52                 stat &= ~0x00000008;
  53                 nvkm_wr32(device, 0x001100, 0x00000008);
  54         }
  55 
  56         if (stat & 0x00070000) {
  57                 struct nvkm_therm *therm = device->therm;
  58                 if (therm)
  59                         nvkm_subdev_intr(&therm->subdev);
  60                 stat &= ~0x00070000;
  61                 nvkm_wr32(device, 0x001100, 0x00070000);
  62         }
  63 
  64         if (stat) {
  65                 nvkm_error(subdev, "intr %08x\n", stat);
  66                 nvkm_mask(device, 0x001140, stat, 0x00000000);
  67         }
  68 }
  69 
  70 static void
  71 nv31_bus_init(struct nvkm_bus *bus)
  72 {
  73         struct nvkm_device *device = bus->subdev.device;
  74         nvkm_wr32(device, 0x001100, 0xffffffff);
  75         nvkm_wr32(device, 0x001140, 0x00070008);
  76 }
  77 
  78 static const struct nvkm_bus_func
  79 nv31_bus = {
  80         .init = nv31_bus_init,
  81         .intr = nv31_bus_intr,
  82 };
  83 
  84 int
  85 nv31_bus_new(struct nvkm_device *device, int index, struct nvkm_bus **pbus)
  86 {
  87         return nvkm_bus_new_(&nv31_bus, device, index, pbus);
  88 }