1 /*
2 * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23 #ifndef __NVKM_SECBOOT_ACR_R370_H__
24 #define __NVKM_SECBOOT_ACR_R370_H__
25
26 #include "priv.h"
27 struct hsf_load_header;
28
29 /* Same as acr_r361_flcn_bl_desc, plus argc/argv */
30 struct acr_r370_flcn_bl_desc {
31 u32 reserved[4];
32 u32 signature[4];
33 u32 ctx_dma;
34 struct flcn_u64 code_dma_base;
35 u32 non_sec_code_off;
36 u32 non_sec_code_size;
37 u32 sec_code_off;
38 u32 sec_code_size;
39 u32 code_entry_point;
40 struct flcn_u64 data_dma_base;
41 u32 data_size;
42 u32 argc;
43 u32 argv;
44 };
45
46 void acr_r370_generate_hs_bl_desc(const struct hsf_load_header *, void *, u64);
47 extern const struct acr_r352_ls_func acr_r370_ls_fecs_func;
48 extern const struct acr_r352_ls_func acr_r370_ls_gpccs_func;
49 extern const struct acr_r352_lsf_func acr_r370_ls_sec2_func_0;
50 #endif