root/drivers/gpu/drm/nouveau/nvkm/subdev/secboot/acr_r352.h

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INCLUDED FROM


DEFINITIONS

This source file includes following definitions.
  1. hsf_load_header_app_off
  2. hsf_load_header_app_size

   1 /*
   2  * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  19  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  20  * DEALINGS IN THE SOFTWARE.
  21  */
  22 #ifndef __NVKM_SECBOOT_ACR_R352_H__
  23 #define __NVKM_SECBOOT_ACR_R352_H__
  24 
  25 #include "acr.h"
  26 #include "ls_ucode.h"
  27 #include "hs_ucode.h"
  28 
  29 struct ls_ucode_img;
  30 
  31 #define ACR_R352_MAX_APPS 8
  32 
  33 #define LSF_FLAG_LOAD_CODE_AT_0         1
  34 #define LSF_FLAG_DMACTL_REQ_CTX         4
  35 #define LSF_FLAG_FORCE_PRIV_LOAD        8
  36 
  37 static inline u32
  38 hsf_load_header_app_off(const struct hsf_load_header *hdr, u32 app)
  39 {
  40         return hdr->apps[app];
  41 }
  42 
  43 static inline u32
  44 hsf_load_header_app_size(const struct hsf_load_header *hdr, u32 app)
  45 {
  46         return hdr->apps[hdr->num_apps + app];
  47 }
  48 
  49 /**
  50  * struct acr_r352_lsf_func - manages a specific LS firmware version
  51  *
  52  * @generate_bl_desc: function called on a block of bl_desc_size to generate the
  53  *                    proper bootloader descriptor for this LS firmware
  54  * @bl_desc_size: size of the bootloader descriptor
  55  * @lhdr_flags: LS flags
  56  */
  57 struct acr_r352_lsf_func {
  58         void (*generate_bl_desc)(const struct nvkm_acr *,
  59                                  const struct ls_ucode_img *, u64, void *);
  60         u32 bl_desc_size;
  61         u32 lhdr_flags;
  62 };
  63 
  64 /**
  65  * struct acr_r352_ls_func - manages a single LS falcon
  66  *
  67  * @load: load the external firmware into a ls_ucode_img
  68  * @post_run: hook called right after the ACR is executed
  69  */
  70 struct acr_r352_ls_func {
  71         int (*load)(const struct nvkm_secboot *, int maxver,
  72                     struct ls_ucode_img *);
  73         int (*post_run)(const struct nvkm_acr *, const struct nvkm_secboot *);
  74         int version_max;
  75         const struct acr_r352_lsf_func *version[];
  76 };
  77 
  78 struct acr_r352;
  79 
  80 /**
  81  * struct acr_r352_func - manages nuances between ACR versions
  82  *
  83  * @generate_hs_bl_desc: function called on a block of bl_desc_size to generate
  84  *                       the proper HS bootloader descriptor
  85  * @hs_bl_desc_size: size of the HS bootloader descriptor
  86  */
  87 struct acr_r352_func {
  88         void (*generate_hs_bl_desc)(const struct hsf_load_header *, void *,
  89                                     u64);
  90         void (*fixup_hs_desc)(struct acr_r352 *, struct nvkm_secboot *, void *);
  91         u32 hs_bl_desc_size;
  92         bool shadow_blob;
  93 
  94         struct ls_ucode_img *(*ls_ucode_img_load)(const struct acr_r352 *,
  95                                                   const struct nvkm_secboot *,
  96                                                   enum nvkm_secboot_falcon);
  97         int (*ls_fill_headers)(struct acr_r352 *, struct list_head *);
  98         int (*ls_write_wpr)(struct acr_r352 *, struct list_head *,
  99                             struct nvkm_gpuobj *, u64);
 100 
 101         const struct acr_r352_ls_func *ls_func[NVKM_SECBOOT_FALCON_END];
 102 };
 103 
 104 /**
 105  * struct acr_r352 - ACR data for driver release 352 (and beyond)
 106  */
 107 struct acr_r352 {
 108         struct nvkm_acr base;
 109         const struct acr_r352_func *func;
 110 
 111         /*
 112          * HS FW - lock WPR region (dGPU only) and load LS FWs
 113          * on Tegra the HS FW copies the LS blob into the fixed WPR instead
 114          */
 115         struct nvkm_gpuobj *load_blob;
 116         struct {
 117                 struct hsf_load_header load_bl_header;
 118                 u32 __load_apps[ACR_R352_MAX_APPS * 2];
 119         };
 120 
 121         /* HS FW - unlock WPR region (dGPU only) */
 122         struct nvkm_gpuobj *unload_blob;
 123         struct {
 124                 struct hsf_load_header unload_bl_header;
 125                 u32 __unload_apps[ACR_R352_MAX_APPS * 2];
 126         };
 127 
 128         /* HS bootloader */
 129         void *hsbl_blob;
 130 
 131         /* HS bootloader for unload blob, if using a different falcon */
 132         void *hsbl_unload_blob;
 133 
 134         /* LS FWs, to be loaded by the HS ACR */
 135         struct nvkm_gpuobj *ls_blob;
 136 
 137         /* Firmware already loaded? */
 138         bool firmware_ok;
 139 
 140         /* Falcons to lazy-bootstrap */
 141         u32 lazy_bootstrap;
 142 
 143         /* To keep track of the state of all managed falcons */
 144         enum {
 145                 /* In non-secure state, no firmware loaded, no privileges*/
 146                 NON_SECURE = 0,
 147                 /* In low-secure mode and ready to be started */
 148                 RESET,
 149                 /* In low-secure mode and running */
 150                 RUNNING,
 151         } falcon_state[NVKM_SECBOOT_FALCON_END];
 152 };
 153 #define acr_r352(acr) container_of(acr, struct acr_r352, base)
 154 
 155 struct nvkm_acr *acr_r352_new_(const struct acr_r352_func *,
 156                                enum nvkm_secboot_falcon, unsigned long);
 157 
 158 struct ls_ucode_img *acr_r352_ls_ucode_img_load(const struct acr_r352 *,
 159                                                 const struct nvkm_secboot *,
 160                                                 enum nvkm_secboot_falcon);
 161 int acr_r352_ls_fill_headers(struct acr_r352 *, struct list_head *);
 162 int acr_r352_ls_write_wpr(struct acr_r352 *, struct list_head *,
 163                           struct nvkm_gpuobj *, u64);
 164 
 165 void acr_r352_fixup_hs_desc(struct acr_r352 *, struct nvkm_secboot *, void *);
 166 
 167 #endif

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