root/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/priv.h

INCLUDED FROM

   1 /* SPDX-License-Identifier: MIT */
   2 #ifndef __NVKM_GPIO_PRIV_H__
   3 #define __NVKM_GPIO_PRIV_H__
   4 #define nvkm_gpio(p) container_of((p), struct nvkm_gpio, subdev)
   5 #include <subdev/gpio.h>
   6 
   7 struct nvkm_gpio_func {
   8         int lines;
   9 
  10         /* read and ack pending interrupts, returning only data
  11          * for lines that have not been masked off, while still
  12          * performing the ack for anything that was pending.
  13          */
  14         void (*intr_stat)(struct nvkm_gpio *, u32 *, u32 *);
  15 
  16         /* mask on/off interrupts for hi/lo transitions on a
  17          * given set of gpio lines
  18          */
  19         void (*intr_mask)(struct nvkm_gpio *, u32, u32, u32);
  20 
  21         /* configure gpio direction and output value */
  22         int  (*drive)(struct nvkm_gpio *, int line, int dir, int out);
  23 
  24         /* sense current state of given gpio line */
  25         int  (*sense)(struct nvkm_gpio *, int line);
  26 
  27         /*XXX*/
  28         void (*reset)(struct nvkm_gpio *, u8);
  29 };
  30 
  31 int nvkm_gpio_new_(const struct nvkm_gpio_func *, struct nvkm_device *,
  32                    int index, struct nvkm_gpio **);
  33 
  34 void nv50_gpio_reset(struct nvkm_gpio *, u8);
  35 int  nv50_gpio_drive(struct nvkm_gpio *, int, int, int);
  36 int  nv50_gpio_sense(struct nvkm_gpio *, int);
  37 
  38 void g94_gpio_intr_stat(struct nvkm_gpio *, u32 *, u32 *);
  39 void g94_gpio_intr_mask(struct nvkm_gpio *, u32, u32, u32);
  40 
  41 void gf119_gpio_reset(struct nvkm_gpio *, u8);
  42 int  gf119_gpio_drive(struct nvkm_gpio *, int, int, int);
  43 int  gf119_gpio_sense(struct nvkm_gpio *, int);
  44 #endif