This source file includes following definitions.
- nvkm_gddr5_calc
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24 #include "ram.h"
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31
32 #define NOTE00(a) 1
33
34 int
35 nvkm_gddr5_calc(struct nvkm_ram *ram, bool nuts)
36 {
37 int pd, lf, xd, vh, vr, vo, l3;
38 int WL, CL, WR, at[2], dt, ds;
39 int rq = ram->freq < 1000000;
40
41 xd = !ram->next->bios.ramcfg_DLLoff;
42
43 switch (ram->next->bios.ramcfg_ver) {
44 case 0x11:
45 pd = ram->next->bios.ramcfg_11_01_80;
46 lf = ram->next->bios.ramcfg_11_01_40;
47 vh = ram->next->bios.ramcfg_11_02_10;
48 vr = ram->next->bios.ramcfg_11_02_04;
49 vo = ram->next->bios.ramcfg_11_06;
50 l3 = !ram->next->bios.ramcfg_11_07_02;
51 break;
52 default:
53 return -ENOSYS;
54 }
55
56 switch (ram->next->bios.timing_ver) {
57 case 0x20:
58 WL = (ram->next->bios.timing[1] & 0x00000f80) >> 7;
59 CL = (ram->next->bios.timing[1] & 0x0000001f);
60 WR = (ram->next->bios.timing[2] & 0x007f0000) >> 16;
61 at[0] = ram->next->bios.timing_20_2e_c0;
62 at[1] = ram->next->bios.timing_20_2e_30;
63 dt = ram->next->bios.timing_20_2e_03;
64 ds = ram->next->bios.timing_20_2f_03;
65 break;
66 default:
67 return -ENOSYS;
68 }
69
70 if (WL < 1 || WL > 7 || CL < 5 || CL > 36 || WR < 4 || WR > 35)
71 return -EINVAL;
72 CL -= 5;
73 WR -= 4;
74
75 ram->mr[0] &= ~0xf7f;
76 ram->mr[0] |= (WR & 0x0f) << 8;
77 ram->mr[0] |= (CL & 0x0f) << 3;
78 ram->mr[0] |= (WL & 0x07) << 0;
79
80 ram->mr[1] &= ~0x0bf;
81 ram->mr[1] |= (xd & 0x01) << 7;
82 ram->mr[1] |= (at[0] & 0x03) << 4;
83 ram->mr[1] |= (dt & 0x03) << 2;
84 ram->mr[1] |= (ds & 0x03) << 0;
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89 ram->mr1_nuts = ram->mr[1];
90 if (nuts) {
91 ram->mr[1] &= ~0x030;
92 ram->mr[1] |= (at[1] & 0x03) << 4;
93 }
94
95 ram->mr[3] &= ~0x020;
96 ram->mr[3] |= (rq & 0x01) << 5;
97
98 ram->mr[5] &= ~0x004;
99 ram->mr[5] |= (l3 << 2);
100
101 if (!vo)
102 vo = (ram->mr[6] & 0xff0) >> 4;
103 if (ram->mr[6] & 0x001)
104 pd = 1;
105 ram->mr[6] &= ~0xff1;
106 ram->mr[6] |= (vo & 0xff) << 4;
107 ram->mr[6] |= (pd & 0x01) << 0;
108
109 if (NOTE00(vr)) {
110 ram->mr[7] &= ~0x300;
111 ram->mr[7] |= (vr & 0x03) << 8;
112 }
113 ram->mr[7] &= ~0x088;
114 ram->mr[7] |= (vh & 0x01) << 7;
115 ram->mr[7] |= (lf & 0x01) << 3;
116
117 ram->mr[8] &= ~0x003;
118 ram->mr[8] |= (WR & 0x10) >> 3;
119 ram->mr[8] |= (CL & 0x10) >> 4;
120 return 0;
121 }