This source file includes following definitions.
- gp100_fault_buffer_intr
- gp100_fault_buffer_fini
- gp100_fault_buffer_init
- gp100_fault_buffer_info
- gp100_fault_intr
- gp100_fault_new
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22 #include "priv.h"
23
24 #include <subdev/mc.h>
25
26 #include <nvif/class.h>
27
28 static void
29 gp100_fault_buffer_intr(struct nvkm_fault_buffer *buffer, bool enable)
30 {
31 struct nvkm_device *device = buffer->fault->subdev.device;
32 nvkm_mc_intr_mask(device, NVKM_SUBDEV_FAULT, enable);
33 }
34
35 static void
36 gp100_fault_buffer_fini(struct nvkm_fault_buffer *buffer)
37 {
38 struct nvkm_device *device = buffer->fault->subdev.device;
39 nvkm_mask(device, 0x002a70, 0x00000001, 0x00000000);
40 }
41
42 static void
43 gp100_fault_buffer_init(struct nvkm_fault_buffer *buffer)
44 {
45 struct nvkm_device *device = buffer->fault->subdev.device;
46 nvkm_wr32(device, 0x002a74, upper_32_bits(buffer->addr));
47 nvkm_wr32(device, 0x002a70, lower_32_bits(buffer->addr));
48 nvkm_mask(device, 0x002a70, 0x00000001, 0x00000001);
49 }
50
51 static void
52 gp100_fault_buffer_info(struct nvkm_fault_buffer *buffer)
53 {
54 buffer->entries = nvkm_rd32(buffer->fault->subdev.device, 0x002a78);
55 buffer->get = 0x002a7c;
56 buffer->put = 0x002a80;
57 }
58
59 static void
60 gp100_fault_intr(struct nvkm_fault *fault)
61 {
62 nvkm_event_send(&fault->event, 1, 0, NULL, 0);
63 }
64
65 static const struct nvkm_fault_func
66 gp100_fault = {
67 .intr = gp100_fault_intr,
68 .buffer.nr = 1,
69 .buffer.entry_size = 32,
70 .buffer.info = gp100_fault_buffer_info,
71 .buffer.init = gp100_fault_buffer_init,
72 .buffer.fini = gp100_fault_buffer_fini,
73 .buffer.intr = gp100_fault_buffer_intr,
74 .user = { { 0, 0, MAXWELL_FAULT_BUFFER_A }, 0 },
75 };
76
77 int
78 gp100_fault_new(struct nvkm_device *device, int index,
79 struct nvkm_fault **pfault)
80 {
81 return nvkm_fault_new_(&gp100_fault, device, index, pfault);
82 }