This source file includes following definitions.
- nv_cksum
- clkcmptable
- run_digital_op_script
- call_lvds_manufacturer_script
- run_lvds_table
- call_lvds_script
- parse_lvds_manufacturer_table_header
- get_fp_strap
- parse_fp_mode_table
- nouveau_bios_fp_mode
- nouveau_bios_parse_lvds_table
- run_tmds_table
- parse_script_table_pointers
- parse_bit_A_tbl_entry
- parse_bit_display_tbl_entry
- parse_bit_init_tbl_entry
- parse_bit_i_tbl_entry
- parse_bit_lvds_tbl_entry
- parse_bit_M_tbl_entry
- parse_bit_tmds_tbl_entry
- bit_table
- parse_bit_table
- parse_bit_structure
- parse_bmp_structure
- findstr
- olddcb_table
- olddcb_outp
- olddcb_outp_foreach
- olddcb_conntab
- olddcb_conn
- new_dcb_entry
- fabricate_dcb_output
- parse_dcb20_entry
- parse_dcb15_entry
- merge_like_dcb_entries
- apply_dcb_encoder_quirks
- fabricate_dcb_encoder_table
- parse_dcb_entry
- dcb_fake_connectors
- parse_dcb_table
- load_nv17_hwsq_ucode_entry
- load_nv17_hw_sequencer_ucode
- nouveau_bios_embedded_edid
- NVInitVBIOS
- nouveau_run_vbios_init
- nouveau_bios_posted
- nouveau_bios_init
- nouveau_bios_takedown
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25 #include "nouveau_drv.h"
26 #include "nouveau_reg.h"
27 #include "dispnv04/hw.h"
28 #include "nouveau_encoder.h"
29
30 #include <linux/io-mapping.h>
31 #include <linux/firmware.h>
32
33
34 #define NV_CIO_CRE_44_HEADA 0x0
35 #define NV_CIO_CRE_44_HEADB 0x3
36 #define FEATURE_MOBILE 0x10
37
38 #define EDID1_LEN 128
39
40 #define BIOSLOG(sip, fmt, arg...) NV_DEBUG(sip->dev, fmt, ##arg)
41 #define LOG_OLD_VALUE(x)
42
43 struct init_exec {
44 bool execute;
45 bool repeat;
46 };
47
48 static bool nv_cksum(const uint8_t *data, unsigned int length)
49 {
50
51
52
53
54 int i;
55 uint8_t sum = 0;
56
57 for (i = 0; i < length; i++)
58 sum += data[i];
59
60 if (sum)
61 return true;
62
63 return false;
64 }
65
66 static uint16_t clkcmptable(struct nvbios *bios, uint16_t clktable, int pxclk)
67 {
68 int compare_record_len, i = 0;
69 uint16_t compareclk, scriptptr = 0;
70
71 if (bios->major_version < 5)
72 compare_record_len = 3;
73 else
74 compare_record_len = 4;
75
76 do {
77 compareclk = ROM16(bios->data[clktable + compare_record_len * i]);
78 if (pxclk >= compareclk * 10) {
79 if (bios->major_version < 5) {
80 uint8_t tmdssub = bios->data[clktable + 2 + compare_record_len * i];
81 scriptptr = ROM16(bios->data[bios->init_script_tbls_ptr + tmdssub * 2]);
82 } else
83 scriptptr = ROM16(bios->data[clktable + 2 + compare_record_len * i]);
84 break;
85 }
86 i++;
87 } while (compareclk);
88
89 return scriptptr;
90 }
91
92 static void
93 run_digital_op_script(struct drm_device *dev, uint16_t scriptptr,
94 struct dcb_output *dcbent, int head, bool dl)
95 {
96 struct nouveau_drm *drm = nouveau_drm(dev);
97
98 NV_INFO(drm, "0x%04X: Parsing digital output script table\n",
99 scriptptr);
100 NVWriteVgaCrtc(dev, 0, NV_CIO_CRE_44, head ? NV_CIO_CRE_44_HEADB :
101 NV_CIO_CRE_44_HEADA);
102 nouveau_bios_run_init_table(dev, scriptptr, dcbent, head);
103
104 nv04_dfp_bind_head(dev, dcbent, head, dl);
105 }
106
107 static int call_lvds_manufacturer_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script)
108 {
109 struct nouveau_drm *drm = nouveau_drm(dev);
110 struct nvbios *bios = &drm->vbios;
111 uint8_t sub = bios->data[bios->fp.xlated_entry + script] + (bios->fp.link_c_increment && dcbent->or & DCB_OUTPUT_C ? 1 : 0);
112 uint16_t scriptofs = ROM16(bios->data[bios->init_script_tbls_ptr + sub * 2]);
113
114 if (!bios->fp.xlated_entry || !sub || !scriptofs)
115 return -EINVAL;
116
117 run_digital_op_script(dev, scriptofs, dcbent, head, bios->fp.dual_link);
118
119 if (script == LVDS_PANEL_OFF) {
120
121 mdelay(ROM16(bios->data[bios->fp.xlated_entry + 7]));
122 }
123 #ifdef __powerpc__
124
125 if (script == LVDS_RESET &&
126 (dev->pdev->device == 0x0179 || dev->pdev->device == 0x0189 ||
127 dev->pdev->device == 0x0329))
128 nv_write_tmds(dev, dcbent->or, 0, 0x02, 0x72);
129 #endif
130
131 return 0;
132 }
133
134 static int run_lvds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk)
135 {
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144
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146 struct nouveau_drm *drm = nouveau_drm(dev);
147 struct nvbios *bios = &drm->vbios;
148 unsigned int outputset = (dcbent->or == 4) ? 1 : 0;
149 uint16_t scriptptr = 0, clktable;
150
151
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153
154
155
156 switch (script) {
157 case LVDS_INIT:
158 return -ENOSYS;
159 case LVDS_BACKLIGHT_ON:
160 case LVDS_PANEL_ON:
161 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 7 + outputset * 2]);
162 break;
163 case LVDS_BACKLIGHT_OFF:
164 case LVDS_PANEL_OFF:
165 scriptptr = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 11 + outputset * 2]);
166 break;
167 case LVDS_RESET:
168 clktable = bios->fp.lvdsmanufacturerpointer + 15;
169 if (dcbent->or == 4)
170 clktable += 8;
171
172 if (dcbent->lvdsconf.use_straps_for_mode) {
173 if (bios->fp.dual_link)
174 clktable += 4;
175 if (bios->fp.if_is_24bit)
176 clktable += 2;
177 } else {
178
179 int cmpval_24bit = (dcbent->or == 4) ? 4 : 1;
180
181 if (bios->fp.dual_link) {
182 clktable += 4;
183 cmpval_24bit <<= 1;
184 }
185
186 if (bios->fp.strapless_is_24bit & cmpval_24bit)
187 clktable += 2;
188 }
189
190 clktable = ROM16(bios->data[clktable]);
191 if (!clktable) {
192 NV_ERROR(drm, "Pixel clock comparison table not found\n");
193 return -ENOENT;
194 }
195 scriptptr = clkcmptable(bios, clktable, pxclk);
196 }
197
198 if (!scriptptr) {
199 NV_ERROR(drm, "LVDS output init script not found\n");
200 return -ENOENT;
201 }
202 run_digital_op_script(dev, scriptptr, dcbent, head, bios->fp.dual_link);
203
204 return 0;
205 }
206
207 int call_lvds_script(struct drm_device *dev, struct dcb_output *dcbent, int head, enum LVDS_script script, int pxclk)
208 {
209
210
211
212
213
214
215 struct nouveau_drm *drm = nouveau_drm(dev);
216 struct nvif_object *device = &drm->client.device.object;
217 struct nvbios *bios = &drm->vbios;
218 uint8_t lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer];
219 uint32_t sel_clk_binding, sel_clk;
220 int ret;
221
222 if (bios->fp.last_script_invoc == (script << 1 | head) || !lvds_ver ||
223 (lvds_ver >= 0x30 && script == LVDS_INIT))
224 return 0;
225
226 if (!bios->fp.lvds_init_run) {
227 bios->fp.lvds_init_run = true;
228 call_lvds_script(dev, dcbent, head, LVDS_INIT, pxclk);
229 }
230
231 if (script == LVDS_PANEL_ON && bios->fp.reset_after_pclk_change)
232 call_lvds_script(dev, dcbent, head, LVDS_RESET, pxclk);
233 if (script == LVDS_RESET && bios->fp.power_off_for_reset)
234 call_lvds_script(dev, dcbent, head, LVDS_PANEL_OFF, pxclk);
235
236 NV_INFO(drm, "Calling LVDS script %d:\n", script);
237
238
239 sel_clk_binding = nvif_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000;
240
241 if (lvds_ver < 0x30)
242 ret = call_lvds_manufacturer_script(dev, dcbent, head, script);
243 else
244 ret = run_lvds_table(dev, dcbent, head, script, pxclk);
245
246 bios->fp.last_script_invoc = (script << 1 | head);
247
248 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000;
249 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding);
250
251 nvif_wr32(device, NV_PBUS_POWERCTRL_2, 0);
252
253 return ret;
254 }
255
256 struct lvdstableheader {
257 uint8_t lvds_ver, headerlen, recordlen;
258 };
259
260 static int parse_lvds_manufacturer_table_header(struct drm_device *dev, struct nvbios *bios, struct lvdstableheader *lth)
261 {
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269 struct nouveau_drm *drm = nouveau_drm(dev);
270 uint8_t lvds_ver, headerlen, recordlen;
271
272 memset(lth, 0, sizeof(struct lvdstableheader));
273
274 if (bios->fp.lvdsmanufacturerpointer == 0x0) {
275 NV_ERROR(drm, "Pointer to LVDS manufacturer table invalid\n");
276 return -EINVAL;
277 }
278
279 lvds_ver = bios->data[bios->fp.lvdsmanufacturerpointer];
280
281 switch (lvds_ver) {
282 case 0x0a:
283 headerlen = 2;
284 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];
285 break;
286 case 0x30:
287 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];
288 if (headerlen < 0x1f) {
289 NV_ERROR(drm, "LVDS table header not understood\n");
290 return -EINVAL;
291 }
292 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2];
293 break;
294 case 0x40:
295 headerlen = bios->data[bios->fp.lvdsmanufacturerpointer + 1];
296 if (headerlen < 0x7) {
297 NV_ERROR(drm, "LVDS table header not understood\n");
298 return -EINVAL;
299 }
300 recordlen = bios->data[bios->fp.lvdsmanufacturerpointer + 2];
301 break;
302 default:
303 NV_ERROR(drm,
304 "LVDS table revision %d.%d not currently supported\n",
305 lvds_ver >> 4, lvds_ver & 0xf);
306 return -ENOSYS;
307 }
308
309 lth->lvds_ver = lvds_ver;
310 lth->headerlen = headerlen;
311 lth->recordlen = recordlen;
312
313 return 0;
314 }
315
316 static int
317 get_fp_strap(struct drm_device *dev, struct nvbios *bios)
318 {
319 struct nouveau_drm *drm = nouveau_drm(dev);
320 struct nvif_object *device = &drm->client.device.object;
321
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329
330
331 if (bios->major_version < 5 && bios->data[0x48] & 0x4)
332 return NVReadVgaCrtc5758(dev, 0, 0xf) & 0xf;
333
334 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_MAXWELL)
335 return nvif_rd32(device, 0x001800) & 0x0000000f;
336 else
337 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA)
338 return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 24) & 0xf;
339 else
340 return (nvif_rd32(device, NV_PEXTDEV_BOOT_0) >> 16) & 0xf;
341 }
342
343 static int parse_fp_mode_table(struct drm_device *dev, struct nvbios *bios)
344 {
345 struct nouveau_drm *drm = nouveau_drm(dev);
346 uint8_t *fptable;
347 uint8_t fptable_ver, headerlen = 0, recordlen, fpentries = 0xf, fpindex;
348 int ret, ofs, fpstrapping;
349 struct lvdstableheader lth;
350
351 if (bios->fp.fptablepointer == 0x0) {
352
353 NV_DEBUG(drm, "Pointer to flat panel table invalid\n");
354 bios->digital_min_front_porch = 0x4b;
355 return 0;
356 }
357
358 fptable = &bios->data[bios->fp.fptablepointer];
359 fptable_ver = fptable[0];
360
361 switch (fptable_ver) {
362
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369
370
371 case 0x05:
372 recordlen = 42;
373 ofs = -1;
374 break;
375 case 0x10:
376 recordlen = 44;
377 ofs = 0;
378 break;
379 case 0x20:
380 headerlen = fptable[1];
381 recordlen = fptable[2];
382 fpentries = fptable[3];
383
384
385
386
387 bios->digital_min_front_porch = fptable[4];
388 ofs = -7;
389 break;
390 default:
391 NV_ERROR(drm,
392 "FP table revision %d.%d not currently supported\n",
393 fptable_ver >> 4, fptable_ver & 0xf);
394 return -ENOSYS;
395 }
396
397 if (!bios->is_mobile)
398 return 0;
399
400 ret = parse_lvds_manufacturer_table_header(dev, bios, <h);
401 if (ret)
402 return ret;
403
404 if (lth.lvds_ver == 0x30 || lth.lvds_ver == 0x40) {
405 bios->fp.fpxlatetableptr = bios->fp.lvdsmanufacturerpointer +
406 lth.headerlen + 1;
407 bios->fp.xlatwidth = lth.recordlen;
408 }
409 if (bios->fp.fpxlatetableptr == 0x0) {
410 NV_ERROR(drm, "Pointer to flat panel xlat table invalid\n");
411 return -EINVAL;
412 }
413
414 fpstrapping = get_fp_strap(dev, bios);
415
416 fpindex = bios->data[bios->fp.fpxlatetableptr +
417 fpstrapping * bios->fp.xlatwidth];
418
419 if (fpindex > fpentries) {
420 NV_ERROR(drm, "Bad flat panel table index\n");
421 return -ENOENT;
422 }
423
424
425 if (lth.lvds_ver > 0x10)
426 bios->fp_no_ddc = fpstrapping != 0xf || fpindex != 0xf;
427
428
429
430
431
432
433 if (fpstrapping == 0xf || fpindex == 0xf)
434 return 0;
435
436 bios->fp.mode_ptr = bios->fp.fptablepointer + headerlen +
437 recordlen * fpindex + ofs;
438
439 NV_INFO(drm, "BIOS FP mode: %dx%d (%dkHz pixel clock)\n",
440 ROM16(bios->data[bios->fp.mode_ptr + 11]) + 1,
441 ROM16(bios->data[bios->fp.mode_ptr + 25]) + 1,
442 ROM16(bios->data[bios->fp.mode_ptr + 7]) * 10);
443
444 return 0;
445 }
446
447 bool nouveau_bios_fp_mode(struct drm_device *dev, struct drm_display_mode *mode)
448 {
449 struct nouveau_drm *drm = nouveau_drm(dev);
450 struct nvbios *bios = &drm->vbios;
451 uint8_t *mode_entry = &bios->data[bios->fp.mode_ptr];
452
453 if (!mode)
454 return bios->fp.mode_ptr;
455
456 memset(mode, 0, sizeof(struct drm_display_mode));
457
458
459
460
461
462
463 mode->clock = ROM16(mode_entry[7]) * 10;
464
465 mode->hdisplay = ROM16(mode_entry[11]) + 1;
466
467
468
469
470 mode->hsync_start = ROM16(mode_entry[17]) + 1;
471 mode->hsync_end = ROM16(mode_entry[19]) + 1;
472 mode->htotal = ROM16(mode_entry[21]) + 1;
473
474 mode->vdisplay = ROM16(mode_entry[25]) + 1;
475 mode->vsync_start = ROM16(mode_entry[31]) + 1;
476 mode->vsync_end = ROM16(mode_entry[33]) + 1;
477 mode->vtotal = ROM16(mode_entry[35]) + 1;
478 mode->flags |= (mode_entry[37] & 0x10) ?
479 DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
480 mode->flags |= (mode_entry[37] & 0x1) ?
481 DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
482
483
484
485
486
487 mode->status = MODE_OK;
488 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
489 drm_mode_set_name(mode);
490 return bios->fp.mode_ptr;
491 }
492
493 int nouveau_bios_parse_lvds_table(struct drm_device *dev, int pxclk, bool *dl, bool *if_is_24bit)
494 {
495
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520 struct nouveau_drm *drm = nouveau_drm(dev);
521 struct nvbios *bios = &drm->vbios;
522 int fpstrapping = get_fp_strap(dev, bios), lvdsmanufacturerindex = 0;
523 struct lvdstableheader lth;
524 uint16_t lvdsofs;
525 int ret, chip_version = bios->chip_version;
526
527 ret = parse_lvds_manufacturer_table_header(dev, bios, <h);
528 if (ret)
529 return ret;
530
531 switch (lth.lvds_ver) {
532 case 0x0a:
533 lvdsmanufacturerindex = bios->data[
534 bios->fp.fpxlatemanufacturertableptr +
535 fpstrapping];
536
537
538 if (!pxclk)
539 break;
540
541 if (chip_version < 0x25) {
542
543
544
545
546
547 lvdsmanufacturerindex =
548 (bios->legacy.lvds_single_a_script_ptr & 1) ?
549 2 : 0;
550 if (pxclk >= bios->fp.duallink_transition_clk)
551 lvdsmanufacturerindex++;
552 } else if (chip_version < 0x30) {
553
554
555
556
557
558
559
560
561
562 lvdsmanufacturerindex = 0;
563 } else {
564
565 lvdsmanufacturerindex = 0;
566 if (pxclk >= bios->fp.duallink_transition_clk)
567 lvdsmanufacturerindex = 2;
568 if (pxclk >= 140000)
569 lvdsmanufacturerindex = 3;
570 }
571
572
573
574
575
576 break;
577 case 0x30:
578 case 0x40:
579 lvdsmanufacturerindex = fpstrapping;
580 break;
581 default:
582 NV_ERROR(drm, "LVDS table revision not currently supported\n");
583 return -ENOSYS;
584 }
585
586 lvdsofs = bios->fp.xlated_entry = bios->fp.lvdsmanufacturerpointer + lth.headerlen + lth.recordlen * lvdsmanufacturerindex;
587 switch (lth.lvds_ver) {
588 case 0x0a:
589 bios->fp.power_off_for_reset = bios->data[lvdsofs] & 1;
590 bios->fp.reset_after_pclk_change = bios->data[lvdsofs] & 2;
591 bios->fp.dual_link = bios->data[lvdsofs] & 4;
592 bios->fp.link_c_increment = bios->data[lvdsofs] & 8;
593 *if_is_24bit = bios->data[lvdsofs] & 16;
594 break;
595 case 0x30:
596 case 0x40:
597
598
599
600
601 bios->fp.power_off_for_reset = true;
602 bios->fp.reset_after_pclk_change = true;
603
604
605
606
607
608 bios->fp.dual_link = bios->data[lvdsofs] & 1;
609 bios->fp.if_is_24bit = bios->data[lvdsofs] & 2;
610 bios->fp.strapless_is_24bit = bios->data[bios->fp.lvdsmanufacturerpointer + 4];
611 bios->fp.duallink_transition_clk = ROM16(bios->data[bios->fp.lvdsmanufacturerpointer + 5]) * 10;
612 break;
613 }
614
615
616 if (pxclk && (chip_version < 0x25 || chip_version > 0x28))
617 bios->fp.dual_link = (pxclk >= bios->fp.duallink_transition_clk);
618
619 *dl = bios->fp.dual_link;
620
621 return 0;
622 }
623
624 int run_tmds_table(struct drm_device *dev, struct dcb_output *dcbent, int head, int pxclk)
625 {
626
627
628
629
630
631
632
633
634
635 struct nouveau_drm *drm = nouveau_drm(dev);
636 struct nvif_object *device = &drm->client.device.object;
637 struct nvbios *bios = &drm->vbios;
638 int cv = bios->chip_version;
639 uint16_t clktable = 0, scriptptr;
640 uint32_t sel_clk_binding, sel_clk;
641
642
643 if (cv >= 0x17 && cv != 0x1a && cv != 0x20 &&
644 dcbent->location != DCB_LOC_ON_CHIP)
645 return 0;
646
647 switch (ffs(dcbent->or)) {
648 case 1:
649 clktable = bios->tmds.output0_script_ptr;
650 break;
651 case 2:
652 case 3:
653 clktable = bios->tmds.output1_script_ptr;
654 break;
655 }
656
657 if (!clktable) {
658 NV_ERROR(drm, "Pixel clock comparison table not found\n");
659 return -EINVAL;
660 }
661
662 scriptptr = clkcmptable(bios, clktable, pxclk);
663
664 if (!scriptptr) {
665 NV_ERROR(drm, "TMDS output init script not found\n");
666 return -ENOENT;
667 }
668
669
670 sel_clk_binding = nvif_rd32(device, NV_PRAMDAC_SEL_CLK) & 0x50000;
671 run_digital_op_script(dev, scriptptr, dcbent, head, pxclk >= 165000);
672 sel_clk = NVReadRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK) & ~0x50000;
673 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_SEL_CLK, sel_clk | sel_clk_binding);
674
675 return 0;
676 }
677
678 static void parse_script_table_pointers(struct nvbios *bios, uint16_t offset)
679 {
680
681
682
683
684
685
686
687
688
689
690
691
692 bios->init_script_tbls_ptr = ROM16(bios->data[offset]);
693 }
694
695 static int parse_bit_A_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
696 {
697
698
699
700
701
702
703 struct nouveau_drm *drm = nouveau_drm(dev);
704 uint16_t load_table_ptr;
705 uint8_t version, headerlen, entrylen, num_entries;
706
707 if (bitentry->length != 3) {
708 NV_ERROR(drm, "Do not understand BIT A table\n");
709 return -EINVAL;
710 }
711
712 load_table_ptr = ROM16(bios->data[bitentry->offset]);
713
714 if (load_table_ptr == 0x0) {
715 NV_DEBUG(drm, "Pointer to BIT loadval table invalid\n");
716 return -EINVAL;
717 }
718
719 version = bios->data[load_table_ptr];
720
721 if (version != 0x10) {
722 NV_ERROR(drm, "BIT loadval table version %d.%d not supported\n",
723 version >> 4, version & 0xF);
724 return -ENOSYS;
725 }
726
727 headerlen = bios->data[load_table_ptr + 1];
728 entrylen = bios->data[load_table_ptr + 2];
729 num_entries = bios->data[load_table_ptr + 3];
730
731 if (headerlen != 4 || entrylen != 4 || num_entries != 2) {
732 NV_ERROR(drm, "Do not understand BIT loadval table\n");
733 return -EINVAL;
734 }
735
736
737 bios->dactestval = ROM32(bios->data[load_table_ptr + headerlen]) & 0x3ff;
738
739 return 0;
740 }
741
742 static int parse_bit_display_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
743 {
744
745
746
747
748
749
750
751
752 struct nouveau_drm *drm = nouveau_drm(dev);
753
754 if (bitentry->length != 4) {
755 NV_ERROR(drm, "Do not understand BIT display table\n");
756 return -EINVAL;
757 }
758
759 bios->fp.fptablepointer = ROM16(bios->data[bitentry->offset + 2]);
760
761 return 0;
762 }
763
764 static int parse_bit_init_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
765 {
766
767
768
769
770
771 struct nouveau_drm *drm = nouveau_drm(dev);
772
773 if (bitentry->length < 14) {
774 NV_ERROR(drm, "Do not understand init table\n");
775 return -EINVAL;
776 }
777
778 parse_script_table_pointers(bios, bitentry->offset);
779 return 0;
780 }
781
782 static int parse_bit_i_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
783 {
784
785
786
787
788
789
790
791
792
793
794
795 struct nouveau_drm *drm = nouveau_drm(dev);
796 uint16_t daccmpoffset;
797 uint8_t dacver, dacheaderlen;
798
799 if (bitentry->length < 6) {
800 NV_ERROR(drm, "BIT i table too short for needed information\n");
801 return -EINVAL;
802 }
803
804
805
806
807
808 bios->feature_byte = bios->data[bitentry->offset + 5];
809 bios->is_mobile = bios->feature_byte & FEATURE_MOBILE;
810
811 if (bitentry->length < 15) {
812 NV_WARN(drm, "BIT i table not long enough for DAC load "
813 "detection comparison table\n");
814 return -EINVAL;
815 }
816
817 daccmpoffset = ROM16(bios->data[bitentry->offset + 13]);
818
819
820 if (!daccmpoffset)
821 return 0;
822
823
824
825
826
827
828
829 dacver = bios->data[daccmpoffset];
830 dacheaderlen = bios->data[daccmpoffset + 1];
831
832 if (dacver != 0x00 && dacver != 0x10) {
833 NV_WARN(drm, "DAC load detection comparison table version "
834 "%d.%d not known\n", dacver >> 4, dacver & 0xf);
835 return -ENOSYS;
836 }
837
838 bios->dactestval = ROM32(bios->data[daccmpoffset + dacheaderlen]);
839 bios->tvdactestval = ROM32(bios->data[daccmpoffset + dacheaderlen + 4]);
840
841 return 0;
842 }
843
844 static int parse_bit_lvds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
845 {
846
847
848
849
850
851
852
853 struct nouveau_drm *drm = nouveau_drm(dev);
854
855 if (bitentry->length != 2) {
856 NV_ERROR(drm, "Do not understand BIT LVDS table\n");
857 return -EINVAL;
858 }
859
860
861
862
863
864 bios->fp.lvdsmanufacturerpointer = ROM16(bios->data[bitentry->offset]);
865
866 return 0;
867 }
868
869 static int
870 parse_bit_M_tbl_entry(struct drm_device *dev, struct nvbios *bios,
871 struct bit_entry *bitentry)
872 {
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887 if (bitentry->length < 0x5)
888 return 0;
889
890 if (bitentry->version < 2) {
891 bios->ram_restrict_group_count = bios->data[bitentry->offset + 2];
892 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 3]);
893 } else {
894 bios->ram_restrict_group_count = bios->data[bitentry->offset + 0];
895 bios->ram_restrict_tbl_ptr = ROM16(bios->data[bitentry->offset + 1]);
896 }
897
898 return 0;
899 }
900
901 static int parse_bit_tmds_tbl_entry(struct drm_device *dev, struct nvbios *bios, struct bit_entry *bitentry)
902 {
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926 struct nouveau_drm *drm = nouveau_drm(dev);
927 uint16_t tmdstableptr, script1, script2;
928
929 if (bitentry->length != 2) {
930 NV_ERROR(drm, "Do not understand BIT TMDS table\n");
931 return -EINVAL;
932 }
933
934 tmdstableptr = ROM16(bios->data[bitentry->offset]);
935 if (!tmdstableptr) {
936 NV_INFO(drm, "Pointer to TMDS table not found\n");
937 return -EINVAL;
938 }
939
940 NV_INFO(drm, "TMDS table version %d.%d\n",
941 bios->data[tmdstableptr] >> 4, bios->data[tmdstableptr] & 0xf);
942
943
944 if (bios->data[tmdstableptr] != 0x11)
945 return -ENOSYS;
946
947
948
949
950
951 script1 = ROM16(bios->data[tmdstableptr + 7]);
952 script2 = ROM16(bios->data[tmdstableptr + 9]);
953 if (bios->data[script1] != 'q' || bios->data[script2] != 'q')
954 NV_WARN(drm, "TMDS table script pointers not stubbed\n");
955
956 bios->tmds.output0_script_ptr = ROM16(bios->data[tmdstableptr + 11]);
957 bios->tmds.output1_script_ptr = ROM16(bios->data[tmdstableptr + 13]);
958
959 return 0;
960 }
961
962 struct bit_table {
963 const char id;
964 int (* const parse_fn)(struct drm_device *, struct nvbios *, struct bit_entry *);
965 };
966
967 #define BIT_TABLE(id, funcid) ((struct bit_table){ id, parse_bit_##funcid##_tbl_entry })
968
969 int
970 bit_table(struct drm_device *dev, u8 id, struct bit_entry *bit)
971 {
972 struct nouveau_drm *drm = nouveau_drm(dev);
973 struct nvbios *bios = &drm->vbios;
974 u8 entries, *entry;
975
976 if (bios->type != NVBIOS_BIT)
977 return -ENODEV;
978
979 entries = bios->data[bios->offset + 10];
980 entry = &bios->data[bios->offset + 12];
981 while (entries--) {
982 if (entry[0] == id) {
983 bit->id = entry[0];
984 bit->version = entry[1];
985 bit->length = ROM16(entry[2]);
986 bit->offset = ROM16(entry[4]);
987 bit->data = ROMPTR(dev, entry[4]);
988 return 0;
989 }
990
991 entry += bios->data[bios->offset + 9];
992 }
993
994 return -ENOENT;
995 }
996
997 static int
998 parse_bit_table(struct nvbios *bios, const uint16_t bitoffset,
999 struct bit_table *table)
1000 {
1001 struct drm_device *dev = bios->dev;
1002 struct nouveau_drm *drm = nouveau_drm(dev);
1003 struct bit_entry bitentry;
1004
1005 if (bit_table(dev, table->id, &bitentry) == 0)
1006 return table->parse_fn(dev, bios, &bitentry);
1007
1008 NV_INFO(drm, "BIT table '%c' not found\n", table->id);
1009 return -ENOSYS;
1010 }
1011
1012 static int
1013 parse_bit_structure(struct nvbios *bios, const uint16_t bitoffset)
1014 {
1015 int ret;
1016
1017
1018
1019
1020
1021
1022
1023 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('i', i));
1024 if (ret)
1025 return ret;
1026 if (bios->major_version >= 0x60)
1027 parse_bit_table(bios, bitoffset, &BIT_TABLE('A', A));
1028 parse_bit_table(bios, bitoffset, &BIT_TABLE('D', display));
1029 ret = parse_bit_table(bios, bitoffset, &BIT_TABLE('I', init));
1030 if (ret)
1031 return ret;
1032 parse_bit_table(bios, bitoffset, &BIT_TABLE('M', M));
1033 parse_bit_table(bios, bitoffset, &BIT_TABLE('L', lvds));
1034 parse_bit_table(bios, bitoffset, &BIT_TABLE('T', tmds));
1035
1036 return 0;
1037 }
1038
1039 static int parse_bmp_structure(struct drm_device *dev, struct nvbios *bios, unsigned int offset)
1040 {
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084 struct nouveau_drm *drm = nouveau_drm(dev);
1085 uint8_t *bmp = &bios->data[offset], bmp_version_major, bmp_version_minor;
1086 uint16_t bmplength;
1087 uint16_t legacy_scripts_offset, legacy_i2c_offset;
1088
1089
1090 bios->digital_min_front_porch = 0x4b;
1091 bios->fmaxvco = 256000;
1092 bios->fminvco = 128000;
1093 bios->fp.duallink_transition_clk = 90000;
1094
1095 bmp_version_major = bmp[5];
1096 bmp_version_minor = bmp[6];
1097
1098 NV_INFO(drm, "BMP version %d.%d\n",
1099 bmp_version_major, bmp_version_minor);
1100
1101
1102
1103
1104
1105 if (bmp_version_major < 5)
1106 *(uint16_t *)&bios->data[0x36] = 0;
1107
1108
1109
1110
1111
1112
1113 if ((bmp_version_major < 5 && bmp_version_minor != 1) || bmp_version_major > 5) {
1114 NV_ERROR(drm, "You have an unsupported BMP version. "
1115 "Please send in your bios\n");
1116 return -ENOSYS;
1117 }
1118
1119 if (bmp_version_major == 0)
1120
1121 return 0;
1122 else if (bmp_version_major == 1)
1123 bmplength = 44;
1124 else if (bmp_version_major == 2)
1125 bmplength = 48;
1126 else if (bmp_version_major == 3)
1127 bmplength = 54;
1128
1129 else if (bmp_version_major == 4 || bmp_version_minor < 0x1)
1130
1131 bmplength = 62;
1132
1133 else if (bmp_version_minor < 0x6)
1134 bmplength = 67;
1135 else if (bmp_version_minor < 0x10)
1136 bmplength = 75;
1137 else if (bmp_version_minor == 0x10)
1138 bmplength = 89;
1139 else if (bmp_version_minor < 0x14)
1140 bmplength = 118;
1141 else if (bmp_version_minor < 0x24)
1142
1143
1144
1145
1146
1147 bmplength = 123;
1148 else if (bmp_version_minor < 0x27)
1149
1150
1151
1152
1153 bmplength = 144;
1154 else
1155
1156
1157
1158
1159 bmplength = 158;
1160
1161
1162 if (nv_cksum(bmp, 8)) {
1163 NV_ERROR(drm, "Bad BMP checksum\n");
1164 return -EINVAL;
1165 }
1166
1167
1168
1169
1170
1171
1172
1173 bios->feature_byte = bmp[9];
1174
1175 if (bmp_version_major < 5 || bmp_version_minor < 0x10)
1176 bios->old_style_init = true;
1177 legacy_scripts_offset = 18;
1178 if (bmp_version_major < 2)
1179 legacy_scripts_offset -= 4;
1180 bios->init_script_tbls_ptr = ROM16(bmp[legacy_scripts_offset]);
1181 bios->extra_init_script_tbl_ptr = ROM16(bmp[legacy_scripts_offset + 2]);
1182
1183 if (bmp_version_major > 2) {
1184 bios->legacy.mem_init_tbl_ptr = ROM16(bmp[24]);
1185 bios->legacy.sdr_seq_tbl_ptr = ROM16(bmp[26]);
1186 bios->legacy.ddr_seq_tbl_ptr = ROM16(bmp[28]);
1187 }
1188
1189 legacy_i2c_offset = 0x48;
1190 if (bmplength > 61)
1191 legacy_i2c_offset = offset + 54;
1192 bios->legacy.i2c_indices.crt = bios->data[legacy_i2c_offset];
1193 bios->legacy.i2c_indices.tv = bios->data[legacy_i2c_offset + 1];
1194 bios->legacy.i2c_indices.panel = bios->data[legacy_i2c_offset + 2];
1195
1196 if (bmplength > 74) {
1197 bios->fmaxvco = ROM32(bmp[67]);
1198 bios->fminvco = ROM32(bmp[71]);
1199 }
1200 if (bmplength > 88)
1201 parse_script_table_pointers(bios, offset + 75);
1202 if (bmplength > 94) {
1203 bios->tmds.output0_script_ptr = ROM16(bmp[89]);
1204 bios->tmds.output1_script_ptr = ROM16(bmp[91]);
1205
1206
1207
1208
1209
1210 bios->legacy.lvds_single_a_script_ptr = ROM16(bmp[95]);
1211 }
1212 if (bmplength > 108) {
1213 bios->fp.fptablepointer = ROM16(bmp[105]);
1214 bios->fp.fpxlatetableptr = ROM16(bmp[107]);
1215 bios->fp.xlatwidth = 1;
1216 }
1217 if (bmplength > 120) {
1218 bios->fp.lvdsmanufacturerpointer = ROM16(bmp[117]);
1219 bios->fp.fpxlatemanufacturertableptr = ROM16(bmp[119]);
1220 }
1221 #if 0
1222 if (bmplength > 143)
1223 bios->pll_limit_tbl_ptr = ROM16(bmp[142]);
1224 #endif
1225
1226 if (bmplength > 157)
1227 bios->fp.duallink_transition_clk = ROM16(bmp[156]) * 10;
1228
1229 return 0;
1230 }
1231
1232 static uint16_t findstr(uint8_t *data, int n, const uint8_t *str, int len)
1233 {
1234 int i, j;
1235
1236 for (i = 0; i <= (n - len); i++) {
1237 for (j = 0; j < len; j++)
1238 if (data[i + j] != str[j])
1239 break;
1240 if (j == len)
1241 return i;
1242 }
1243
1244 return 0;
1245 }
1246
1247 void *
1248 olddcb_table(struct drm_device *dev)
1249 {
1250 struct nouveau_drm *drm = nouveau_drm(dev);
1251 u8 *dcb = NULL;
1252
1253 if (drm->client.device.info.family > NV_DEVICE_INFO_V0_TNT)
1254 dcb = ROMPTR(dev, drm->vbios.data[0x36]);
1255 if (!dcb) {
1256 NV_WARN(drm, "No DCB data found in VBIOS\n");
1257 return NULL;
1258 }
1259
1260 if (dcb[0] >= 0x42) {
1261 NV_WARN(drm, "DCB version 0x%02x unknown\n", dcb[0]);
1262 return NULL;
1263 } else
1264 if (dcb[0] >= 0x30) {
1265 if (ROM32(dcb[6]) == 0x4edcbdcb)
1266 return dcb;
1267 } else
1268 if (dcb[0] >= 0x20) {
1269 if (ROM32(dcb[4]) == 0x4edcbdcb)
1270 return dcb;
1271 } else
1272 if (dcb[0] >= 0x15) {
1273 if (!memcmp(&dcb[-7], "DEV_REC", 7))
1274 return dcb;
1275 } else {
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293 NV_WARN(drm, "No useful DCB data in VBIOS\n");
1294 return NULL;
1295 }
1296
1297 NV_WARN(drm, "DCB header validation failed\n");
1298 return NULL;
1299 }
1300
1301 void *
1302 olddcb_outp(struct drm_device *dev, u8 idx)
1303 {
1304 u8 *dcb = olddcb_table(dev);
1305 if (dcb && dcb[0] >= 0x30) {
1306 if (idx < dcb[2])
1307 return dcb + dcb[1] + (idx * dcb[3]);
1308 } else
1309 if (dcb && dcb[0] >= 0x20) {
1310 u8 *i2c = ROMPTR(dev, dcb[2]);
1311 u8 *ent = dcb + 8 + (idx * 8);
1312 if (i2c && ent < i2c)
1313 return ent;
1314 } else
1315 if (dcb && dcb[0] >= 0x15) {
1316 u8 *i2c = ROMPTR(dev, dcb[2]);
1317 u8 *ent = dcb + 4 + (idx * 10);
1318 if (i2c && ent < i2c)
1319 return ent;
1320 }
1321
1322 return NULL;
1323 }
1324
1325 int
1326 olddcb_outp_foreach(struct drm_device *dev, void *data,
1327 int (*exec)(struct drm_device *, void *, int idx, u8 *outp))
1328 {
1329 int ret, idx = -1;
1330 u8 *outp = NULL;
1331 while ((outp = olddcb_outp(dev, ++idx))) {
1332 if (ROM32(outp[0]) == 0x00000000)
1333 break;
1334 if (ROM32(outp[0]) == 0xffffffff)
1335 break;
1336
1337 if ((outp[0] & 0x0f) == DCB_OUTPUT_UNUSED)
1338 continue;
1339 if ((outp[0] & 0x0f) == DCB_OUTPUT_EOL)
1340 break;
1341
1342 ret = exec(dev, data, idx, outp);
1343 if (ret)
1344 return ret;
1345 }
1346
1347 return 0;
1348 }
1349
1350 u8 *
1351 olddcb_conntab(struct drm_device *dev)
1352 {
1353 u8 *dcb = olddcb_table(dev);
1354 if (dcb && dcb[0] >= 0x30 && dcb[1] >= 0x16) {
1355 u8 *conntab = ROMPTR(dev, dcb[0x14]);
1356 if (conntab && conntab[0] >= 0x30 && conntab[0] <= 0x40)
1357 return conntab;
1358 }
1359 return NULL;
1360 }
1361
1362 u8 *
1363 olddcb_conn(struct drm_device *dev, u8 idx)
1364 {
1365 u8 *conntab = olddcb_conntab(dev);
1366 if (conntab && idx < conntab[2])
1367 return conntab + conntab[1] + (idx * conntab[3]);
1368 return NULL;
1369 }
1370
1371 static struct dcb_output *new_dcb_entry(struct dcb_table *dcb)
1372 {
1373 struct dcb_output *entry = &dcb->entry[dcb->entries];
1374
1375 memset(entry, 0, sizeof(struct dcb_output));
1376 entry->index = dcb->entries++;
1377
1378 return entry;
1379 }
1380
1381 static void fabricate_dcb_output(struct dcb_table *dcb, int type, int i2c,
1382 int heads, int or)
1383 {
1384 struct dcb_output *entry = new_dcb_entry(dcb);
1385
1386 entry->type = type;
1387 entry->i2c_index = i2c;
1388 entry->heads = heads;
1389 if (type != DCB_OUTPUT_ANALOG)
1390 entry->location = !DCB_LOC_ON_CHIP;
1391 entry->or = or;
1392 }
1393
1394 static bool
1395 parse_dcb20_entry(struct drm_device *dev, struct dcb_table *dcb,
1396 uint32_t conn, uint32_t conf, struct dcb_output *entry)
1397 {
1398 struct nouveau_drm *drm = nouveau_drm(dev);
1399 int link = 0;
1400
1401 entry->type = conn & 0xf;
1402 entry->i2c_index = (conn >> 4) & 0xf;
1403 entry->heads = (conn >> 8) & 0xf;
1404 entry->connector = (conn >> 12) & 0xf;
1405 entry->bus = (conn >> 16) & 0xf;
1406 entry->location = (conn >> 20) & 0x3;
1407 entry->or = (conn >> 24) & 0xf;
1408
1409 switch (entry->type) {
1410 case DCB_OUTPUT_ANALOG:
1411
1412
1413
1414
1415 entry->crtconf.maxfreq = (dcb->version < 0x30) ?
1416 (conf & 0xffff) * 10 :
1417 (conf & 0xff) * 10000;
1418 break;
1419 case DCB_OUTPUT_LVDS:
1420 {
1421 uint32_t mask;
1422 if (conf & 0x1)
1423 entry->lvdsconf.use_straps_for_mode = true;
1424 if (dcb->version < 0x22) {
1425 mask = ~0xd;
1426
1427
1428
1429
1430
1431 entry->lvdsconf.use_straps_for_mode = true;
1432
1433
1434
1435
1436 if (conf & 0x4 || conf & 0x8)
1437 entry->lvdsconf.use_power_scripts = true;
1438 } else {
1439 mask = ~0x7;
1440 if (conf & 0x2)
1441 entry->lvdsconf.use_acpi_for_edid = true;
1442 if (conf & 0x4)
1443 entry->lvdsconf.use_power_scripts = true;
1444 entry->lvdsconf.sor.link = (conf & 0x00000030) >> 4;
1445 link = entry->lvdsconf.sor.link;
1446 }
1447 if (conf & mask) {
1448
1449
1450
1451
1452 if (dcb->version >= 0x40)
1453 break;
1454
1455 NV_ERROR(drm, "Unknown LVDS configuration bits, "
1456 "please report\n");
1457 }
1458 break;
1459 }
1460 case DCB_OUTPUT_TV:
1461 {
1462 if (dcb->version >= 0x30)
1463 entry->tvconf.has_component_output = conf & (0x8 << 4);
1464 else
1465 entry->tvconf.has_component_output = false;
1466
1467 break;
1468 }
1469 case DCB_OUTPUT_DP:
1470 entry->dpconf.sor.link = (conf & 0x00000030) >> 4;
1471 entry->extdev = (conf & 0x0000ff00) >> 8;
1472 switch ((conf & 0x00e00000) >> 21) {
1473 case 0:
1474 entry->dpconf.link_bw = 162000;
1475 break;
1476 case 1:
1477 entry->dpconf.link_bw = 270000;
1478 break;
1479 case 2:
1480 entry->dpconf.link_bw = 540000;
1481 break;
1482 case 3:
1483 default:
1484 entry->dpconf.link_bw = 810000;
1485 break;
1486 }
1487 switch ((conf & 0x0f000000) >> 24) {
1488 case 0xf:
1489 case 0x4:
1490 entry->dpconf.link_nr = 4;
1491 break;
1492 case 0x3:
1493 case 0x2:
1494 entry->dpconf.link_nr = 2;
1495 break;
1496 default:
1497 entry->dpconf.link_nr = 1;
1498 break;
1499 }
1500 link = entry->dpconf.sor.link;
1501 break;
1502 case DCB_OUTPUT_TMDS:
1503 if (dcb->version >= 0x40) {
1504 entry->tmdsconf.sor.link = (conf & 0x00000030) >> 4;
1505 entry->extdev = (conf & 0x0000ff00) >> 8;
1506 link = entry->tmdsconf.sor.link;
1507 }
1508 else if (dcb->version >= 0x30)
1509 entry->tmdsconf.slave_addr = (conf & 0x00000700) >> 8;
1510 else if (dcb->version >= 0x22)
1511 entry->tmdsconf.slave_addr = (conf & 0x00000070) >> 4;
1512 break;
1513 case DCB_OUTPUT_EOL:
1514
1515 dcb->entries--;
1516 return false;
1517 default:
1518 break;
1519 }
1520
1521 if (dcb->version < 0x40) {
1522
1523
1524
1525 entry->duallink_possible =
1526 ((1 << (ffs(entry->or) - 1)) * 3 == entry->or);
1527 } else {
1528 entry->duallink_possible = (entry->sorconf.link == 3);
1529 }
1530
1531
1532 if (conf & 0x100000)
1533 entry->i2c_upper_default = true;
1534
1535 entry->hasht = (entry->extdev << 8) | (entry->location << 4) |
1536 entry->type;
1537 entry->hashm = (entry->heads << 8) | (link << 6) | entry->or;
1538 return true;
1539 }
1540
1541 static bool
1542 parse_dcb15_entry(struct drm_device *dev, struct dcb_table *dcb,
1543 uint32_t conn, uint32_t conf, struct dcb_output *entry)
1544 {
1545 struct nouveau_drm *drm = nouveau_drm(dev);
1546
1547 switch (conn & 0x0000000f) {
1548 case 0:
1549 entry->type = DCB_OUTPUT_ANALOG;
1550 break;
1551 case 1:
1552 entry->type = DCB_OUTPUT_TV;
1553 break;
1554 case 2:
1555 case 4:
1556 if (conn & 0x10)
1557 entry->type = DCB_OUTPUT_LVDS;
1558 else
1559 entry->type = DCB_OUTPUT_TMDS;
1560 break;
1561 case 3:
1562 entry->type = DCB_OUTPUT_LVDS;
1563 break;
1564 default:
1565 NV_ERROR(drm, "Unknown DCB type %d\n", conn & 0x0000000f);
1566 return false;
1567 }
1568
1569 entry->i2c_index = (conn & 0x0003c000) >> 14;
1570 entry->heads = ((conn & 0x001c0000) >> 18) + 1;
1571 entry->or = entry->heads;
1572 entry->location = (conn & 0x01e00000) >> 21;
1573 entry->bus = (conn & 0x0e000000) >> 25;
1574 entry->duallink_possible = false;
1575
1576 switch (entry->type) {
1577 case DCB_OUTPUT_ANALOG:
1578 entry->crtconf.maxfreq = (conf & 0xffff) * 10;
1579 break;
1580 case DCB_OUTPUT_TV:
1581 entry->tvconf.has_component_output = false;
1582 break;
1583 case DCB_OUTPUT_LVDS:
1584 if ((conn & 0x00003f00) >> 8 != 0x10)
1585 entry->lvdsconf.use_straps_for_mode = true;
1586 entry->lvdsconf.use_power_scripts = true;
1587 break;
1588 default:
1589 break;
1590 }
1591
1592 return true;
1593 }
1594
1595 static
1596 void merge_like_dcb_entries(struct drm_device *dev, struct dcb_table *dcb)
1597 {
1598
1599
1600
1601
1602
1603
1604 struct nouveau_drm *drm = nouveau_drm(dev);
1605 int i, newentries = 0;
1606
1607 for (i = 0; i < dcb->entries; i++) {
1608 struct dcb_output *ient = &dcb->entry[i];
1609 int j;
1610
1611 for (j = i + 1; j < dcb->entries; j++) {
1612 struct dcb_output *jent = &dcb->entry[j];
1613
1614 if (jent->type == 100)
1615 continue;
1616
1617
1618 if (jent->i2c_index == ient->i2c_index &&
1619 jent->type == ient->type &&
1620 jent->location == ient->location &&
1621 jent->or == ient->or) {
1622 NV_INFO(drm, "Merging DCB entries %d and %d\n",
1623 i, j);
1624 ient->heads |= jent->heads;
1625 jent->type = 100;
1626 }
1627 }
1628 }
1629
1630
1631 for (i = 0; i < dcb->entries; i++) {
1632 if (dcb->entry[i].type == 100)
1633 continue;
1634
1635 if (newentries != i) {
1636 dcb->entry[newentries] = dcb->entry[i];
1637 dcb->entry[newentries].index = newentries;
1638 }
1639 newentries++;
1640 }
1641
1642 dcb->entries = newentries;
1643 }
1644
1645 static bool
1646 apply_dcb_encoder_quirks(struct drm_device *dev, int idx, u32 *conn, u32 *conf)
1647 {
1648 struct nouveau_drm *drm = nouveau_drm(dev);
1649 struct dcb_table *dcb = &drm->vbios.dcb;
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663 if (nv_match_device(dev, 0x040d, 0x1028, 0x019b)) {
1664 if (*conn == 0x02026312 && *conf == 0x00000020)
1665 return false;
1666 }
1667
1668
1669
1670
1671
1672
1673 if (nv_match_device(dev, 0x0201, 0x1462, 0x8851)) {
1674 if (*conn == 0xf2005014 && *conf == 0xffffffff) {
1675 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 1, 1, 1);
1676 return false;
1677 }
1678 }
1679
1680
1681
1682
1683
1684 if (nv_match_device(dev, 0x0ca3, 0x1682, 0x3003)) {
1685 if (idx == 0) {
1686 *conn = 0x02001300;
1687 *conf = 0x00000028;
1688 } else
1689 if (idx == 1) {
1690 *conn = 0x01010312;
1691 *conf = 0x00020030;
1692 } else
1693 if (idx == 2) {
1694 *conn = 0x01010310;
1695 *conf = 0x00000028;
1696 } else
1697 if (idx == 3) {
1698 *conn = 0x02022362;
1699 *conf = 0x00020010;
1700 } else {
1701 *conn = 0x0000000e;
1702 *conf = 0x00000000;
1703 }
1704 }
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715 if (nv_match_device(dev, 0x0615, 0x1682, 0x2605)) {
1716 if (idx == 0) {
1717 *conn = 0x02002300;
1718 *conf = 0x00000028;
1719 } else
1720 if (idx == 1) {
1721 *conn = 0x01010312;
1722 *conf = 0x00020030;
1723 } else
1724 if (idx == 2) {
1725 *conn = 0x04020310;
1726 *conf = 0x00000028;
1727 } else
1728 if (idx == 3) {
1729 *conn = 0x02021322;
1730 *conf = 0x00020010;
1731 } else {
1732 *conn = 0x0000000e;
1733 *conf = 0x00000000;
1734 }
1735 }
1736
1737
1738 if (nv_match_device(dev, 0x0421, 0x3842, 0xc793)) {
1739 if (idx == 0 && *conn == 0x02000300)
1740 *conn = 0x02011300;
1741 else
1742 if (idx == 1 && *conn == 0x04011310)
1743 *conn = 0x04000310;
1744 else
1745 if (idx == 2 && *conn == 0x02011312)
1746 *conn = 0x02000312;
1747 }
1748
1749 return true;
1750 }
1751
1752 static void
1753 fabricate_dcb_encoder_table(struct drm_device *dev, struct nvbios *bios)
1754 {
1755 struct dcb_table *dcb = &bios->dcb;
1756 int all_heads = (nv_two_heads(dev) ? 3 : 1);
1757
1758 #ifdef __powerpc__
1759
1760 if (of_machine_is_compatible("PowerMac4,5")) {
1761 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS, 0, all_heads, 1);
1762 fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG, 1, all_heads, 2);
1763 return;
1764 }
1765 #endif
1766
1767
1768 fabricate_dcb_output(dcb, DCB_OUTPUT_ANALOG,
1769 bios->legacy.i2c_indices.crt, 1, 1);
1770
1771 if (nv04_tv_identify(dev, bios->legacy.i2c_indices.tv) >= 0)
1772 fabricate_dcb_output(dcb, DCB_OUTPUT_TV,
1773 bios->legacy.i2c_indices.tv,
1774 all_heads, 0);
1775
1776 else if (bios->tmds.output0_script_ptr ||
1777 bios->tmds.output1_script_ptr)
1778 fabricate_dcb_output(dcb, DCB_OUTPUT_TMDS,
1779 bios->legacy.i2c_indices.panel,
1780 all_heads, 1);
1781 }
1782
1783 static int
1784 parse_dcb_entry(struct drm_device *dev, void *data, int idx, u8 *outp)
1785 {
1786 struct nouveau_drm *drm = nouveau_drm(dev);
1787 struct dcb_table *dcb = &drm->vbios.dcb;
1788 u32 conf = (dcb->version >= 0x20) ? ROM32(outp[4]) : ROM32(outp[6]);
1789 u32 conn = ROM32(outp[0]);
1790 bool ret;
1791
1792 if (apply_dcb_encoder_quirks(dev, idx, &conn, &conf)) {
1793 struct dcb_output *entry = new_dcb_entry(dcb);
1794
1795 NV_INFO(drm, "DCB outp %02d: %08x %08x\n", idx, conn, conf);
1796
1797 if (dcb->version >= 0x20)
1798 ret = parse_dcb20_entry(dev, dcb, conn, conf, entry);
1799 else
1800 ret = parse_dcb15_entry(dev, dcb, conn, conf, entry);
1801 if (!ret)
1802 return 1;
1803
1804
1805
1806
1807
1808 if (entry->type == DCB_OUTPUT_TV &&
1809 entry->location == DCB_LOC_ON_CHIP)
1810 entry->i2c_index = 0x0f;
1811 }
1812
1813 return 0;
1814 }
1815
1816 static void
1817 dcb_fake_connectors(struct nvbios *bios)
1818 {
1819 struct dcb_table *dcbt = &bios->dcb;
1820 u8 map[16] = { };
1821 int i, idx = 0;
1822
1823
1824
1825
1826
1827
1828 if (!nv_match_device(bios->dev, 0x0392, 0x107d, 0x20a2)) {
1829 for (i = 0; i < dcbt->entries; i++) {
1830 if (dcbt->entry[i].connector)
1831 return;
1832 }
1833 }
1834
1835
1836
1837
1838
1839
1840
1841 for (i = 0; i < dcbt->entries; i++) {
1842 u8 i2c = dcbt->entry[i].i2c_index;
1843 if (i2c == 0x0f) {
1844 dcbt->entry[i].connector = idx++;
1845 } else {
1846 if (!map[i2c])
1847 map[i2c] = ++idx;
1848 dcbt->entry[i].connector = map[i2c] - 1;
1849 }
1850 }
1851
1852
1853
1854
1855 if (i > 1) {
1856 u8 *conntab = olddcb_conntab(bios->dev);
1857 if (conntab)
1858 conntab[0] = 0x00;
1859 }
1860 }
1861
1862 static int
1863 parse_dcb_table(struct drm_device *dev, struct nvbios *bios)
1864 {
1865 struct nouveau_drm *drm = nouveau_drm(dev);
1866 struct dcb_table *dcb = &bios->dcb;
1867 u8 *dcbt, *conn;
1868 int idx;
1869
1870 dcbt = olddcb_table(dev);
1871 if (!dcbt) {
1872
1873 if (bios->type == NVBIOS_BMP) {
1874 fabricate_dcb_encoder_table(dev, bios);
1875 return 0;
1876 }
1877
1878 return -EINVAL;
1879 }
1880
1881 NV_INFO(drm, "DCB version %d.%d\n", dcbt[0] >> 4, dcbt[0] & 0xf);
1882
1883 dcb->version = dcbt[0];
1884 olddcb_outp_foreach(dev, NULL, parse_dcb_entry);
1885
1886
1887
1888
1889
1890 if (dcb->version < 0x21)
1891 merge_like_dcb_entries(dev, dcb);
1892
1893
1894 idx = -1;
1895 while ((conn = olddcb_conn(dev, ++idx))) {
1896 if (conn[0] != 0xff) {
1897 if (olddcb_conntab(dev)[3] < 4)
1898 NV_INFO(drm, "DCB conn %02d: %04x\n",
1899 idx, ROM16(conn[0]));
1900 else
1901 NV_INFO(drm, "DCB conn %02d: %08x\n",
1902 idx, ROM32(conn[0]));
1903 }
1904 }
1905 dcb_fake_connectors(bios);
1906 return 0;
1907 }
1908
1909 static int load_nv17_hwsq_ucode_entry(struct drm_device *dev, struct nvbios *bios, uint16_t hwsq_offset, int entry)
1910 {
1911
1912
1913
1914
1915
1916
1917
1918
1919
1920 struct nouveau_drm *drm = nouveau_drm(dev);
1921 struct nvif_object *device = &drm->client.device.object;
1922 uint8_t bytes_to_write;
1923 uint16_t hwsq_entry_offset;
1924 int i;
1925
1926 if (bios->data[hwsq_offset] <= entry) {
1927 NV_ERROR(drm, "Too few entries in HW sequencer table for "
1928 "requested entry\n");
1929 return -ENOENT;
1930 }
1931
1932 bytes_to_write = bios->data[hwsq_offset + 1];
1933
1934 if (bytes_to_write != 36) {
1935 NV_ERROR(drm, "Unknown HW sequencer entry size\n");
1936 return -EINVAL;
1937 }
1938
1939 NV_INFO(drm, "Loading NV17 power sequencing microcode\n");
1940
1941 hwsq_entry_offset = hwsq_offset + 2 + entry * bytes_to_write;
1942
1943
1944 nvif_wr32(device, 0x00001304, ROM32(bios->data[hwsq_entry_offset]));
1945 bytes_to_write -= 4;
1946
1947
1948 for (i = 0; i < bytes_to_write; i += 4)
1949 nvif_wr32(device, 0x00001400 + i, ROM32(bios->data[hwsq_entry_offset + i + 4]));
1950
1951
1952 nvif_wr32(device, NV_PBUS_DEBUG_4, nvif_rd32(device, NV_PBUS_DEBUG_4) | 0x18);
1953
1954 return 0;
1955 }
1956
1957 static int load_nv17_hw_sequencer_ucode(struct drm_device *dev,
1958 struct nvbios *bios)
1959 {
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969 static const uint8_t hwsq_signature[] = { 'H', 'W', 'S', 'Q' };
1970 const int sz = sizeof(hwsq_signature);
1971 int hwsq_offset;
1972
1973 hwsq_offset = findstr(bios->data, bios->length, hwsq_signature, sz);
1974 if (!hwsq_offset)
1975 return 0;
1976
1977
1978 return load_nv17_hwsq_ucode_entry(dev, bios, hwsq_offset + sz, 0);
1979 }
1980
1981 uint8_t *nouveau_bios_embedded_edid(struct drm_device *dev)
1982 {
1983 struct nouveau_drm *drm = nouveau_drm(dev);
1984 struct nvbios *bios = &drm->vbios;
1985 static const uint8_t edid_sig[] = {
1986 0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00 };
1987 uint16_t offset = 0;
1988 uint16_t newoffset;
1989 int searchlen = NV_PROM_SIZE;
1990
1991 if (bios->fp.edid)
1992 return bios->fp.edid;
1993
1994 while (searchlen) {
1995 newoffset = findstr(&bios->data[offset], searchlen,
1996 edid_sig, 8);
1997 if (!newoffset)
1998 return NULL;
1999 offset += newoffset;
2000 if (!nv_cksum(&bios->data[offset], EDID1_LEN))
2001 break;
2002
2003 searchlen -= offset;
2004 offset++;
2005 }
2006
2007 NV_INFO(drm, "Found EDID in BIOS\n");
2008
2009 return bios->fp.edid = &bios->data[offset];
2010 }
2011
2012 static bool NVInitVBIOS(struct drm_device *dev)
2013 {
2014 struct nouveau_drm *drm = nouveau_drm(dev);
2015 struct nvkm_bios *bios = nvxx_bios(&drm->client.device);
2016 struct nvbios *legacy = &drm->vbios;
2017
2018 memset(legacy, 0, sizeof(struct nvbios));
2019 spin_lock_init(&legacy->lock);
2020 legacy->dev = dev;
2021
2022 legacy->data = bios->data;
2023 legacy->length = bios->size;
2024 legacy->major_version = bios->version.major;
2025 legacy->chip_version = bios->version.chip;
2026 if (bios->bit_offset) {
2027 legacy->type = NVBIOS_BIT;
2028 legacy->offset = bios->bit_offset;
2029 return !parse_bit_structure(legacy, legacy->offset + 6);
2030 } else
2031 if (bios->bmp_offset) {
2032 legacy->type = NVBIOS_BMP;
2033 legacy->offset = bios->bmp_offset;
2034 return !parse_bmp_structure(dev, legacy, legacy->offset);
2035 }
2036
2037 return false;
2038 }
2039
2040 int
2041 nouveau_run_vbios_init(struct drm_device *dev)
2042 {
2043 struct nouveau_drm *drm = nouveau_drm(dev);
2044 struct nvbios *bios = &drm->vbios;
2045 int ret = 0;
2046
2047
2048 bios->state.crtchead = 0;
2049
2050 if (bios->major_version < 5)
2051 load_nv17_hw_sequencer_ucode(dev, bios);
2052
2053 if (bios->execute) {
2054 bios->fp.last_script_invoc = 0;
2055 bios->fp.lvds_init_run = false;
2056 }
2057
2058 return ret;
2059 }
2060
2061 static bool
2062 nouveau_bios_posted(struct drm_device *dev)
2063 {
2064 struct nouveau_drm *drm = nouveau_drm(dev);
2065 unsigned htotal;
2066
2067 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_TESLA)
2068 return true;
2069
2070 htotal = NVReadVgaCrtc(dev, 0, 0x06);
2071 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x01) << 8;
2072 htotal |= (NVReadVgaCrtc(dev, 0, 0x07) & 0x20) << 4;
2073 htotal |= (NVReadVgaCrtc(dev, 0, 0x25) & 0x01) << 10;
2074 htotal |= (NVReadVgaCrtc(dev, 0, 0x41) & 0x01) << 11;
2075 return (htotal != 0);
2076 }
2077
2078 int
2079 nouveau_bios_init(struct drm_device *dev)
2080 {
2081 struct nouveau_drm *drm = nouveau_drm(dev);
2082 struct nvbios *bios = &drm->vbios;
2083 int ret;
2084
2085
2086 if (!dev->pdev)
2087 return 0;
2088
2089 if (!NVInitVBIOS(dev))
2090 return -ENODEV;
2091
2092 ret = parse_dcb_table(dev, bios);
2093 if (ret)
2094 return ret;
2095
2096 if (!bios->major_version)
2097 return 0;
2098
2099
2100 bios->execute = false;
2101
2102
2103 if (!nouveau_bios_posted(dev)) {
2104 NV_INFO(drm, "Adaptor not initialised, "
2105 "running VBIOS init tables.\n");
2106 bios->execute = true;
2107 }
2108
2109 ret = nouveau_run_vbios_init(dev);
2110 if (ret)
2111 return ret;
2112
2113
2114 if (bios->major_version < 5)
2115 bios->is_mobile = NVReadVgaCrtc(dev, 0, NV_CIO_CRE_4B) & 0x40;
2116
2117
2118 if (bios->is_mobile || bios->major_version >= 5)
2119 ret = parse_fp_mode_table(dev, bios);
2120
2121
2122 bios->execute = true;
2123
2124 return 0;
2125 }
2126
2127 void
2128 nouveau_bios_takedown(struct drm_device *dev)
2129 {
2130 }