root/drivers/gpu/drm/i915/gem/i915_gem_object.c

DEFINITIONS

1. i915_gem_object_alloc
2. i915_gem_object_free
3. i915_gem_object_init
4. i915_gem_object_set_cache_coherency
5. i915_gem_close_object
6. __i915_gem_free_object_rcu
7. __i915_gem_free_objects
8. i915_gem_flush_free_objects
9. __i915_gem_free_work
10. i915_gem_free_object
11. gpu_write_needs_clflush
12. i915_gem_object_flush_write_domain
13. i915_gem_init__objects
14. i915_global_objects_shrink
15. i915_global_objects_exit
16. i915_global_objects_init

   1 /*
   2  * Copyright © 2017 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  */
  24 
  25 #include "display/intel_frontbuffer.h"
  26 #include "gt/intel_gt.h"
  27 #include "i915_drv.h"
  28 #include "i915_gem_clflush.h"
  29 #include "i915_gem_context.h"
  30 #include "i915_gem_object.h"
  31 #include "i915_globals.h"
  32 #include "i915_trace.h"
  33 
  34 static struct i915_global_object {
  35         struct i915_global base;
  36         struct kmem_cache *slab_objects;
  37 } global;
  38 
  39 struct drm_i915_gem_object *i915_gem_object_alloc(void)
  40 {
  41         return kmem_cache_zalloc(global.slab_objects, GFP_KERNEL);
  42 }
  43 
  44 void i915_gem_object_free(struct drm_i915_gem_object *obj)
  45 {
  46         return kmem_cache_free(global.slab_objects, obj);
  47 }
  48 
  49 void i915_gem_object_init(struct drm_i915_gem_object *obj,
  50                           const struct drm_i915_gem_object_ops *ops)
  51 {
  52         mutex_init(&obj->mm.lock);
  53 
  54         spin_lock_init(&obj->vma.lock);
  55         INIT_LIST_HEAD(&obj->vma.list);
  56 
  57         INIT_LIST_HEAD(&obj->mm.link);
  58 
  59         INIT_LIST_HEAD(&obj->lut_list);
  60 
  61         init_rcu_head(&obj->rcu);
  62 
  63         obj->ops = ops;
  64 
  65         obj->mm.madv = I915_MADV_WILLNEED;
  66         INIT_RADIX_TREE(&obj->mm.get_page.radix, GFP_KERNEL | __GFP_NOWARN);
  67         mutex_init(&obj->mm.get_page.lock);
  68 }
  69 
  70 /**
  71  * Mark up the object's coherency levels for a given cache_level
  72  * @obj: #drm_i915_gem_object
  73  * @cache_level: cache level
  74  */
  75 void i915_gem_object_set_cache_coherency(struct drm_i915_gem_object *obj,
  76                                          unsigned int cache_level)
  77 {
  78         obj->cache_level = cache_level;
  79 
  80         if (cache_level != I915_CACHE_NONE)
  81                 obj->cache_coherent = (I915_BO_CACHE_COHERENT_FOR_READ |
  82                                        I915_BO_CACHE_COHERENT_FOR_WRITE);
  83         else if (HAS_LLC(to_i915(obj->base.dev)))
  84                 obj->cache_coherent = I915_BO_CACHE_COHERENT_FOR_READ;
  85         else
  86                 obj->cache_coherent = 0;
  87 
  88         obj->cache_dirty =
  89                 !(obj->cache_coherent & I915_BO_CACHE_COHERENT_FOR_WRITE);
  90 }
  91 
  92 void i915_gem_close_object(struct drm_gem_object *gem, struct drm_file *file)
  93 {
  94         struct drm_i915_gem_object *obj = to_intel_bo(gem);
  95         struct drm_i915_file_private *fpriv = file->driver_priv;
  96         struct i915_lut_handle *lut, *ln;
  97         LIST_HEAD(close);
  98 
  99         i915_gem_object_lock(obj);
 100         list_for_each_entry_safe(lut, ln, &obj->lut_list, obj_link) {
 101                 struct i915_gem_context *ctx = lut->ctx;
 102 
 103                 if (ctx->file_priv != fpriv)
 104                         continue;
 105 
 106                 i915_gem_context_get(ctx);
 107                 list_move(&lut->obj_link, &close);
 108         }
 109         i915_gem_object_unlock(obj);
 110 
 111         list_for_each_entry_safe(lut, ln, &close, obj_link) {
 112                 struct i915_gem_context *ctx = lut->ctx;
 113                 struct i915_vma *vma;
 114 
 115                 /*
 116                  * We allow the process to have multiple handles to the same
 117                  * vma, in the same fd namespace, by virtue of flink/open.
 118                  */
 119 
 120                 mutex_lock(&ctx->mutex);
 121                 vma = radix_tree_delete(&ctx->handles_vma, lut->handle);
 122                 if (vma) {
 123                         GEM_BUG_ON(vma->obj != obj);
 124                         GEM_BUG_ON(!atomic_read(&vma->open_count));
 125                         if (atomic_dec_and_test(&vma->open_count) &&
 126                             !i915_vma_is_ggtt(vma))
 127                                 i915_vma_close(vma);
 128                 }
 129                 mutex_unlock(&ctx->mutex);
 130 
 131                 i915_gem_context_put(lut->ctx);
 132                 i915_lut_handle_free(lut);
 133                 i915_gem_object_put(obj);
 134         }
 135 }
 136 
 137 static void __i915_gem_free_object_rcu(struct rcu_head *head)
 138 {
 139         struct drm_i915_gem_object *obj =
 140                 container_of(head, typeof(*obj), rcu);
 141         struct drm_i915_private *i915 = to_i915(obj->base.dev);
 142 
 143         dma_resv_fini(&obj->base._resv);
 144         i915_gem_object_free(obj);
 145 
 146         GEM_BUG_ON(!atomic_read(&i915->mm.free_count));
 147         atomic_dec(&i915->mm.free_count);
 148 }
 149 
 150 static void __i915_gem_free_objects(struct drm_i915_private *i915,
 151                                     struct llist_node *freed)
 152 {
 153         struct drm_i915_gem_object *obj, *on;
 154         intel_wakeref_t wakeref;
 155 
 156         wakeref = intel_runtime_pm_get(&i915->runtime_pm);
 157         llist_for_each_entry_safe(obj, on, freed, freed) {
 158                 struct i915_vma *vma, *vn;
 159 
 160                 trace_i915_gem_object_destroy(obj);
 161 
 162                 mutex_lock(&i915->drm.struct_mutex);
 163 
 164                 list_for_each_entry_safe(vma, vn, &obj->vma.list, obj_link) {
 165                         GEM_BUG_ON(i915_vma_is_active(vma));
 166                         vma->flags &= ~I915_VMA_PIN_MASK;
 167                         i915_vma_destroy(vma);
 168                 }
 169                 GEM_BUG_ON(!list_empty(&obj->vma.list));
 170                 GEM_BUG_ON(!RB_EMPTY_ROOT(&obj->vma.tree));
 171 
 172                 mutex_unlock(&i915->drm.struct_mutex);
 173 
 174                 GEM_BUG_ON(atomic_read(&obj->bind_count));
 175                 GEM_BUG_ON(obj->userfault_count);
 176                 GEM_BUG_ON(!list_empty(&obj->lut_list));
 177 
 178                 atomic_set(&obj->mm.pages_pin_count, 0);
 179                 __i915_gem_object_put_pages(obj, I915_MM_NORMAL);
 180                 GEM_BUG_ON(i915_gem_object_has_pages(obj));
 181                 bitmap_free(obj->bit_17);
 182 
 183                 if (obj->base.import_attach)
 184                         drm_prime_gem_destroy(&obj->base, NULL);
 185 
 186                 drm_gem_free_mmap_offset(&obj->base);
 187 
 188                 if (obj->ops->release)
 189                         obj->ops->release(obj);
 190 
 191                 /* But keep the pointer alive for RCU-protected lookups */
 192                 call_rcu(&obj->rcu, __i915_gem_free_object_rcu);
 193         }
 194         intel_runtime_pm_put(&i915->runtime_pm, wakeref);
 195 }
 196 
 197 void i915_gem_flush_free_objects(struct drm_i915_private *i915)
 198 {
 199         struct llist_node *freed = llist_del_all(&i915->mm.free_list);
 200 
 201         if (unlikely(freed))
 202                 __i915_gem_free_objects(i915, freed);
 203 }
 204 
 205 static void __i915_gem_free_work(struct work_struct *work)
 206 {
 207         struct drm_i915_private *i915 =
 208                 container_of(work, struct drm_i915_private, mm.free_work);
 209 
 210         i915_gem_flush_free_objects(i915);
 211 }
 212 
 213 void i915_gem_free_object(struct drm_gem_object *gem_obj)
 214 {
 215         struct drm_i915_gem_object *obj = to_intel_bo(gem_obj);
 216         struct drm_i915_private *i915 = to_i915(obj->base.dev);
 217 
 218         GEM_BUG_ON(i915_gem_object_is_framebuffer(obj));
 219 
 220         /*
 221          * Before we free the object, make sure any pure RCU-only
 222          * read-side critical sections are complete, e.g.
 223          * i915_gem_busy_ioctl(). For the corresponding synchronized
 224          * lookup see i915_gem_object_lookup_rcu().
 225          */
 226         atomic_inc(&i915->mm.free_count);
 227 
 228         /*
 229          * This serializes freeing with the shrinker. Since the free
 230          * is delayed, first by RCU then by the workqueue, we want the
 231          * shrinker to be able to free pages of unreferenced objects,
 232          * or else we may oom whilst there are plenty of deferred
 233          * freed objects.
 234          */
 235         i915_gem_object_make_unshrinkable(obj);
 236 
 237         /*
 238          * Since we require blocking on struct_mutex to unbind the freed
 239          * object from the GPU before releasing resources back to the
 240          * system, we can not do that directly from the RCU callback (which may
 241          * be a softirq context), but must instead then defer that work onto a
 242          * kthread. We use the RCU callback rather than move the freed object
 243          * directly onto the work queue so that we can mix between using the
 244          * worker and performing frees directly from subsequent allocations for
 245          * crude but effective memory throttling.
 246          */
 247         if (llist_add(&obj->freed, &i915->mm.free_list))
 248                 queue_work(i915->wq, &i915->mm.free_work);
 249 }
 250 
 251 static bool gpu_write_needs_clflush(struct drm_i915_gem_object *obj)
 252 {
 253         return !(obj->cache_level == I915_CACHE_NONE ||
 254                  obj->cache_level == I915_CACHE_WT);
 255 }
 256 
 257 void
 258 i915_gem_object_flush_write_domain(struct drm_i915_gem_object *obj,
 259                                    unsigned int flush_domains)
 260 {
 261         struct i915_vma *vma;
 262 
 263         assert_object_held(obj);
 264 
 265         if (!(obj->write_domain & flush_domains))
 266                 return;
 267 
 268         switch (obj->write_domain) {
 269         case I915_GEM_DOMAIN_GTT:
 270                 for_each_ggtt_vma(vma, obj)
 271                         intel_gt_flush_ggtt_writes(vma->vm->gt);
 272 
 273                 intel_frontbuffer_flush(obj->frontbuffer, ORIGIN_CPU);
 274 
 275                 for_each_ggtt_vma(vma, obj) {
 276                         if (vma->iomap)
 277                                 continue;
 278 
 279                         i915_vma_unset_ggtt_write(vma);
 280                 }
 281 
 282                 break;
 283 
 284         case I915_GEM_DOMAIN_WC:
 285                 wmb();
 286                 break;
 287 
 288         case I915_GEM_DOMAIN_CPU:
 289                 i915_gem_clflush_object(obj, I915_CLFLUSH_SYNC);
 290                 break;
 291 
 292         case I915_GEM_DOMAIN_RENDER:
 293                 if (gpu_write_needs_clflush(obj))
 294                         obj->cache_dirty = true;
 295                 break;
 296         }
 297 
 298         obj->write_domain = 0;
 299 }
 300 
 301 void i915_gem_init__objects(struct drm_i915_private *i915)
 302 {
 303         INIT_WORK(&i915->mm.free_work, __i915_gem_free_work);
 304 }
 305 
 306 static void i915_global_objects_shrink(void)
 307 {
 308         kmem_cache_shrink(global.slab_objects);
 309 }
 310 
 311 static void i915_global_objects_exit(void)
 312 {
 313         kmem_cache_destroy(global.slab_objects);
 314 }
 315 
 316 static struct i915_global_object global = { {
 317         .shrink = i915_global_objects_shrink,
 318         .exit = i915_global_objects_exit,
 319 } };
 320 
 321 int __init i915_global_objects_init(void)
 322 {
 323         global.slab_objects =
 324                 KMEM_CACHE(drm_i915_gem_object, SLAB_HWCACHE_ALIGN);
 325         if (!global.slab_objects)
 326                 return -ENOMEM;
 327 
 328         i915_global_register(&global.base);
 329         return 0;
 330 }
 331 
 332 #if IS_ENABLED(CONFIG_DRM_I915_SELFTEST)
 333 #include "selftests/huge_gem_object.c"
 334 #include "selftests/huge_pages.c"
 335 #include "selftests/i915_gem_object.c"
 336 #include "selftests/i915_gem_coherency.c"
 337 #endif