root/drivers/gpu/drm/i915/gem/i915_gem_context_types.h

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INCLUDED FROM


   1 /*
   2  * SPDX-License-Identifier: MIT
   3  *
   4  * Copyright © 2019 Intel Corporation
   5  */
   6 
   7 #ifndef __I915_GEM_CONTEXT_TYPES_H__
   8 #define __I915_GEM_CONTEXT_TYPES_H__
   9 
  10 #include <linux/atomic.h>
  11 #include <linux/list.h>
  12 #include <linux/llist.h>
  13 #include <linux/kref.h>
  14 #include <linux/mutex.h>
  15 #include <linux/radix-tree.h>
  16 #include <linux/rbtree.h>
  17 #include <linux/rcupdate.h>
  18 #include <linux/types.h>
  19 
  20 #include "gt/intel_context_types.h"
  21 
  22 #include "i915_scheduler.h"
  23 
  24 struct pid;
  25 
  26 struct drm_i915_private;
  27 struct drm_i915_file_private;
  28 struct i915_address_space;
  29 struct intel_timeline;
  30 struct intel_ring;
  31 
  32 struct i915_gem_engines {
  33         struct rcu_head rcu;
  34         unsigned int num_engines;
  35         struct intel_context *engines[];
  36 };
  37 
  38 struct i915_gem_engines_iter {
  39         unsigned int idx;
  40         const struct i915_gem_engines *engines;
  41 };
  42 
  43 /**
  44  * struct i915_gem_context - client state
  45  *
  46  * The struct i915_gem_context represents the combined view of the driver and
  47  * logical hardware state for a particular client.
  48  */
  49 struct i915_gem_context {
  50         /** i915: i915 device backpointer */
  51         struct drm_i915_private *i915;
  52 
  53         /** file_priv: owning file descriptor */
  54         struct drm_i915_file_private *file_priv;
  55 
  56         /**
  57          * @engines: User defined engines for this context
  58          *
  59          * Various uAPI offer the ability to lookup up an
  60          * index from this array to select an engine operate on.
  61          *
  62          * Multiple logically distinct instances of the same engine
  63          * may be defined in the array, as well as composite virtual
  64          * engines.
  65          *
  66          * Execbuf uses the I915_EXEC_RING_MASK as an index into this
  67          * array to select which HW context + engine to execute on. For
  68          * the default array, the user_ring_map[] is used to translate
  69          * the legacy uABI onto the approprate index (e.g. both
  70          * I915_EXEC_DEFAULT and I915_EXEC_RENDER select the same
  71          * context, and I915_EXEC_BSD is weird). For a use defined
  72          * array, execbuf uses I915_EXEC_RING_MASK as a plain index.
  73          *
  74          * User defined by I915_CONTEXT_PARAM_ENGINE (when the
  75          * CONTEXT_USER_ENGINES flag is set).
  76          */
  77         struct i915_gem_engines __rcu *engines;
  78         struct mutex engines_mutex; /* guards writes to engines */
  79 
  80         struct intel_timeline *timeline;
  81 
  82         /**
  83          * @vm: unique address space (GTT)
  84          *
  85          * In full-ppgtt mode, each context has its own address space ensuring
  86          * complete seperation of one client from all others.
  87          *
  88          * In other modes, this is a NULL pointer with the expectation that
  89          * the caller uses the shared global GTT.
  90          */
  91         struct i915_address_space *vm;
  92 
  93         /**
  94          * @pid: process id of creator
  95          *
  96          * Note that who created the context may not be the principle user,
  97          * as the context may be shared across a local socket. However,
  98          * that should only affect the default context, all contexts created
  99          * explicitly by the client are expected to be isolated.
 100          */
 101         struct pid *pid;
 102 
 103         /**
 104          * @name: arbitrary name
 105          *
 106          * A name is constructed for the context from the creator's process
 107          * name, pid and user handle in order to uniquely identify the
 108          * context in messages.
 109          */
 110         const char *name;
 111 
 112         /** link: place with &drm_i915_private.context_list */
 113         struct list_head link;
 114         struct llist_node free_link;
 115 
 116         /**
 117          * @ref: reference count
 118          *
 119          * A reference to a context is held by both the client who created it
 120          * and on each request submitted to the hardware using the request
 121          * (to ensure the hardware has access to the state until it has
 122          * finished all pending writes). See i915_gem_context_get() and
 123          * i915_gem_context_put() for access.
 124          */
 125         struct kref ref;
 126 
 127         /**
 128          * @rcu: rcu_head for deferred freeing.
 129          */
 130         struct rcu_head rcu;
 131 
 132         /**
 133          * @user_flags: small set of booleans controlled by the user
 134          */
 135         unsigned long user_flags;
 136 #define UCONTEXT_NO_ZEROMAP             0
 137 #define UCONTEXT_NO_ERROR_CAPTURE       1
 138 #define UCONTEXT_BANNABLE               2
 139 #define UCONTEXT_RECOVERABLE            3
 140 
 141         /**
 142          * @flags: small set of booleans
 143          */
 144         unsigned long flags;
 145 #define CONTEXT_BANNED                  0
 146 #define CONTEXT_CLOSED                  1
 147 #define CONTEXT_FORCE_SINGLE_SUBMISSION 2
 148 #define CONTEXT_USER_ENGINES            3
 149 
 150         /**
 151          * @hw_id: - unique identifier for the context
 152          *
 153          * The hardware needs to uniquely identify the context for a few
 154          * functions like fault reporting, PASID, scheduling. The
 155          * &drm_i915_private.context_hw_ida is used to assign a unqiue
 156          * id for the lifetime of the context.
 157          *
 158          * @hw_id_pin_count: - number of times this context had been pinned
 159          * for use (should be, at most, once per engine).
 160          *
 161          * @hw_id_link: - all contexts with an assigned id are tracked
 162          * for possible repossession.
 163          */
 164         unsigned int hw_id;
 165         atomic_t hw_id_pin_count;
 166         struct list_head hw_id_link;
 167 
 168         struct mutex mutex;
 169 
 170         struct i915_sched_attr sched;
 171 
 172         /** guilty_count: How many times this context has caused a GPU hang. */
 173         atomic_t guilty_count;
 174         /**
 175          * @active_count: How many times this context was active during a GPU
 176          * hang, but did not cause it.
 177          */
 178         atomic_t active_count;
 179 
 180         /**
 181          * @hang_timestamp: The last time(s) this context caused a GPU hang
 182          */
 183         unsigned long hang_timestamp[2];
 184 #define CONTEXT_FAST_HANG_JIFFIES (120 * HZ) /* 3 hangs within 120s? Banned! */
 185 
 186         /** remap_slice: Bitmask of cache lines that need remapping */
 187         u8 remap_slice;
 188 
 189         /**
 190          * handles_vma: rbtree to look up our context specific obj/vma for
 191          * the user handle. (user handles are per fd, but the binding is
 192          * per vm, which may be one per context or shared with the global GTT)
 193          */
 194         struct radix_tree_root handles_vma;
 195 
 196         /** jump_whitelist: Bit array for tracking cmds during cmdparsing
 197          *  Guarded by struct_mutex
 198          */
 199         unsigned long *jump_whitelist;
 200         /** jump_whitelist_cmds: No of cmd slots available */
 201         u32 jump_whitelist_cmds;
 202 };
 203 
 204 #endif /* __I915_GEM_CONTEXT_TYPES_H__ */

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